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Differential D45885

AMDGPU: Fix a corner case crash in SIOptimizeExecMasking
ClosedPublic

Authored by nhaehnle on Apr 20 2018, 8:50 AM.

Details

Reviewers
arsenm
rampitec
Commits
rG5a995664f07d: AMDGPU: Fix a corner case crash in SIOptimizeExecMasking
rL330585: AMDGPU: Fix a corner case crash in SIOptimizeExecMasking
Summary

See the new test case; this is really unlikely to happen with real code,
but I ran into this while attempting to bugpoint-reduce a different issue.

Change-Id: I9ade1dc1aa8fd9c4d9fc83661d7b80e310b5c4a6

Diff Detail

Event Timeline

nhaehnle created this revision.Apr 20 2018, 8:50 AM
Herald added subscribers: t-tye, tpr, dstuttard and 3 others. · View Herald TranscriptApr 20 2018, 8:50 AM
Harbormaster completed remote builds in B17281: Diff 143323.Apr 20 2018, 8:51 AM
rampitec accepted this revision.Apr 20 2018, 9:23 AM

LGTM

This revision is now accepted and ready to land.Apr 20 2018, 9:23 AM
Closed by commit rL330585: AMDGPU: Fix a corner case crash in SIOptimizeExecMasking (authored by nha). · Explain WhyApr 23 2018, 6:09 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
AMDGPU/
2 lines
test/
CodeGen/
AMDGPU/
9 lines

Diff 143323

lib/Target/AMDGPU/SIOptimizeExecMasking.cpp

Show First 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
} }
/// If \p MI is a copy to exec, return the register copied from. /// If \p MI is a copy to exec, return the register copied from.
static unsigned isCopyToExec(const MachineInstr &MI) { static unsigned isCopyToExec(const MachineInstr &MI) {
switch (MI.getOpcode()) { switch (MI.getOpcode()) {
case AMDGPU::COPY: case AMDGPU::COPY:
case AMDGPU::S_MOV_B64: { case AMDGPU::S_MOV_B64: {
const MachineOperand &Dst = MI.getOperand(0); const MachineOperand &Dst = MI.getOperand(0);
if (Dst.isReg() && Dst.getReg() == AMDGPU::EXEC) if (Dst.isReg() && Dst.getReg() == AMDGPU::EXEC && MI.getOperand(1).isReg())
return MI.getOperand(1).getReg(); return MI.getOperand(1).getReg();
break; break;
} }
case AMDGPU::S_MOV_B64_term: case AMDGPU::S_MOV_B64_term:
llvm_unreachable("should have been replaced"); llvm_unreachable("should have been replaced");
} }
return AMDGPU::NoRegister; return AMDGPU::NoRegister;
▲ Show 20 Lines • Show All 274 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll

Show First 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
define amdgpu_ps float @reuse_input2(i32 inreg %count, i32 %a) { define amdgpu_ps float @reuse_input2(i32 inreg %count, i32 %a) {
main_body: main_body:
%s = add i32 %a, %count %s = add i32 %a, %count
%f = sitofp i32 %s to float %f = sitofp i32 %s to float
call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 19) call void @llvm.amdgcn.init.exec.from.input(i32 %count, i32 19)
ret float %f ret float %f
} }
; GCN-LABEL: {{^}}init_unreachable:
;
; This used to crash.
define amdgpu_ps void @init_unreachable() {
main_body:
call void @llvm.amdgcn.init.exec(i64 -1)
unreachable
}
declare void @llvm.amdgcn.init.exec(i64) #1 declare void @llvm.amdgcn.init.exec(i64) #1
declare void @llvm.amdgcn.init.exec.from.input(i32, i32) #1 declare void @llvm.amdgcn.init.exec.from.input(i32, i32) #1
attributes #1 = { convergent } attributes #1 = { convergent }