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[BlockPlacement] Disable block placement tail duplciation in structured CFG.
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Authored by timshen on Mar 28 2018, 5:39 PM.

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Summary

Tail duplication easily breaks the structure of CFG, e.g. duplicating on
a region entry. If the structure is intended to be preserved, then we
may want to configure tail duplication, or disable it for structured
CFG. From our benchmark results disabling it doesn't cause performance
regression.

Notice that this currently affects AMDGPU backend. In the next patch, I
also plan to turn on requiresStructuredCFG for NVPTX.

All unit tests still pass.

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Repository
rL LLVM

Event Timeline

timshen created this revision.Mar 28 2018, 5:39 PM
timshen edited the summary of this revision. (Show Details)Mar 28 2018, 6:00 PM

Can we split out the NVPTX changes from the tail-duplication changes? This will make it easier to roll back &c.

Other than that, LGTM.

llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
50 ↗(On Diff #140164)

ofo

timshen updated this revision to Diff 140364.Mar 29 2018, 4:43 PM

Splitted the patch.

timshen retitled this revision from [NVPTX] Disable block placement tail duplciation in structured CFG. to [BlockPlacement] Disable block placement tail duplciation in structured CFG..Mar 29 2018, 4:44 PM
timshen edited the summary of this revision. (Show Details)
jlebar accepted this revision.Mar 29 2018, 4:45 PM
jlebar added 1 blocking reviewer(s): arsenm.

Would like arsenm or someone else from AMDGPU to sign off on this, but lgtm.

Don't really care because amdgcn doesn't use this anymore

jlebar removed 1 blocking reviewer(s): arsenm.Mar 30 2018, 8:21 AM
This revision is now accepted and ready to land.Mar 30 2018, 8:21 AM

Don't really care because amdgcn doesn't use this anymore

Thanks, Matt!

This revision was automatically updated to reflect the committed changes.