Make AddrSpaceCast noops on PPC

[vchuravy]

Summary

PPC as AArch64 doesn't have address-spaces so we can drop them in the backend

[nemanjai]

This seems like a perfectly reasonable thing to do. However, I'd like to understand the implications of this change - does anything change behaviour as a result? If so, can we have a test case? If not, does this just save compile time (i.e. we don't insert casts that will just be cleaned up anyway)? Even if the change is only internal to the SDAG processing and the final code doesn't change, would it be possible to have an MIR test case that shows the difference?

[vchuravy]

add tests for addrspaces noops on PPC

[vchuravy]

fix typos

[vchuravy]

@nemanjai I added two test cases the first taken from ARM.addrspacecast.ll and the second from a bug that the Julia frontend hit.

It should be a non-functional change for the backend itself.

[nemanjai]

LGTM.

test/CodeGen/PowerPC/addrspacecast.ll

1 ↗

(On Diff #138926)

I'm not sure how /dev/null works for targets I'm not familiar with (like Windows). Is this a common thing to do?
It might not be a terrible thing to actually do < %s | FileCheck %s and then maybe just a CHECK-LABEL to verify we've actually generated assembly.

But in either case, I assume that lit checks for the return code from the llc invocation, so I'm fine either way.

[vchuravy]

update tests to use FileCheck

[vchuravy]

Thanks! Can you land this for me I don't have the commit bit.

test/CodeGen/PowerPC/addrspacecast.ll

1 ↗

(On Diff #138926)

Yeah this seems fairly standard and was taken from the ARM/addrspacecast.ll
But I can use FileCheck and CHECK-LABEL to do the same

llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h

struct ReuseLoadInfo {
         if (IsDereferenceable)
           F |= MachineMemOperand::MODereferenceable;
         if (IsInvariant)
           F |= MachineMemOperand::MOInvariant;
         return F;
       }
     };
 
+    bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
+      // Addrspacecasts are always noops.
+      return true;
+    }
+
     bool canReuseLoadAddress(SDValue Op, EVT MemVT, ReuseLoadInfo &RLI,
                              SelectionDAG &DAG,
                              ISD::LoadExtType ET = ISD::NON_EXTLOAD) const;
     void spliceIntoChain(SDValue ResChain, SDValue NewResChain,
                          SelectionDAG &DAG) const;
 
     void LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI,
                                 SelectionDAG &DAG, const SDLoc &dl) const;

llvm/trunk/test/CodeGen/PowerPC/addrspacecast.ll

+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - | FileCheck %s
+
+; Check that codegen for an addrspace cast succeeds without error.
+define <4 x i32 addrspace(1)*> @f (<4 x i32*> %x) {
+  %1 = addrspacecast <4 x i32*> %x to <4 x i32 addrspace(1)*>
+  ret <4 x i32 addrspace(1)*> %1
+  ; CHECK-LABEL: @f
+}
+
+; Check that fairly complicated addrspace cast and operations succeed without error.
+%struct = type opaque
+define void @g (%struct addrspace(10)** %x) {
+  %1 = load %struct addrspace(10)*, %struct addrspace(10)** %x
+  %2 = addrspacecast %struct addrspace(10)* %1 to %struct addrspace(11)*
+  %3 = bitcast %struct addrspace(11)* %2 to i8 addrspace(11)*
+  %4 = getelementptr i8, i8 addrspace(11)* %3, i64 16
+  %5 = bitcast i8 addrspace(11)* %4 to %struct addrspace(10)* addrspace(11)*
+  %6 = load %struct addrspace(10)*, %struct addrspace(10)* addrspace(11)* %5
+  store %struct addrspace(10)* %6, %struct addrspace(10)** undef
+  ret void
+  ; CHECK-LABEL: @g
+}