[GlobalISel][TableGen] Add support for SDNodeXForm
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Authored by volkan on Jan 12 2018, 2:39 PM.

Details

Summary

This patch adds CustomRenderer which renders the matched
operands to the specified instruction.

Targets can enable the matching of SDNodeXForm by adding
a definition that inherits from GICustomOperandRenderer and
GISDNodeXFormEquiv as follows.

def gi_imm8 : GICustomOperandRenderer<"renderImm8”>,

GISDNodeXFormEquiv<imm8_xform>;

Custom renderer functions should be of the form:
void render(MachineInstrBuilder &MIB, const MachineInstr &I);

Diff Detail

Repository
rL LLVM
volkan created this revision.Jan 12 2018, 2:39 PM
qcolombet added inline comments.Jan 12 2018, 4:11 PM
lib/Target/AArch64/AArch64InstructionSelector.cpp
1531 ↗(On Diff #129711)

Could you put the explicit type here?

In particular, this pattern looks strange:
auto CstVal
*CstVal;

At least, I would expect something along those lines:
auto *CstVal
*CstVal;

volkan updated this revision to Diff 129728.Jan 12 2018, 4:21 PM

Replaced auto with the actual type to make the code easy to read.

volkan marked an inline comment as done.Jan 12 2018, 4:28 PM
volkan added inline comments.
lib/Target/AArch64/AArch64InstructionSelector.cpp
1531 ↗(On Diff #129711)

It's because getConstantVRegVal returns Optional<int64_t>, I replaced auto with that. Also, I replaced *CstVal with CstVal.getValue().

Looks mostly good to me.

Two things:

  • The test case doesn't seem to demonstrate what we are adding (see inline comment)
  • We miss an entry in the GlobalISel doc to explain this new construction (to be fair we miss the whole TableGen support explanation) (could be a follow-up patch)
test/CodeGen/AArch64/GlobalISel/select-mul.mir
21 ↗(On Diff #129728)

I'm confused, isn't the goal of the patch to be able to match the immediate variant here?

volkan marked an inline comment as done.Jan 12 2018, 5:04 PM
volkan added inline comments.
test/CodeGen/AArch64/GlobalISel/select-mul.mir
21 ↗(On Diff #129728)

Yes, but the pattern it's trying to match is different.

def : Pat<(i64 (mul (sext GPR32:$Rn), (s64imm_32bit:$C))),
          (SMADDLrrr GPR32:$Rn, (MOVi32imm (trunc_imm imm:$C)), XZR)>;

Here, trunc_imm is an SDNodeXForm.

I'll add the pattern as a comment.

volkan updated this revision to Diff 129737.Jan 12 2018, 5:10 PM

Added the pattern to the test file.

dsanders accepted this revision.Jan 12 2018, 5:49 PM

LGTM with some nits fixed

include/llvm/Target/GlobalISel/Target.td
50–51 ↗(On Diff #129737)

We should probably expand on this to say that it matches an MI and renders directly to the result instruction (without an intermediate node unlike SDNodeXForm)

58 ↗(On Diff #129737)

This is a tiny nitpick, but MachineInstr variables are usually named MI

lib/Target/AArch64/AArch64InstrInfo.td
682 ↗(On Diff #129737)

Indentation

lib/Target/AArch64/AArch64InstructionSelector.cpp
95 ↗(On Diff #129737)

I -> MI

1528 ↗(On Diff #129737)

I -> MI

utils/TableGen/GlobalISelEmitter.cpp
3707–3721 ↗(On Diff #129737)

Given that these lambdas are the same, could we unify them in a 'orderByName' lambda or similar?

This revision is now accepted and ready to land.Jan 12 2018, 5:49 PM
volkan updated this revision to Diff 129978.Jan 16 2018, 9:46 AM

Updated based on Daniel's comments.

volkan marked 6 inline comments as done.Jan 16 2018, 10:06 AM
This revision was automatically updated to reflect the committed changes.