[PowerPC] Allow tail calls of fastcc functions from C CallingConv functions.

[sfertile]

Summary

Currently the tail call checks require the caller and callee to have the same calling convention. This patches relaxes this restriction to allow fastcc callees to be tail-called from ccc callers.

[nemanjai]

LGTM.

[echristo]

LGTM.

llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp

hasSameArgumentList(const Function *CallerFn, ImmutableCallSite CS) {
   return true;
 }
 
 // Returns true if TCO is possible between the callers and callees
 // calling conventions.
 static bool
 areCallingConvEligibleForTCO_64SVR4(CallingConv::ID CallerCC,
                                     CallingConv::ID CalleeCC) {
-  // Tail or Sibling call optimization (TCO/SCO) needs callee and caller to
-  // have the same calling convention.
-  if (CallerCC != CalleeCC)
+  // tail calls are possible with fastcc and ccc.
+  auto isTailCallableCC  = [] (CallingConv::ID CC){
+      return  CC == CallingConv::C || CC == CallingConv::Fast;
+  };
+  if (!isTailCallableCC(CallerCC) || !isTailCallableCC(CalleeCC))
     return false;
 
-  // Tail or Sibling calls can be done with fastcc/ccc.
-  return (CallerCC == CallingConv::Fast || CallerCC == CallingConv::C);
+  // We can safely tail call both fastcc and ccc callees from a c calling
+  // convention caller. If the caller is fastcc, we may have less stack space
+  // then a non-fastcc caller with the same signature so disable tail-calls in
+  // that case.
+  return CallerCC == CallingConv::C || CallerCC == CalleeCC;
 }
 
 bool
 PPCTargetLowering::IsEligibleForTailCallOptimization_64SVR4(
                                     SDValue Callee,
                                     CallingConv::ID CalleeCC,
                                     ImmutableCallSite CS,
                                     bool isVarArg,

llvm/trunk/test/CodeGen/PowerPC/duplicate-returns-for-tailcall.ll

 
 if.end4:                                          ; preds = %if.end
   %cmp5 = icmp sgt i32 %b, %c
   br i1 %cmp5, label %if.then6, label %return
 
 if.then6:                                         ; preds = %if.end4
   %call7 = tail call fastcc signext i32 @call3(i32 signext %a, i32 signext %b, i32 signext %c)
   br label %return
-; No duplication here because the calling convention mismatch means we won't tail-call
+; tail calling a fastcc function from a ccc function is supported.
 ; CHECK_LABEL: if.then13:
-; CHECK:       tail call fastcc signext i32 @call3
-; CHECK-NEXT:  br
+; CHECK:       %[[T2:[a-zA-Z0-9]+]] = tail call fastcc signext i32 @call3
+; CHECK-NEXT:  ret i32 %[[T2]]
 
 return:                                           ; preds = %if.end4, %if.then6, %if.then2, %if.then
   %retval.0 = phi i32 [ %call, %if.then ], [ %call3, %if.then2 ], [ %call7, %if.then6 ], [ %c, %if.end4 ]
   ret i32 %retval.0
 }
 
 declare signext i32 @call2(i32 signext, i32 signext, i32 signext) local_unnamed_addr #2
 
 ; Function Attrs: noinline norecurse nounwind readnone
 define internal fastcc signext i32 @call3(i32 signext %a, i32 signext %b, i32 signext %c) unnamed_addr #0 {
 entry:
   %mul = mul nsw i32 %b, %a
   %mul1 = mul nsw i32 %mul, %c
   ret i32 %mul1
 }