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AMDGPU: Update code object description
ClosedPublic

Authored by t-tye on Nov 8 2017, 7:34 PM.

Details

Summary
  • Use ELF header flags to identify processor.
  • Remove isa note record.
  • Add target feature section.
  • Make metadata for NumVGPRs, NumSGPRs and MaxFlatWorkGroupSize required.
  • Add FixedWorkGroupSize to CodeProps metadata.
  • Add ReqdWorkGroupSize* to kernel descriptor and move MaxFlatWorkGroupSize to be adjacent.
  • Move IsXNACKEnabled in the kernel descriptor to be at the end of the unused flags.
  • Remove IsDynamicCallStack from the metadata and kernel descriptor.
  • Remove legacy debugger metadata.

Diff Detail

Event Timeline

t-tye created this revision.Nov 8 2017, 7:34 PM
t-tye updated this revision to Diff 122341.Nov 9 2017, 3:06 PM
  • Updated the target features section.
kzhuravl accepted this revision.Nov 9 2017, 3:07 PM

LGTM.

This revision is now accepted and ready to land.Nov 9 2017, 3:07 PM
t-tye updated this revision to Diff 122343.Nov 9 2017, 3:25 PM
  • Remove old XNACK enabled processor names.
kzhuravl accepted this revision.Nov 9 2017, 3:26 PM

LGTM.

Does this mean the code object format has changed?

Does this mean the code object format has changed?

I am in the process of updating the implementation.

Will this change be backwards compatible? If not, could you add to the documentation which version of the ROCm runtime is required for the new format.

Will this change be backwards compatible?

No.

If not, could you add to the documentation which version of the ROCm runtime is required for the new format.

Sure, will do.

This revision was automatically updated to reflect the committed changes.