[libunwind] Fix building for ARM with dwarf exception handling

[mstorsjo]

Summary

The previous definition of _LIBUNWIND_HIGHEST_DWARF_REGISTER seems to be a copy of the ARM64 value (introduced in SVN r276128); since the code actually hasn't compiled properly for arm in dwarf mode before, this hasn't actually been used. Set it to the correct value based on the UNW_ARM_* enum values.

[compnerd]

Whats the motivation for adding DWARF based unwinding on ARM? What environment is using this?

src/Registers.hpp

1342 ↗

(On Diff #120110)

Can we not use _LIBUNWIND_HIGHEST_DWARF_REGISTER here?

src/UnwindLevel1.c

79 ↗

(On Diff #120110)

Please convert these to %p instead. The casting and conversion is kinda ... unnecessary.

[mstorsjo]

In D39251#906110, @compnerd wrote:

Whats the motivation for adding DWARF based unwinding on ARM? What environment is using this?

AFAIK NetBSD does.

And my actual target is for MinGW/ARM; it seemed to be less effort to make libunwind work for ARM/DWARF than to make the COFF/ARM backend in LLVM output EHABI (but I might have been mistaken).

src/Registers.hpp

1342 ↗

(On Diff #120110)

I guess we could - we could do that consistently throughout all the Registers_* classes then. Or even omit the method at all and just check _LIBUNWIND_HIGHEST_DWARF_REGISTER in the caller? Or perhaps the last part clashes with part of the (incomplete afaik?) intended design to support unwinding foreign systems as well.

src/UnwindLevel1.c

79 ↗

(On Diff #120110)

Using %p wouldn't work when on 32 bit systems currently, while most of these fields are defined to be uint64_t except for the arm ehabi case. I guess I could look at how hard it would be to switch it to uint64_t for the arm/dwarf case as well.

[mstorsjo]

src/UnwindLevel1.c

79 ↗

(On Diff #120110)

This part can be avoided if we consistently use unw_word_t == uint64_t, as done in D39280.

[mstorsjo]

src/Registers.hpp

1342 ↗

(On Diff #120110)

This gets taken care of for the existing ones in D39281 - if that one goes through I'll update this patch accordingly.

[mstorsjo]

Avoiding duplicating the highest register number, avoiding any further casts in log lines.

[compnerd]

src/Registers.hpp

1481 ↗

(On Diff #120863)

Why the change to mark these as mutable?

[mstorsjo]

src/Registers.hpp

1481 ↗

(On Diff #120863)

These are touched from within getRegister, but we need to make getRegister const since it's used on a const Registers object in the dwarf codepath.

libunwind/trunk/include/__libunwind_config.h

#if defined(__arm__) && !defined(__USING_SJLJ_EXCEPTIONS__) && \
     !defined(__ARM_DWARF_EH__)
 #define _LIBUNWIND_ARM_EHABI
 #endif
 
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86       8
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86_64    32
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC       112
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM64     95
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM       95
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM       287
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K      31
 
 #if defined(_LIBUNWIND_IS_NATIVE_ONLY)
 # if defined(__i386__)
 #  define _LIBUNWIND_TARGET_I386
 #  define _LIBUNWIND_CONTEXT_SIZE 8
 #  define _LIBUNWIND_CURSOR_SIZE 15
 #  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86

 # define _LIBUNWIND_TARGET_I386
 # define _LIBUNWIND_TARGET_X86_64 1
 # define _LIBUNWIND_TARGET_PPC 1
 # define _LIBUNWIND_TARGET_AARCH64 1
 # define _LIBUNWIND_TARGET_ARM 1
 # define _LIBUNWIND_TARGET_OR1K 1
 # define _LIBUNWIND_CONTEXT_SIZE 128
 # define _LIBUNWIND_CURSOR_SIZE 140
-# define _LIBUNWIND_HIGHEST_DWARF_REGISTER 119
+# define _LIBUNWIND_HIGHEST_DWARF_REGISTER 287
 #endif // _LIBUNWIND_IS_NATIVE_ONLY
 
 #endif // ____LIBUNWIND_CONFIG_H__

libunwind/trunk/include/libunwind.h

struct unw_cursor_t {
   uint64_t data[_LIBUNWIND_CURSOR_SIZE];
 };
 typedef struct unw_cursor_t unw_cursor_t;
 
 typedef struct unw_addr_space *unw_addr_space_t;
 
 typedef int unw_regnum_t;
 typedef uintptr_t unw_word_t;
-#if defined(_LIBUNWIND_ARM_EHABI)
+#if defined(__arm__)
 typedef uint64_t unw_fpreg_t;
 #else
 typedef double unw_fpreg_t;
 #endif
 
 struct unw_proc_info_t {
   unw_word_t  start_ip;         /* start address of function */
   unw_word_t  end_ip;           /* address after end of function */

libunwind/trunk/src/Registers.hpp

 /// NOTE: Assumes VFPv3. On ARM processors without a floating point unit,
 /// this uses more memory than required.
 class _LIBUNWIND_HIDDEN Registers_arm {
 public:
   Registers_arm();
   Registers_arm(const void *registers);
 
   bool        validRegister(int num) const;
-  uint32_t    getRegister(int num);
+  uint32_t    getRegister(int num) const;
   void        setRegister(int num, uint32_t value);
   bool        validFloatRegister(int num) const;
   unw_fpreg_t getFloatRegister(int num);
   void        setFloatRegister(int num, unw_fpreg_t value);
   bool        validVectorRegister(int num) const;
   v128        getVectorRegister(int num) const;
   void        setVectorRegister(int num, v128 value);
   const char *getRegisterName(int num);
   void        jumpto() {
     restoreSavedFloatRegisters();
     restoreCoreAndJumpTo();
   }
+  static int  lastDwarfRegNum() { return _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM; }
 
   uint32_t  getSP() const         { return _registers.__sp; }
   void      setSP(uint32_t value) { _registers.__sp = value; }
   uint32_t  getIP() const         { return _registers.__pc; }
   void      setIP(uint32_t value) { _registers.__pc = value; }
 
   void saveVFPAsX() {
     assert(_use_X_for_vfp_save || !_saved_vfp_d0_d15);
#endif
   // VFP registers D0-D15, + padding if saved using FSTMX
   unw_fpreg_t _vfp_d0_d15_pad[17];
   // VFPv3 registers D16-D31, always saved using FSTMD
   unw_fpreg_t _vfp_d16_d31[16];
 #if defined(__ARM_WMMX)
   // Whether iWMMX data registers are saved.
   bool _saved_iwmmx;
   // Whether iWMMX control registers are saved.
-  bool _saved_iwmmx_control;
+  mutable bool _saved_iwmmx_control;
   // iWMMX registers
   unw_fpreg_t _iwmmx[16];
   // iWMMX control registers
-  uint32_t _iwmmx_control[4];
+  mutable uint32_t _iwmmx_control[4];
 #endif
 };
 
 inline Registers_arm::Registers_arm(const void *registers)
   : _use_X_for_vfp_save(false),
     _saved_vfp_d0_d15(false),
     _saved_vfp_d16_d31(false) {
   static_assert((check_fit<Registers_arm, unw_context_t>::does_fit),

 #if defined(__ARM_WMMX)
   if (regNum >= UNW_ARM_WC0 && regNum <= UNW_ARM_WC3)
     return true;
 #endif
 
   return false;
 }
 
-inline uint32_t Registers_arm::getRegister(int regNum) {
+inline uint32_t Registers_arm::getRegister(int regNum) const {
   if (regNum == UNW_REG_SP || regNum == UNW_ARM_SP)
     return _registers.__sp;
 
   if (regNum == UNW_ARM_LR)
     return _registers.__lr;
 
   if (regNum == UNW_REG_IP || regNum == UNW_ARM_IP)
     return _registers.__pc;

libunwind/trunk/src/UnwindCursor.hpp

 #endif
 
 #if defined(_LIBUNWIND_TARGET_AARCH64)
   compact_unwind_encoding_t dwarfEncoding(Registers_arm64 &) const {
     return UNWIND_ARM64_MODE_DWARF;
   }
 #endif
 
+#if defined(_LIBUNWIND_TARGET_ARM)
+  compact_unwind_encoding_t dwarfEncoding(Registers_arm &) const {
+    return 0;
+  }
+#endif
+
 #if defined (_LIBUNWIND_TARGET_OR1K)
   compact_unwind_encoding_t dwarfEncoding(Registers_or1k &) const {
     return 0;
   }
 #endif
 #endif // defined(_LIBUNWIND_SUPPORT_DWARF_UNWIND)
 
 

libunwind/trunk/src/libunwind.cpp

 #if defined(__i386__)
 # define REGISTER_KIND Registers_x86
 #elif defined(__x86_64__)
 # define REGISTER_KIND Registers_x86_64
 #elif defined(__ppc__)
 # define REGISTER_KIND Registers_ppc
 #elif defined(__aarch64__)
 # define REGISTER_KIND Registers_arm64
-#elif defined(_LIBUNWIND_ARM_EHABI)
+#elif defined(__arm__)
 # define REGISTER_KIND Registers_arm
 #elif defined(__or1k__)
 # define REGISTER_KIND Registers_or1k
 #elif defined(__mips__)
 # warning The MIPS architecture is not supported.
 #else
 # error Architecture not supported
 #endif