[DebugInfo] Insert DW_OP_deref when spilling indirect DBG_VALUEs

[rnk]

Summary

This comes up in optimized debug info for C++ programs that pass and
return objects indirectly by address. In these programs,
llvm.dbg.declare survives optimization, which causes us to emit indirect
DBG_VALUE instructions. The fast register allocator knows to insert
DW_OP_deref when spilling indirect DBG_VALUE instructions, but the
LiveDebugVariables did not until this change.

This fixes part of PR34513. I need to look into why this doesn't work at
-O0 and I'll send follow up patches to handle that.

[aprantl]

llvm/lib/CodeGen/LiveDebugVariables.cpp

111–112

Can you change the Variable type, too, for symmetry?

501

Why can't this be API?

1059–1060

There's a much easier to read BuildMI variant that takes an IsIndirect flag.

1072

shall we hide the comparison against ~0U in a self-duocumenting helper function isCondition(LocNo)?

[rnk]

llvm/lib/CodeGen/LiveDebugVariables.cpp

501

I want to consider frame indices and constants as "indirect" so that they use the same UserValue. Some tests (I'll check how many) rely on this for eliminating adjacent DBG_VALUE instructions describing the same variable, like this:

DBG_VALUE %vreg3, 0, !"v" # Goes away after rewriting if we use isImm() directly
DBG_VALUE 42, 0, !"v"
mov $42, %eax
retq

In the long run, IsIndirect should not be considered when getting or creating a UserValue. I have a follow-on patch that implements this, but I split it out for incrementality.

1059–1060

That one only takes a register argument, though. At this point we have a MachineOperand. I tried this first, but I couldn't set the debug-use flag:

BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
    .add(Loc)
    .add(NewIndirect ? MachineOperand::CreateImm(0U)
                     : MachineOperand::CreateReg(0U))
    .addMetadata(Variable)
    .addMetadata(Expr);

1072

I actually did that in the follow-up. Do you think it's worth it now?

[aprantl]

llvm/lib/CodeGen/LiveDebugVariables.cpp

501

Can you post you work-in-progress for the follow-up? I'd like to better understand where this is heading.

1059–1060

Still seems silly. I don't like that the implementation detail that "direct values are encoded with a second register operand" is leaking all over the place. Should we add a BuildMI variant that is useful in this situation? There's a bunch of other places that use the same pattern and I don't like how hard these are to find.

In any case we can do this later, too.

[rnk]

llvm/lib/CodeGen/LiveDebugVariables.cpp

501

D37932. It needs tests, though. I haven't found a way to write any without waiting for llvm.dbg.addr or manually editting MIR, so I held off on it. But, the basic idea is that a DBG_VALUE location is more than just one MachineOperand: it's that plus the IsIndirect bit.

1059–1060

There's a lot we can do to clean up DBG_VALUE construction and spilling. I'd like to handle these cases, get some tests in, and then come back and revisit the representation and API to build DBG_VALUEs. One idea is to have a separate DBG_ADDR instruction mirroring the llvm.dbg.addr intrinsic.

[rnk]

• Mostly s/MDNode/DILocalVariable/

[aprantl]

Thanks! Are you running the debuginfo-tests on your changes prior to committing?

llvm/lib/CodeGen/LiveDebugVariables.cpp

501

Thanks! It would be great if you could split out the NFC bits of the follow-up into a separate commit (hereby LGTM'ed) following shortly after this one.

[rnk]

In D37911#872701, @aprantl wrote:

Thanks! Are you running the debuginfo-tests on your changes prior to committing?

Not as a rule, since they don't run on Windows where I'm developing, but in this case, yes I did.

llvm/lib/CodeGen/LiveDebugVariables.cpp

501

Hopefully rL313405 is what you were thinking of

llvm/lib/CodeGen/LiveDebugVariables.cpp

 /// A DBG_VALUE instruction notes that (a sub-register of) a virtual register
 /// holds part of a user variable. The part is identified by a byte offset.
 ///
 /// UserValues are grouped into equivalence classes for easier searching. Two
 /// user values are related if they refer to the same variable, or if they are
 /// held by the same virtual register. The equivalence class is the transitive
 /// closure of that relation.
 class UserValue {
-  const MDNode *Variable;   ///< The debug info variable we are part of.
-  const MDNode *Expression; ///< Any complex address expression.
+  const DILocalVariable *Variable; ///< The debug info variable we are part of.
+  const DIExpression *Expression; ///< Any complex address expression.
   bool IsIndirect;        ///< true if this is a register-indirect+offset value.
   DebugLoc dl;            ///< The debug location for the variable. This is
                           ///< used by dwarf writer to find lexical scope.
   UserValue *leader;      ///< Equivalence class leader.
   UserValue *next = nullptr; ///< Next value in equivalence class, or null.
 
   /// Numbered locations referenced by locmap.
   SmallVector<MachineOperand, 4> locations;
 
   /// Map of slot indices where this value is live.
   LocMap locInts;
 
   /// Set of interval start indexes that have been trimmed to the
   /// lexical scope.
   SmallSet<SlotIndex, 2> trimmedDefs;
 
   /// coalesceLocation - After LocNo was changed, check if it has become
   /// identical to another location, and coalesce them. This may cause LocNo or
   /// a later location to be erased, but no earlier location will be erased.
   void coalesceLocation(unsigned LocNo);
 
   /// insertDebugValue - Insert a DBG_VALUE into MBB at Idx for LocNo.
-  void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx, unsigned LocNo,
-                        LiveIntervals &LIS, const TargetInstrInfo &TII);
+  void insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
+                        unsigned LocNo, bool Spilled, LiveIntervals &LIS,
+                        const TargetInstrInfo &TII);
 
   /// splitLocation - Replace OldLocNo ranges with NewRegs ranges where NewRegs
   /// is live. Returns true if any changes were made.
   bool splitLocation(unsigned OldLocNo, ArrayRef<unsigned> NewRegs,
                      LiveIntervals &LIS);
 
 public:
   /// UserValue - Create a new UserValue.
-  UserValue(const MDNode *var, const MDNode *expr, bool i, DebugLoc L,
-            LocMap::Allocator &alloc)
+  UserValue(const DILocalVariable *var, const DIExpression *expr, bool i,
+            DebugLoc L, LocMap::Allocator &alloc)
       : Variable(var), Expression(expr), IsIndirect(i), dl(std::move(L)),
         leader(this), locInts(alloc) {}
 
   /// getLeader - Get the leader of this value's equivalence class.
   UserValue *getLeader() {
     UserValue *l = leader;
     while (l != l->leader)
       l = l->leader;
     return leader = l;
   }
 
   /// getNext - Return the next UserValue in the equivalence class.
   UserValue *getNext() const { return next; }
 
   /// match - Does this UserValue match the parameters?
-  bool match(const MDNode *Var, const MDNode *Expr, const DILocation *IA,
-             bool indirect) const {
+  bool match(const DILocalVariable *Var, const DIExpression *Expr,
+             const DILocation *IA, bool indirect) const {
     return Var == Variable && Expr == Expression && dl->getInlinedAt() == IA &&
            indirect == IsIndirect;
   }
 
   /// merge - Merge equivalence classes.
   static UserValue *merge(UserValue *L1, UserValue *L2) {
     L2 = L2->getLeader();
     if (!L1)
void computeIntervals(MachineRegisterInfo &MRI, const TargetRegisterInfo &TRI,
                         LiveIntervals &LIS, LexicalScopes &LS);
 
   /// splitRegister - Replace OldReg ranges with NewRegs ranges where NewRegs is
   /// live. Returns true if any changes were made.
   bool splitRegister(unsigned OldLocNo, ArrayRef<unsigned> NewRegs,
                      LiveIntervals &LIS);
 
   /// rewriteLocations - Rewrite virtual register locations according to the
-  /// provided virtual register map.
-  void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI);
+  /// provided virtual register map. Record which locations were spilled.
+  void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
+                        BitVector &SpilledLocations);
 
   /// emitDebugValues - Recreate DBG_VALUE instruction from data structures.
-  void emitDebugValues(VirtRegMap *VRM,
-                       LiveIntervals &LIS, const TargetInstrInfo &TRI);
+  void emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
+                       const TargetInstrInfo &TRI,
+                       const BitVector &SpilledLocations);
 
   /// getDebugLoc - Return DebugLoc of this UserValue.
   DebugLoc getDebugLoc() { return dl;}
 
   void print(raw_ostream &, const TargetRegisterInfo *);
 };
 
 /// LDVImpl - Implementation of the LiveDebugVariables pass.
class LDVImpl {
   /// userValues - All allocated UserValue instances.
   SmallVector<std::unique_ptr<UserValue>, 8> userValues;
 
   /// Map virtual register to eq class leader.
   using VRMap = DenseMap<unsigned, UserValue *>;
   VRMap virtRegToEqClass;
 
   /// Map user variable to eq class leader.
-  using UVMap = DenseMap<const MDNode *, UserValue *>;
+  using UVMap = DenseMap<const DILocalVariable *, UserValue *>;
   UVMap userVarMap;
 
   /// getUserValue - Find or create a UserValue.
-  UserValue *getUserValue(const MDNode *Var, const MDNode *Expr,
+  UserValue *getUserValue(const DILocalVariable *Var, const DIExpression *Expr,
                           bool IsIndirect, const DebugLoc &DL);
 
   /// lookupVirtReg - Find the EC leader for VirtReg or null.
   UserValue *lookupVirtReg(unsigned VirtReg);
 
   /// handleDebugValue - Add DBG_VALUE instruction to our maps.
   /// @param MI  DBG_VALUE instruction
   /// @param Idx Last valid SLotIndex before instruction.

 
 void UserValue::mapVirtRegs(LDVImpl *LDV) {
   for (unsigned i = 0, e = locations.size(); i != e; ++i)
     if (locations[i].isReg() &&
         TargetRegisterInfo::isVirtualRegister(locations[i].getReg()))
       LDV->mapVirtReg(locations[i].getReg(), this);
 }
 
-UserValue *LDVImpl::getUserValue(const MDNode *Var, const MDNode *Expr,
-                                 bool IsIndirect, const DebugLoc &DL) {
+UserValue *LDVImpl::getUserValue(const DILocalVariable *Var,
+                                 const DIExpression *Expr, bool IsIndirect,
+                                 const DebugLoc &DL) {
   UserValue *&Leader = userVarMap[Var];
   if (Leader) {
     UserValue *UV = Leader->getLeader();
     Leader = UV;
     for (; UV; UV = UV->getNext())
       if (UV->match(Var, Expr, DL->getInlinedAt(), IsIndirect))
         return UV;
   }
bool LDVImpl::handleDebugValue(MachineInstr &MI, SlotIndex Idx) {
   if (MI.getNumOperands() != 4 ||
       !(MI.getOperand(1).isReg() || MI.getOperand(1).isImm()) ||
       !MI.getOperand(2).isMetadata()) {
     DEBUG(dbgs() << "Can't handle " << MI);
     return false;
   }
 
   // Get or create the UserValue for (variable,offset).
-  bool IsIndirect = MI.isIndirectDebugValue();
+  bool IsIndirect = MI.getOperand(1).isImm();
   if (IsIndirect)
     assert(MI.getOperand(1).getImm() == 0 && "DBG_VALUE with nonzero offset");
-  const MDNode *Var = MI.getDebugVariable();
-  const MDNode *Expr = MI.getDebugExpression();
+  const DILocalVariable *Var = MI.getDebugVariable();
+  const DIExpression *Expr = MI.getDebugExpression();
   //here.
   UserValue *UV = getUserValue(Var, Expr, IsIndirect, MI.getDebugLoc());
   UV->addDef(Idx, MI.getOperand(0));
   return true;
 }
 
 bool LDVImpl::collectDebugValues(MachineFunction &mf) {
   bool Changed = false;

 }
 
 void LiveDebugVariables::
 splitRegister(unsigned OldReg, ArrayRef<unsigned> NewRegs, LiveIntervals &LIS) {
   if (pImpl)
     static_cast<LDVImpl*>(pImpl)->splitRegister(OldReg, NewRegs);
 }
 
-void
-UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) {
+void UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI,
+                                 BitVector &SpilledLocations) {
+  SpilledLocations.resize(locations.size());
+
   // Iterate over locations in reverse makes it easier to handle coalescing.
   for (unsigned i = locations.size(); i ; --i) {
     unsigned LocNo = i-1;
     MachineOperand &Loc = locations[LocNo];
     // Only virtual registers are rewritten.
     if (!Loc.isReg() || !Loc.getReg() ||
         !TargetRegisterInfo::isVirtualRegister(Loc.getReg()))
       continue;
     unsigned VirtReg = Loc.getReg();
     if (VRM.isAssignedReg(VirtReg) &&
         TargetRegisterInfo::isPhysicalRegister(VRM.getPhys(VirtReg))) {
       // This can create a %noreg operand in rare cases when the sub-register
       // index is no longer available. That means the user value is in a
       // non-existent sub-register, and %noreg is exactly what we want.
       Loc.substPhysReg(VRM.getPhys(VirtReg), TRI);
     } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) {
       // FIXME: Translate SubIdx to a stackslot offset.
       Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg));
+      SpilledLocations.set(LocNo);
     } else {
       Loc.setReg(0);
       Loc.setSubReg(0);
     }
     coalesceLocation(LocNo);
   }
 }
 
findInsertLocation(MachineBasicBlock *MBB, SlotIndex Idx,
   }
 
   // Don't insert anything after the first terminator, though.
   return MI->isTerminator() ? MBB->getFirstTerminator() :
                               std::next(MachineBasicBlock::iterator(MI));
 }
 
 void UserValue::insertDebugValue(MachineBasicBlock *MBB, SlotIndex Idx,
-                                 unsigned LocNo,
+                                 unsigned LocNo, bool Spilled,
                                  LiveIntervals &LIS,
                                  const TargetInstrInfo &TII) {
   MachineBasicBlock::iterator I = findInsertLocation(MBB, Idx, LIS);
   MachineOperand &Loc = locations[LocNo];
   ++NumInsertedDebugValues;
 
   assert(cast<DILocalVariable>(Variable)
              ->isValidLocationForIntrinsic(getDebugLoc()) &&
          "Expected inlined-at fields to agree");
-  if (Loc.isReg())
-    BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE),
-            IsIndirect, Loc.getReg(), Variable, Expression);
-  else
+
+  // If the location was spilled, the new DBG_VALUE will be indirect. If the
+  // original DBG_VALUE was indirect, we need to add DW_OP_deref to indicate
+  // that the original virtual register was a pointer.
+  bool NewIndirect = IsIndirect || Spilled;
+  const DIExpression *Expr = Expression;
+  if (Spilled && IsIndirect)
+    Expr = DIExpression::prepend(Expr, DIExpression::WithDeref);
+
+  MachineInstrBuilder MIB =
       BuildMI(*MBB, I, getDebugLoc(), TII.get(TargetOpcode::DBG_VALUE))
-        .add(Loc)
-        .addImm(0U)
-        .addMetadata(Variable)
-        .addMetadata(Expression);
+          .add(Loc);
+  if (NewIndirect)
+    MIB.addImm(0U);
+  else
+    MIB.addReg(0U, RegState::Debug);
+  MIB.addMetadata(Variable).addMetadata(Expr);
 }
 
 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveIntervals &LIS,
-                                const TargetInstrInfo &TII) {
+                                const TargetInstrInfo &TII,
+                                const BitVector &SpilledLocations) {
   MachineFunction::iterator MFEnd = VRM->getMachineFunction().end();
 
   for (LocMap::const_iterator I = locInts.begin(); I.valid();) {
     SlotIndex Start = I.start();
     SlotIndex Stop = I.stop();
     unsigned LocNo = I.value();
+    bool Spilled = LocNo != ~0U ? SpilledLocations.test(LocNo) : false;
 
     // If the interval start was trimmed to the lexical scope insert the
     // DBG_VALUE at the previous index (otherwise it appears after the
     // first instruction in the range).
     if (trimmedDefs.count(Start))
       Start = Start.getPrevIndex();
 
     DEBUG(dbgs() << "\t[" << Start << ';' << Stop << "):" << LocNo);
     MachineFunction::iterator MBB = LIS.getMBBFromIndex(Start)->getIterator();
     SlotIndex MBBEnd = LIS.getMBBEndIdx(&*MBB);
 
     DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
-    insertDebugValue(&*MBB, Start, LocNo, LIS, TII);
+    insertDebugValue(&*MBB, Start, LocNo, Spilled, LIS, TII);
     // This interval may span multiple basic blocks.
     // Insert a DBG_VALUE into each one.
     while(Stop > MBBEnd) {
       // Move to the next block.
       Start = MBBEnd;
       if (++MBB == MFEnd)
         break;
       MBBEnd = LIS.getMBBEndIdx(&*MBB);
       DEBUG(dbgs() << " BB#" << MBB->getNumber() << '-' << MBBEnd);
-      insertDebugValue(&*MBB, Start, LocNo, LIS, TII);
+      insertDebugValue(&*MBB, Start, LocNo, Spilled, LIS, TII);
     }
     DEBUG(dbgs() << '\n');
     if (MBB == MFEnd)
       break;
 
     ++I;
   }
 }
 
 void LDVImpl::emitDebugValues(VirtRegMap *VRM) {
   DEBUG(dbgs() << "********** EMITTING LIVE DEBUG VARIABLES **********\n");
   if (!MF)
     return;
   const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
+  BitVector SpilledLocations;
   for (unsigned i = 0, e = userValues.size(); i != e; ++i) {
     DEBUG(userValues[i]->print(dbgs(), TRI));
-    userValues[i]->rewriteLocations(*VRM, *TRI);
-    userValues[i]->emitDebugValues(VRM, *LIS, *TII);
+    userValues[i]->rewriteLocations(*VRM, *TRI, SpilledLocations);
+    userValues[i]->emitDebugValues(VRM, *LIS, *TII, SpilledLocations);
   }
   EmitDone = true;
 }
 
 void LiveDebugVariables::emitDebugValues(VirtRegMap *VRM) {
   if (pImpl)
     static_cast<LDVImpl*>(pImpl)->emitDebugValues(VRM);
 }

llvm/test/DebugInfo/X86/bbjoin.ll

 ; RUN: llc -mtriple=x86_64-apple-macosx10.9.0 %s -stop-after=livedebugvars \
 ; RUN:   -o - | FileCheck %s
 ; Generated from:
 ; void g(int *);
 ; int f() {
 ;   int x = 23;
 ;   g(&x);
 ;   if (x == 42)
 ;     ++x;
 ;   return x; // check that x is not a constant here.
 ; }
 ; CHECK: ![[X:.*]] = !DILocalVariable(name: "x",
 ; CHECK: bb.0.entry:
-; CHECK:   DBG_VALUE 23, 0, ![[X]],
+; CHECK:   DBG_VALUE 23, debug-use _, ![[X]],
 ; CHECK:   DBG_VALUE %rsp, 0, ![[X]], !DIExpression(DW_OP_plus_uconst, 4, DW_OP_deref),
 ; CHECK: bb.1.if.then:
-; CHECK:   DBG_VALUE 43, 0, ![[X]],
+; CHECK:   DBG_VALUE 43, debug-use _, ![[X]],
 ; CHECK: bb.2.if.end:
-; CHECK-NOT:  DBG_VALUE 23, 0, ![[X]],
+; CHECK-NOT:  DBG_VALUE 23, debug-use _, ![[X]],
 ; CHECK:   RETQ %eax
 
 target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-apple-macosx10.11.0"
 
 ; Function Attrs: nounwind ssp uwtable
 define i32 @f() #0 !dbg !4 {
 entry:

llvm/test/DebugInfo/X86/spill-indirect-nrvo.ll

+; RUN: llc < %s | FileCheck %s
+
+; Make sure we insert DW_OP_deref when spilling indirect DBG_VALUE instructions.
+
+; C++ source:
+; #define FORCE_SPILL() \
+;   __asm volatile("" : : : \
+;                    "rax", "rbx", "rcx", "rdx", "rsi", "rdi", "rbp", "r8", \
+;                    "r9", "r10", "r11", "r12", "r13", "r14", "r15")
+; struct string {
+;   string();
+;   string(int i);
+;   ~string();
+;   int i = 0;
+; };
+; string get_string() {
+;   string result = 3;
+;   FORCE_SPILL();
+;   return result;
+; }
+
+; CHECK-LABEL: _Z10get_stringv:
+; CHECK: #DEBUG_VALUE: get_string:result <- [%RDI+0]
+; CHECK: movq   %rdi, 16(%rsp)          # 8-byte Spill
+; CHECK: #DEBUG_VALUE: get_string:result <- [DW_OP_plus_uconst 16, DW_OP_deref] [%RSP+0]
+; CHECK: callq  _ZN6stringC1Ei
+; CHECK: #APP
+; CHECK: #NO_APP
+
+; ModuleID = 't.cpp'
+source_filename = "t.cpp"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64--linux"
+
+%struct.string = type { i32 }
+
+; Function Attrs: uwtable
+define void @_Z10get_stringv(%struct.string* noalias sret %agg.result) #0 !dbg !7 {
+entry:
+  %nrvo = alloca i1, align 1
+  store i1 false, i1* %nrvo, align 1, !dbg !24
+  call void @llvm.dbg.declare(metadata %struct.string* %agg.result, metadata !23, metadata !DIExpression()), !dbg !25
+  call void @_ZN6stringC1Ei(%struct.string* %agg.result, i32 3), !dbg !26
+  call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #3, !dbg !27, !srcloc !28
+  store i1 true, i1* %nrvo, align 1, !dbg !29
+  %nrvo.val = load i1, i1* %nrvo, align 1, !dbg !30
+  br i1 %nrvo.val, label %nrvo.skipdtor, label %nrvo.unused, !dbg !30
+
+nrvo.unused:                                      ; preds = %entry
+  call void @_ZN6stringD1Ev(%struct.string* %agg.result), !dbg !30
+  br label %nrvo.skipdtor, !dbg !30
+
+nrvo.skipdtor:                                    ; preds = %nrvo.unused, %entry
+  ret void, !dbg !30
+}
+
+; Function Attrs: nounwind readnone speculatable
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+
+declare void @_ZN6stringC1Ei(%struct.string*, i32) unnamed_addr
+
+declare void @_ZN6stringD1Ev(%struct.string*) unnamed_addr
+
+attributes #0 = { uwtable }
+attributes #1 = { nounwind readnone speculatable }
+attributes #3 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4, !5}
+!llvm.ident = !{!6}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 6.0.0 ", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+!1 = !DIFile(filename: "t.cpp", directory: "C:\5Csrc\5Cllvm-project\5Cbuild")
+!2 = !{}
+!3 = !{i32 2, !"Dwarf Version", i32 4}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = !{i32 1, !"wchar_size", i32 4}
+!6 = !{!"clang version 6.0.0 "}
+!7 = distinct !DISubprogram(name: "get_string", linkageName: "_Z10get_stringv", scope: !1, file: !1, line: 13, type: !8, isLocal: false, isDefinition: true, scopeLine: 13, flags: DIFlagPrototyped, isOptimized: true, unit: !0, variables: !22)
+!8 = !DISubroutineType(types: !9)
+!9 = !{!10}
+!10 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "string", file: !1, line: 7, size: 32, elements: !11, identifier: "_ZTS6string")
+!11 = !{!12, !14, !18, !21}
+!12 = !DIDerivedType(tag: DW_TAG_member, name: "i", scope: !10, file: !1, line: 11, baseType: !13, size: 32)
+!13 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!14 = !DISubprogram(name: "string", scope: !10, file: !1, line: 8, type: !15, isLocal: false, isDefinition: false, scopeLine: 8, flags: DIFlagPrototyped, isOptimized: true)
+!15 = !DISubroutineType(types: !16)
+!16 = !{null, !17}
+!17 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !10, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
+!18 = !DISubprogram(name: "string", scope: !10, file: !1, line: 9, type: !19, isLocal: false, isDefinition: false, scopeLine: 9, flags: DIFlagPrototyped, isOptimized: true)
+!19 = !DISubroutineType(types: !20)
+!20 = !{null, !17, !13}
+!21 = !DISubprogram(name: "~string", scope: !10, file: !1, line: 10, type: !15, isLocal: false, isDefinition: false, scopeLine: 10, flags: DIFlagPrototyped, isOptimized: true)
+!22 = !{!23}
+!23 = !DILocalVariable(name: "result", scope: !7, file: !1, line: 14, type: !10)
+!24 = !DILocation(line: 14, column: 3, scope: !7)
+!25 = !DILocation(line: 14, column: 10, scope: !7)
+!26 = !DILocation(line: 14, column: 19, scope: !7)
+!27 = !DILocation(line: 15, column: 3, scope: !7)
+!28 = !{i32 -2147471175}
+!29 = !DILocation(line: 16, column: 3, scope: !7)
+!30 = !DILocation(line: 17, column: 1, scope: !7)

llvm/test/DebugInfo/X86/spill-nontrivial-param.ll

+; RUN: llc < %s | FileCheck %s
+
+; Make sure we insert DW_OP_deref when spilling indirect DBG_VALUE instructions.
+; In this example, 'nt' is passed by address because it is not trivially
+; copyable. When we spill the physical argument register at the barrier, we need
+; to insert DW_OP_deref.
+
+; #define FORCE_SPILL() \
+;   __asm volatile("" : : : \
+;                    "rax", "rbx", "rcx", "rdx", "rsi", "rdi", "rbp", "r8", \
+;                    "r9", "r10", "r11", "r12", "r13", "r14", "r15")
+; struct NonTrivial {
+;   NonTrivial();
+;   ~NonTrivial();
+;   int i;
+; };
+; int foo(NonTrivial nt) {
+;   FORCE_SPILL();
+;   return nt.i;
+; }
+
+; CHECK-LABEL: _Z3foo10NonTrivial:
+; CHECK: #DEBUG_VALUE: foo:nt <- [%RDI+0]
+; CHECK: movq    %rdi, -8(%rsp)          # 8-byte Spill
+; CHECK: #DEBUG_VALUE: foo:nt <- [DW_OP_constu 8, DW_OP_minus, DW_OP_deref] [%RSP+0]
+; CHECK: #APP
+; CHECK: #NO_APP
+; CHECK: movq    -8(%rsp), %rax          # 8-byte Reload
+; CHECK: movl    (%rax), %eax
+
+; ModuleID = 't.cpp'
+source_filename = "t.cpp"
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64--linux"
+
+%struct.NonTrivial = type { i32 }
+
+; Function Attrs: nounwind uwtable
+define i32 @_Z3foo10NonTrivial(%struct.NonTrivial* nocapture readonly %nt) local_unnamed_addr #0 !dbg !7 {
+entry:
+  tail call void @llvm.dbg.declare(metadata %struct.NonTrivial* %nt, metadata !20, metadata !DIExpression()), !dbg !21
+  tail call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{dirflag},~{fpsr},~{flags}"() #2, !dbg !22, !srcloc !23
+  %i = getelementptr inbounds %struct.NonTrivial, %struct.NonTrivial* %nt, i64 0, i32 0, !dbg !24
+  %0 = load i32, i32* %i, align 4, !dbg !24, !tbaa !25
+  ret i32 %0, !dbg !30
+}
+
+; Function Attrs: nounwind readnone speculatable
+declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
+
+attributes #0 = { nounwind uwtable }
+attributes #1 = { nounwind readnone speculatable }
+attributes #2 = { nounwind }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3, !4, !5}
+!llvm.ident = !{!6}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C_plus_plus, file: !1, producer: "clang version 6.0.0 ", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
+!1 = !DIFile(filename: "t.cpp", directory: "C:\5Csrc\5Cllvm-project\5Cbuild")
+!2 = !{}
+!3 = !{i32 2, !"Dwarf Version", i32 4}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = !{i32 1, !"wchar_size", i32 4}
+!6 = !{!"clang version 6.0.0 "}
+!7 = distinct !DISubprogram(name: "foo", linkageName: "_Z3foo10NonTrivial", scope: !1, file: !1, line: 10, type: !8, isLocal: false, isDefinition: true, scopeLine: 10, flags: DIFlagPrototyped, isOptimized: true, unit: !0, variables: !19)
+!8 = !DISubroutineType(types: !9)
+!9 = !{!10, !11}
+!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!11 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "NonTrivial", file: !1, line: 5, size: 32, elements: !12, identifier: "_ZTS10NonTrivial")
+!12 = !{!13, !14, !18}
+!13 = !DIDerivedType(tag: DW_TAG_member, name: "i", scope: !11, file: !1, line: 8, baseType: !10, size: 32)
+!14 = !DISubprogram(name: "NonTrivial", scope: !11, file: !1, line: 6, type: !15, isLocal: false, isDefinition: false, scopeLine: 6, flags: DIFlagPrototyped, isOptimized: true)
+!15 = !DISubroutineType(types: !16)
+!16 = !{null, !17}
+!17 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 64, flags: DIFlagArtificial | DIFlagObjectPointer)
+!18 = !DISubprogram(name: "~NonTrivial", scope: !11, file: !1, line: 7, type: !15, isLocal: false, isDefinition: false, scopeLine: 7, flags: DIFlagPrototyped, isOptimized: true)
+!19 = !{!20}
+!20 = !DILocalVariable(name: "nt", arg: 1, scope: !7, file: !1, line: 10, type: !11)
+!21 = !DILocation(line: 10, column: 20, scope: !7)
+!22 = !DILocation(line: 11, column: 3, scope: !7)
+!23 = !{i32 -2147471481}
+!24 = !DILocation(line: 12, column: 13, scope: !7)
+!25 = !{!26, !27, i64 0}
+!26 = !{!"_ZTS10NonTrivial", !27, i64 0}
+!27 = !{!"int", !28, i64 0}
+!28 = !{!"omnipotent char", !29, i64 0}
+!29 = !{!"Simple C++ TBAA"}
+!30 = !DILocation(line: 12, column: 3, scope: !7)