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[mips] Correcting operand range for DINSM instruction
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Authored by abeserminji on Sep 11 2017, 5:59 AM.

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Summary

This patch corrects the definition of the DINSM instruction. Specification for DINSM instruction for Mips64 says that size operand should be 2 <= size <= 64, but it is defined as uimm5_inssize_plus1 which gives range of 1 .. 32.

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rL LLVM

Event Timeline

abeserminji created this revision.Sep 11 2017, 5:59 AM
sdardis edited edge metadata.Sep 11 2017, 6:10 AM

Can you add a test case along the lines of:

dinsm $4, $5, 31, 33

to test/MC/Mips/mips64r{2|6}/valid.s

I've noticed that the dext and dins family of instructions are not tested in those files.

Should I add tests for dext family of instructions to a new patch? Or is it ok to add them to this patch?

Adding tests for the dext/dins family of instructions should be submitted as a separate patch. This patch just requires tests for dinsm.

Added test line for dinsm instruction to test/MC/Mips/mips64r{2|6}/valid.s

sdardis accepted this revision.Sep 12 2017, 5:43 AM

LGTM with inline nit addressed.

test/MC/Mips/mips64r2/valid.s
109 ↗(On Diff #114797)

This should be 34, as 32 is a valid operand for uimm5_inssize_plus1. 34 is not valid for uimm5_inssize_plus1 but is valid by the ISA description of the instruction.

test/MC/Mips/mips64r6/valid.s
117 ↗(On Diff #114797)

See my previous comment.

This revision is now accepted and ready to land.Sep 12 2017, 5:43 AM
abeserminji marked 2 inline comments as done.

Comment resolved.

This revision was automatically updated to reflect the committed changes.