Update to use enum classes for various ARM *Kind enums

[fhahn]

Summary

This updates the relevant Clang parts for the LLVM change D35882.

[rovka]

Looks entirely mechanical, I don't see any problem with it (just a couple of nits).

lib/Basic/Targets/AArch64.cpp

94

My eyes might be deceiving me, but did you run clang-format?

lib/Driver/ToolChains/Darwin.cpp

71

Nitpick: The rename seems unnecessary (and anyway the file is inconsistent between Arch, ArchKind and AK).

[fhahn]

Addressed reviewer comments

[fhahn]

lib/Basic/Targets/AArch64.cpp

94

Yes, it fits on a single line now, excellent spot :)

lib/Driver/ToolChains/Darwin.cpp

71

Agreed.

lib/Basic/Targets/AArch64.cpp

bool AArch64TargetInfo::setABI(const std::string &Name) {
 
   ABI = Name;
   return true;
 }
 
 bool AArch64TargetInfo::isValidCPUName(StringRef Name) const {
   return Name == "generic" ||
          llvm::AArch64::parseCPUArch(Name) !=
-             static_cast<unsigned>(llvm::AArch64::ArchKind::AK_INVALID);
+         llvm::AArch64::ArchKind::INVALID;
 }
 
 bool AArch64TargetInfo::setCPU(const std::string &Name) {
   return isValidCPUName(Name);
 }
 
 void AArch64TargetInfo::getTargetDefinesARMV81A(const LangOptions &Opts,
                                                 MacroBuilder &Builder) const {
if (Crypto)
     Builder.defineMacro("__ARM_FEATURE_CRYPTO", "1");
 
   if (Unaligned)
     Builder.defineMacro("__ARM_FEATURE_UNALIGNED", "1");
 
   switch (ArchKind) {
   default:
     break;
-  case llvm::AArch64::ArchKind::AK_ARMV8_1A:
+  case llvm::AArch64::ArchKind::ARMV8_1A:
     getTargetDefinesARMV81A(Opts, Builder);
     break;
-  case llvm::AArch64::ArchKind::AK_ARMV8_2A:
+  case llvm::AArch64::ArchKind::ARMV8_2A:
     getTargetDefinesARMV82A(Opts, Builder);
     break;
   }
 
   // All of the __sync_(bool|val)_compare_and_swap_(1|2|4|8) builtins work.
   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
   Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");

 
 bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
                                              DiagnosticsEngine &Diags) {
   FPU = FPUMode;
   CRC = 0;
   Crypto = 0;
   Unaligned = 1;
   HasFullFP16 = 0;
-  ArchKind = llvm::AArch64::ArchKind::AK_ARMV8A;
+  ArchKind = llvm::AArch64::ArchKind::ARMV8A;
 
   for (const auto &Feature : Features) {
     if (Feature == "+neon")
       FPU |= NeonMode;
     if (Feature == "+sve")
       FPU |= SveMode;
     if (Feature == "+crc")
       CRC = 1;
     if (Feature == "+crypto")
       Crypto = 1;
     if (Feature == "+strict-align")
       Unaligned = 0;
     if (Feature == "+v8.1a")
-      ArchKind = llvm::AArch64::ArchKind::AK_ARMV8_1A;
+      ArchKind = llvm::AArch64::ArchKind::ARMV8_1A;
     if (Feature == "+v8.2a")
-      ArchKind = llvm::AArch64::ArchKind::AK_ARMV8_2A;
+      ArchKind = llvm::AArch64::ArchKind::ARMV8_2A;
     if (Feature == "+fullfp16")
       HasFullFP16 = 1;
   }
 
   setDataLayout();
 
   return true;
 }

lib/Basic/Targets/ARM.h

class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public TargetInfo {
 
   std::string ABI, CPU;
 
   StringRef CPUProfile;
   StringRef CPUAttr;
 
   enum { FP_Default, FP_VFP, FP_Neon } FPMath;
 
-  unsigned ArchISA;
-  unsigned ArchKind = llvm::ARM::AK_ARMV4T;
-  unsigned ArchProfile;
+  llvm::ARM::ISAKind ArchISA;
+  llvm::ARM::ArchKind ArchKind = llvm::ARM::ArchKind::ARMV4T;
+  llvm::ARM::ProfileKind ArchProfile;
   unsigned ArchVersion;
 
   unsigned FPU : 5;
 
   unsigned IsAAPCS : 1;
   unsigned HWDiv : 2;
 
   // Initialized via features.
class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public TargetInfo {
   uint32_t HW_FP;
 
   static const Builtin::Info BuiltinInfo[];
 
   void setABIAAPCS();
   void setABIAPCS(bool IsAAPCS16);
 
   void setArchInfo();
-  void setArchInfo(unsigned Kind);
+  void setArchInfo(llvm::ARM::ArchKind Kind);
 
   void setAtomic();
 
   bool isThumb() const;
   bool supportsThumb() const;
   bool supportsThumb2() const;
 
   StringRef getCPUAttr() const;

lib/Basic/Targets/ARM.cpp

void ARMTargetInfo::setABIAPCS(bool IsAAPCS16) {
   // FIXME: Override "preferred align" for double and long long.
 }
 
 void ARMTargetInfo::setArchInfo() {
   StringRef ArchName = getTriple().getArchName();
 
   ArchISA = llvm::ARM::parseArchISA(ArchName);
   CPU = llvm::ARM::getDefaultCPU(ArchName);
-  unsigned AK = llvm::ARM::parseArch(ArchName);
-  if (AK != llvm::ARM::AK_INVALID)
+  llvm::ARM::ArchKind AK = llvm::ARM::parseArch(ArchName);
+  if (AK != llvm::ARM::ArchKind::INVALID)
     ArchKind = AK;
   setArchInfo(ArchKind);
 }
 
-void ARMTargetInfo::setArchInfo(unsigned Kind) {
+void ARMTargetInfo::setArchInfo(llvm::ARM::ArchKind Kind) {
   StringRef SubArch;
 
   // cache TargetParser info
   ArchKind = Kind;
   SubArch = llvm::ARM::getSubArch(ArchKind);
   ArchProfile = llvm::ARM::parseArchProfile(SubArch);
   ArchVersion = llvm::ARM::parseArchVersion(SubArch);
 
   // cache CPU related strings
   CPUAttr = getCPUAttr();
   CPUProfile = getCPUProfile();
 }
 
 void ARMTargetInfo::setAtomic() {
   // when triple does not specify a sub arch,
   // then we are not using inline atomics
   bool ShouldUseInlineAtomic =
-      (ArchISA == llvm::ARM::IK_ARM && ArchVersion >= 6) ||
-      (ArchISA == llvm::ARM::IK_THUMB && ArchVersion >= 7);
+      (ArchISA == llvm::ARM::ISAKind::ARM && ArchVersion >= 6) ||
+      (ArchISA == llvm::ARM::ISAKind::THUMB && ArchVersion >= 7);
   // Cortex M does not support 8 byte atomics, while general Thumb2 does.
-  if (ArchProfile == llvm::ARM::PK_M) {
+  if (ArchProfile == llvm::ARM::ProfileKind::M) {
     MaxAtomicPromoteWidth = 32;
     if (ShouldUseInlineAtomic)
       MaxAtomicInlineWidth = 32;
   } else {
     MaxAtomicPromoteWidth = 64;
     if (ShouldUseInlineAtomic)
       MaxAtomicInlineWidth = 64;
   }
 }
 
-bool ARMTargetInfo::isThumb() const { return (ArchISA == llvm::ARM::IK_THUMB); }
+bool ARMTargetInfo::isThumb() const {
+  return ArchISA == llvm::ARM::ISAKind::THUMB;
+}
 
 bool ARMTargetInfo::supportsThumb() const {
   return CPUAttr.count('T') || ArchVersion >= 6;
 }
 
 bool ARMTargetInfo::supportsThumb2() const {
   return CPUAttr.equals("6T2") ||
          (ArchVersion >= 7 && !CPUAttr.equals("8M_BASE"));
 }
 
 StringRef ARMTargetInfo::getCPUAttr() const {
   // For most sub-arches, the build attribute CPU name is enough.
   // For Cortex variants, it's slightly different.
   switch (ArchKind) {
   default:
     return llvm::ARM::getCPUAttr(ArchKind);
-  case llvm::ARM::AK_ARMV6M:
+  case llvm::ARM::ArchKind::ARMV6M:
     return "6M";
-  case llvm::ARM::AK_ARMV7S:
+  case llvm::ARM::ArchKind::ARMV7S:
     return "7S";
-  case llvm::ARM::AK_ARMV7A:
+  case llvm::ARM::ArchKind::ARMV7A:
     return "7A";
-  case llvm::ARM::AK_ARMV7R:
+  case llvm::ARM::ArchKind::ARMV7R:
     return "7R";
-  case llvm::ARM::AK_ARMV7M:
+  case llvm::ARM::ArchKind::ARMV7M:
     return "7M";
-  case llvm::ARM::AK_ARMV7EM:
+  case llvm::ARM::ArchKind::ARMV7EM:
     return "7EM";
-  case llvm::ARM::AK_ARMV7VE:
+  case llvm::ARM::ArchKind::ARMV7VE:
     return "7VE";
-  case llvm::ARM::AK_ARMV8A:
+  case llvm::ARM::ArchKind::ARMV8A:
     return "8A";
-  case llvm::ARM::AK_ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_1A:
     return "8_1A";
-  case llvm::ARM::AK_ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
     return "8_2A";
-  case llvm::ARM::AK_ARMV8MBaseline:
+  case llvm::ARM::ArchKind::ARMV8MBaseline:
     return "8M_BASE";
-  case llvm::ARM::AK_ARMV8MMainline:
+  case llvm::ARM::ArchKind::ARMV8MMainline:
     return "8M_MAIN";
-  case llvm::ARM::AK_ARMV8R:
+  case llvm::ARM::ArchKind::ARMV8R:
     return "8R";
   }
 }
 
 StringRef ARMTargetInfo::getCPUProfile() const {
   switch (ArchProfile) {
-  case llvm::ARM::PK_A:
+  case llvm::ARM::ProfileKind::A:
     return "A";
-  case llvm::ARM::PK_R:
+  case llvm::ARM::ProfileKind::R:
     return "R";
-  case llvm::ARM::PK_M:
+  case llvm::ARM::ProfileKind::M:
     return "M";
   default:
     return "";
   }
 }
 
 ARMTargetInfo::ARMTargetInfo(const llvm::Triple &Triple,
                              const TargetOptions &Opts)
ARMTargetInfo::ARMTargetInfo(const llvm::Triple &Triple,
   // FIXME: This duplicates code from the driver that sets the -target-abi
   // option - this code is used if -target-abi isn't passed and should
   // be unified in some way.
   if (Triple.isOSBinFormatMachO()) {
     // The backend is hardwired to assume AAPCS for M-class processors, ensure
     // the frontend matches that.
     if (Triple.getEnvironment() == llvm::Triple::EABI ||
         Triple.getOS() == llvm::Triple::UnknownOS ||
-        ArchProfile == llvm::ARM::PK_M) {
+        ArchProfile == llvm::ARM::ProfileKind::M) {
       setABI("aapcs");
     } else if (Triple.isWatchABI()) {
       setABI("aapcs16");
     } else {
       setABI("apcs-gnu");
     }
   } else if (Triple.isOSWindows()) {
     // FIXME: this is invalid for WindowsCE

 }
 
 // FIXME: This should be based on Arch attributes, not CPU names.
 bool ARMTargetInfo::initFeatureMap(
     llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
     const std::vector<std::string> &FeaturesVec) const {
 
   std::vector<StringRef> TargetFeatures;
-  unsigned Arch = llvm::ARM::parseArch(getTriple().getArchName());
+  llvm::ARM::ArchKind Arch = llvm::ARM::parseArch(getTriple().getArchName());
 
   // get default FPU features
   unsigned FPUKind = llvm::ARM::getDefaultFPU(CPU, Arch);
   llvm::ARM::getFPUFeatures(FPUKind, TargetFeatures);
 
   // get default Extension features
   unsigned Extensions = llvm::ARM::getDefaultExtensions(CPU, Arch);
   llvm::ARM::getExtensionFeatures(Extensions, TargetFeatures);
for (const auto &Feature : Features) {
     } else if (Feature == "+fp16") {
       HW_FP |= HW_FP_HP;
     }
   }
   HW_FP &= ~HW_FP_remove;
 
   switch (ArchVersion) {
   case 6:
-    if (ArchProfile == llvm::ARM::PK_M)
+    if (ArchProfile == llvm::ARM::ProfileKind::M)
       LDREX = 0;
-    else if (ArchKind == llvm::ARM::AK_ARMV6K)
+    else if (ArchKind == llvm::ARM::ArchKind::ARMV6K)
       LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B;
     else
       LDREX = LDREX_W;
     break;
   case 7:
-    if (ArchProfile == llvm::ARM::PK_M)
+    if (ArchProfile == llvm::ARM::ProfileKind::M)
       LDREX = LDREX_W | LDREX_H | LDREX_B;
     else
       LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B;
     break;
   case 8:
     LDREX = LDREX_D | LDREX_W | LDREX_H | LDREX_B;
   }
 
return llvm::StringSwitch<bool>(Feature)
       .Case("vfp", FPU && !SoftFloat)
       .Case("hwdiv", HWDiv & HWDivThumb)
       .Case("hwdiv-arm", HWDiv & HWDivARM)
       .Default(false);
 }
 
 bool ARMTargetInfo::isValidCPUName(StringRef Name) const {
   return Name == "generic" ||
-         llvm::ARM::parseCPUArch(Name) != llvm::ARM::AK_INVALID;
+         llvm::ARM::parseCPUArch(Name) != llvm::ARM::ArchKind::INVALID;
 }
 
 bool ARMTargetInfo::setCPU(const std::string &Name) {
   if (Name != "generic")
     setArchInfo(llvm::ARM::parseCPUArch(Name));
 
-  if (ArchKind == llvm::ARM::AK_INVALID)
+  if (ArchKind == llvm::ARM::ArchKind::INVALID)
     return false;
   setAtomic();
   CPU = Name;
   return true;
 }
 
 bool ARMTargetInfo::setFPMath(StringRef Name) {
   if (Name == "neon") {
if (ArchVersion >= 8) {
     Builder.defineMacro("__ARM_FEATURE_NUMERIC_MAXMIN", "1");
     // ACLE 6.5.9 Directed Rounding
     Builder.defineMacro("__ARM_FEATURE_DIRECTED_ROUNDING", "1");
   }
 
   // __ARM_ARCH_ISA_ARM is defined to 1 if the core supports the ARM ISA.  It
   // is not defined for the M-profile.
   // NOTE that the default profile is assumed to be 'A'
-  if (CPUProfile.empty() || ArchProfile != llvm::ARM::PK_M)
+  if (CPUProfile.empty() || ArchProfile != llvm::ARM::ProfileKind::M)
     Builder.defineMacro("__ARM_ARCH_ISA_ARM", "1");
 
   // __ARM_ARCH_ISA_THUMB is defined to 1 if the core supports the original
   // Thumb ISA (including v6-M and v8-M Baseline).  It is set to 2 if the
   // core supports the Thumb-2 ISA as found in the v6T2 architecture and all
   // v7 and v8 architectures excluding v8-M Baseline.
   if (supportsThumb2())
     Builder.defineMacro("__ARM_ARCH_ISA_THUMB", "2");
void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
   }
 
   if ((!SoftFloat && !SoftFloatABI) || ABI == "aapcs-vfp" || ABI == "aapcs16")
     Builder.defineMacro("__ARM_PCS_VFP", "1");
 
   if (SoftFloat)
     Builder.defineMacro("__SOFTFP__");
 
-  if (ArchKind == llvm::ARM::AK_XSCALE)
+  if (ArchKind == llvm::ARM::ArchKind::XSCALE)
     Builder.defineMacro("__XSCALE__");
 
   if (isThumb()) {
     Builder.defineMacro("__THUMBEL__");
     Builder.defineMacro("__thumb__");
     if (supportsThumb2())
       Builder.defineMacro("__thumb2__");
   }
if (DSP || SAT)
     Builder.defineMacro("__ARM_FEATURE_QBIT", "1");
 
   if (Opts.UnsafeFPMath)
     Builder.defineMacro("__ARM_FP_FAST", "1");
 
   switch (ArchKind) {
   default:
     break;
-  case llvm::ARM::AK_ARMV8_1A:
+  case llvm::ARM::ArchKind::ARMV8_1A:
     getTargetDefinesARMV81A(Opts, Builder);
     break;
-  case llvm::ARM::AK_ARMV8_2A:
+  case llvm::ARM::ArchKind::ARMV8_2A:
     getTargetDefinesARMV82A(Opts, Builder);
     break;
   }
 }
 
 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
 #define BUILTIN(ID, TYPE, ATTRS)                                               \
   {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},

lib/Driver/ToolChain.cpp

case llvm::Triple::thumbeb: {
     if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
       MArch = A->getValue();
     std::string CPU =
         Triple.isOSBinFormatMachO()
             ? tools::arm::getARMCPUForMArch(MArch, Triple).str()
             : tools::arm::getARMTargetCPU(MCPU, MArch, Triple);
     StringRef Suffix =
       tools::arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
-    bool IsMProfile = ARM::parseArchProfile(Suffix) == ARM::PK_M;
+    bool IsMProfile = ARM::parseArchProfile(Suffix) == ARM::ProfileKind::M;
     bool ThumbDefault = IsMProfile || (ARM::parseArchVersion(Suffix) == 7 && 
                                        getTriple().isOSBinFormatMachO());
     // FIXME: this is invalid for WindowsCE
     if (getTriple().isOSWindows())
       ThumbDefault = true;
     std::string ArchName;
     if (IsBigEndian)
       ArchName = "armeb";

lib/Driver/ToolChains/Arch/AArch64.cpp

 static bool DecodeAArch64Mcpu(const Driver &D, StringRef Mcpu, StringRef &CPU,
                               std::vector<StringRef> &Features) {
   std::pair<StringRef, StringRef> Split = Mcpu.split("+");
   CPU = Split.first;
 
   if (CPU == "generic") {
     Features.push_back("+neon");
   } else {
-    unsigned ArchKind = llvm::AArch64::parseCPUArch(CPU);
+    llvm::AArch64::ArchKind ArchKind = llvm::AArch64::parseCPUArch(CPU);
     if (!llvm::AArch64::getArchFeatures(ArchKind, Features))
       return false;
 
     unsigned Extension = llvm::AArch64::getDefaultExtensions(CPU, ArchKind);
     if (!llvm::AArch64::getExtensionFeatures(Extension, Features))
       return false;
    }
 
   if (Split.second.size() && !DecodeAArch64Features(D, Split.second, Features))
     return false;
 
   return true;
 }
 
 static bool
 getAArch64ArchFeaturesFromMarch(const Driver &D, StringRef March,
                                 const ArgList &Args,
                                 std::vector<StringRef> &Features) {
   std::string MarchLowerCase = March.lower();
   std::pair<StringRef, StringRef> Split = StringRef(MarchLowerCase).split("+");
 
-  unsigned ArchKind = llvm::AArch64::parseArch(Split.first);
-  if (ArchKind == static_cast<unsigned>(llvm::AArch64::ArchKind::AK_INVALID) ||
+  llvm::AArch64::ArchKind ArchKind = llvm::AArch64::parseArch(Split.first);
+  if (ArchKind == llvm::AArch64::ArchKind::INVALID ||
       !llvm::AArch64::getArchFeatures(ArchKind, Features) ||
       (Split.second.size() && !DecodeAArch64Features(D, Split.second, Features)))
     return false;
 
   return true;
 }
 
 static bool

lib/Driver/ToolChains/Arch/ARM.cpp

 int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) {
   llvm::StringRef Arch = Triple.getArchName();
   return llvm::ARM::parseArchVersion(Arch);
 }
 
 // True if M-profile.
 bool arm::isARMMProfile(const llvm::Triple &Triple) {
   llvm::StringRef Arch = Triple.getArchName();
-  unsigned Profile = llvm::ARM::parseArchProfile(Arch);
-  return Profile == llvm::ARM::PK_M;
+  return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
 }
 
 // Get Arch/CPU from args.
 void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
                                 llvm::StringRef &CPU, bool FromAs) {
   if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
     CPU = A->getValue();
   if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))

 // to handle -march=native correctly.
 static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,
                              llvm::StringRef ArchName,
                              std::vector<StringRef> &Features,
                              const llvm::Triple &Triple) {
   std::pair<StringRef, StringRef> Split = ArchName.split("+");
 
   std::string MArch = arm::getARMArch(ArchName, Triple);
-  if (llvm::ARM::parseArch(MArch) == llvm::ARM::AK_INVALID ||
+  if (llvm::ARM::parseArch(MArch) == llvm::ARM::ArchKind::INVALID ||
       (Split.second.size() && !DecodeARMFeatures(D, Split.second, Features)))
     D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
 }
 
 // Check -mcpu=. Needs ArchName to handle -mcpu=generic.
 static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
                             llvm::StringRef CPUName, llvm::StringRef ArchName,
                             std::vector<StringRef> &Features,
void arm::getARMTargetFeatures(const ToolChain &TC,
   // Generate execute-only output (no data access to code sections).
   // This only makes sense for the compiler, not for the assembler.
   if (!ForAS) {
     // Supported only on ARMv6T2 and ARMv7 and above.
     // Cannot be combined with -mno-movt or -mlong-calls
     if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
       if (A->getOption().matches(options::OPT_mexecute_only)) {
         if (getARMSubArchVersionNumber(Triple) < 7 &&
-            llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::AK_ARMV6T2)
+            llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2)
               D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
         else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
           D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
         // Long calls create constant pool entries and have not yet been fixed up
         // to play nicely with execute-only. Hence, they cannot be used in
         // execute-only code for now
         else if (Arg *B = Args.getLastArg(options::OPT_mlong_calls, options::OPT_mno_long_calls)) {
           if (B->getOption().matches(options::OPT_mlong_calls))
std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch,
   return getARMCPUForMArch(Arch, Triple);
 }
 
 /// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
 /// CPU  (or Arch, if CPU is generic).
 // FIXME: This is redundant with -mcpu, why does LLVM use this.
 StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
                                        const llvm::Triple &Triple) {
-  unsigned ArchKind;
+  llvm::ARM::ArchKind ArchKind;
   if (CPU == "generic") {
     std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
     ArchKind = llvm::ARM::parseArch(ARMArch);
-    if (ArchKind == llvm::ARM::AK_INVALID)
+    if (ArchKind == llvm::ARM::ArchKind::INVALID)
       // In case of generic Arch, i.e. "arm",
       // extract arch from default cpu of the Triple
       ArchKind = llvm::ARM::parseCPUArch(Triple.getARMCPUForArch(ARMArch));
   } else {
     // FIXME: horrible hack to get around the fact that Cortex-A7 is only an
     // armv7k triple if it's actually been specified via "-arch armv7k".
     ArchKind = (Arch == "armv7k" || Arch == "thumbv7k")
-                          ? (unsigned)llvm::ARM::AK_ARMV7K
+                          ? llvm::ARM::ArchKind::ARMV7K
                           : llvm::ARM::parseCPUArch(CPU);
   }
-  if (ArchKind == llvm::ARM::AK_INVALID)
+  if (ArchKind == llvm::ARM::ArchKind::INVALID)
     return "";
   return llvm::ARM::getSubArch(ArchKind);
 }
 
 void arm::appendEBLinkFlags(const ArgList &Args, ArgStringList &CmdArgs,
                             const llvm::Triple &Triple) {
   if (Args.hasArg(options::OPT_r))
     return;
 
   // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker
   // to generate BE-8 executables.
   if (arm::getARMSubArchVersionNumber(Triple) >= 7 || arm::isARMMProfile(Triple))
     CmdArgs.push_back("--be8");
 }

lib/Driver/ToolChains/Darwin.cpp

return llvm::StringSwitch<llvm::Triple::ArchType>(Str)
       .Case("nvptx64", llvm::Triple::nvptx64)
       .Case("amdil", llvm::Triple::amdil)
       .Case("spir", llvm::Triple::spir)
       .Default(llvm::Triple::UnknownArch);
 }
 
 void darwin::setTripleTypeForMachOArchName(llvm::Triple &T, StringRef Str) {
   const llvm::Triple::ArchType Arch = getArchTypeForMachOArchName(Str);
-  unsigned ArchKind = llvm::ARM::parseArch(Str);
+  llvm::ARM::ArchKind AK = llvm::ARM::parseArch(Str);
   T.setArch(Arch);
 
   if (Str == "x86_64h")
     T.setArchName(Str);
-  else if (ArchKind == llvm::ARM::AK_ARMV6M ||
-           ArchKind == llvm::ARM::AK_ARMV7M ||
-           ArchKind == llvm::ARM::AK_ARMV7EM) {
+  else if (AK == llvm::ARM::ArchKind::ARMV6M ||
+           AK == llvm::ARM::ArchKind::ARMV7M ||
+           AK == llvm::ARM::ArchKind::ARMV7EM) {
     T.setOS(llvm::Triple::UnknownOS);
     T.setObjectFormat(llvm::Triple::MachO);
   }
 }
 
 void darwin::Assembler::ConstructJob(Compilation &C, const JobAction &JA,
                                      const InputInfo &Output,
                                      const InputInfoList &Inputs,
return llvm::StringSwitch<const char *>(Arch)
       .Cases("armv7em", "armv7e-m", "armv7em")
       .Cases("armv7k", "armv7-k", "armv7k")
       .Cases("armv7m", "armv7-m", "armv7m")
       .Cases("armv7s", "armv7-s", "armv7s")
       .Default(nullptr);
 }
 
 static const char *ArmMachOArchNameCPU(StringRef CPU) {
-  unsigned ArchKind = llvm::ARM::parseCPUArch(CPU);
-  if (ArchKind == llvm::ARM::AK_INVALID)
+  llvm::ARM::ArchKind AK = llvm::ARM::parseCPUArch(CPU);
+  if (AK == llvm::ARM::ArchKind::INVALID)
     return nullptr;
-  StringRef Arch = llvm::ARM::getArchName(ArchKind);
+  StringRef Arch = llvm::ARM::getArchName(AK);
 
   // FIXME: Make sure this MachO triple mangling is really necessary.
   // ARMv5* normalises to ARMv5.
   if (Arch.startswith("armv5"))
     Arch = Arch.substr(0, 5);
   // ARMv6*, except ARMv6M, normalises to ARMv6.
   else if (Arch.startswith("armv6") && !Arch.endswith("6m"))
     Arch = Arch.substr(0, 5);

lib/Driver/ToolChains/Gnu.cpp

static void findAndroidArmMultilibs(const Driver &D,
 
   Multilib::flags_list Flags;
   llvm::StringRef Arch = Args.getLastArgValue(options::OPT_march_EQ);
   bool IsArmArch = TargetTriple.getArch() == llvm::Triple::arm;
   bool IsThumbArch = TargetTriple.getArch() == llvm::Triple::thumb;
   bool IsV7SubArch = TargetTriple.getSubArch() == llvm::Triple::ARMSubArch_v7;
   bool IsThumbMode = IsThumbArch ||
       Args.hasFlag(options::OPT_mthumb, options::OPT_mno_thumb, false) ||
-      (IsArmArch && llvm::ARM::parseArchISA(Arch) == llvm::ARM::IK_THUMB);
+      (IsArmArch && llvm::ARM::parseArchISA(Arch) == llvm::ARM::ISAKind::THUMB);
   bool IsArmV7Mode = (IsArmArch || IsThumbArch) &&
       (llvm::ARM::parseArchVersion(Arch) == 7 ||
        (IsArmArch && Arch == "" && IsV7SubArch));
   addMultilibFlag(IsArmV7Mode, "march=armv7-a", Flags);
   addMultilibFlag(IsThumbMode, "mthumb", Flags);
 
   if (AndroidArmMultilibs.select(Flags, Result.SelectedMultilib))
     Result.Multilibs = AndroidArmMultilibs;