[Polly] Introduce isl_conv:: isl++ classes that automatically convert to old C classes

[grosser]

Summary

... and use these classes to port the ScopInfo.h interface to C++. This allows
us to return C++ objects everywhere in the interface, without having to convert
all C users at a time. As a result, new code can use C++ without the need for
std::give (or the new std::manage) calls all over the place, while old code
still works.

The isl++ interface on purpose does not allow for conversions back to isl C
types as there is a risk that automatic conversions might cause difficult to
detect memory leaks. The isl_conv:: classes allow such conversions, but are
expected to only be used at interface boundaries to avoid the need of isl++
conversion functions all over the place. After we moved to the C++ interface,
this conversion layer is expected to be removed again.

To make this patch compile, we have to remove some "auto" declarations and
replace them with specific types. This is a good direction anyhow, as LLVM's
coding style suggests to not use auto besides in obvious situations.

[grosser]

Add missing conversion class.

[Meinersbur]

[Opinion] I don't see the problem with converting the C-style interface one-by-one to isl++. There is a mechanical conversion for legacy users, e.g.
getDomain() to getDomain().release(). For the parts already primarily using isl++, give(getDomain().release()) collapses to getDomain().

With isl_conv we still need to go through all users to eventually get rid of it again. Until then, we just have increased the complexity and chances for memory errors significantly, something the C++ interface was trying to improve.

If you really need this class, please don't take too long to remove it again. Can you give a time frame for when it will be gone?

include/polly/Support/ISLConversion.h

23

[Style] UPPER_CASE is usually reserved for macros. Template arguments in LLVM usually are CamelCase.

lib/Transform/Simplify.cpp

175–176

give removed for getDomain(), but not for getContext()?

If you need to touch a significant amount of users for this patch anyway, I don't see the purpose.

[grosser]

OK, you are probably right that this is not needed. Overall, there are around 200 calls to change. I will just class by class directly to the new interface.

include/polly/ScopInfo.h

 // community, which are e.g. CLooG, Pluto, Loopo, Graphite.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef POLLY_SCOP_INFO_H
 #define POLLY_SCOP_INFO_H
 
 #include "polly/ScopDetection.h"
+#include "polly/Support/ISLConversion.h"
 #include "polly/Support/SCEVAffinator.h"
 
 #include "llvm/ADT/MapVector.h"
 #include "llvm/Analysis/RegionPass.h"
 #include "llvm/IR/PassManager.h"
 #include "isl/aff.h"
 #include "isl/ctx.h"
 #include "isl/set.h"
const SCEV *getDimensionSize(unsigned Dim) const {
     return DimensionSizes[Dim];
   }
 
   /// Return the size of dimension @p dim as isl_pw_aff.
   //
   //  Scalars do not have array dimensions and the first dimension of
   //  a (possibly multi-dimensional) array also does not carry any size
   //  information, in case the array is not newly created.
-  __isl_give isl_pw_aff *getDimensionSizePw(unsigned Dim) const {
+  isl_conv::pw_aff getDimensionSizePw(unsigned Dim) const {
     assert(Dim < getNumberOfDimensions() && "Invalid dimension");
     return isl_pw_aff_copy(DimensionSizesPw[Dim]);
   }
 
   /// Get the canonical element type of this array.
   ///
   /// @returns The canonical element type of this array.
   Type *getElementType() const { return ElementType; }
 
   /// Get element size in bytes.
   int getElemSizeInBytes() const;
 
   /// Get the name of this memory reference.
   std::string getName() const;
 
   /// Return the isl id for the base pointer.
-  __isl_give isl_id *getBasePtrId() const;
+  isl_conv::id getBasePtrId() const;
 
   /// Return what kind of memory this represents.
   MemoryKind getKind() const { return Kind; }
 
   /// Is this array info modeling an llvm::Value?
   bool isValueKind() const { return Kind == MemoryKind::Value; }
 
   /// Is this array info modeling special PHI node memory?
#endif
   /// Access the ScopArrayInfo associated with an access function.
   static const ScopArrayInfo *
   getFromAccessFunction(__isl_keep isl_pw_multi_aff *PMA);
 
   /// Access the ScopArrayInfo associated with an isl Id.
   static const ScopArrayInfo *getFromId(__isl_take isl_id *Id);
 
   /// Get the space of this array access.
-  __isl_give isl_space *getSpace() const;
+  isl_conv::space getSpace() const;
 
   /// If the array is read only
   bool isReadOnly();
 
   /// Verify that @p Array is compatible to this ScopArrayInfo.
   ///
   /// Two arrays are compatible if their dimensionality, the sizes of their
   /// dimensions, and their element sizes match.
private:
   /// Fortran arrays whose sizes are not statically known are stored in terms
   /// of a descriptor struct. This maintains a raw pointer to the memory,
   /// along with auxiliary fields with information such as dimensions.
   /// We hold a reference to the descriptor corresponding to a MemoryAccess
   /// into a Fortran array. FAD for "Fortran Array Descriptor"
   AssertingVH<Value> FAD;
   // @}
 
-  __isl_give isl_basic_map *createBasicAccessMap(ScopStmt *Statement);
+  isl_conv::basic_map createBasicAccessMap(ScopStmt *Statement);
 
   void assumeNoOutOfBound();
 
   /// Compute bounds on an over approximated  access relation.
   ///
   /// @param ElementSize The size of one element accessed.
   void computeBoundsOnAccessRelation(unsigned ElementSize);
 
   /// Get the original access function as read from IR.
-  __isl_give isl_map *getOriginalAccessRelation() const;
+  isl_conv::map getOriginalAccessRelation() const;
 
   /// Return the space in which the access relation lives in.
-  __isl_give isl_space *getOriginalAccessRelationSpace() const;
+  isl_conv::space getOriginalAccessRelationSpace() const;
 
   /// Get the new access function imported or set by a pass
-  __isl_give isl_map *getNewAccessRelation() const;
+  isl_conv::map getNewAccessRelation() const;
 
   /// Fold the memory access to consider parametric offsets
   ///
   /// To recover memory accesses with array size parameters in the subscript
   /// expression we post-process the delinearization results.
   ///
   /// We would normally recover from an access A[exp0(i) * N + exp1(i)] into an
   /// array A[][N] the 2D access A[exp0(i)][exp1(i)]. However, another valid
public:
   /// There are two possibilities:
   ///   1) The original access relation read from the LLVM-IR.
   ///   2) A new access relation imported from a json file or set by another
   ///      pass (e.g., for privatization).
   ///
   /// As 2) is by construction "newer" than 1) we return the new access
   /// relation if present.
   ///
-  __isl_give isl_map *getLatestAccessRelation() const {
+  isl_conv::map getLatestAccessRelation() const {
     return hasNewAccessRelation() ? getNewAccessRelation()
                                   : getOriginalAccessRelation();
   }
 
   /// Old name of getLatestAccessRelation().
-  __isl_give isl_map *getAccessRelation() const {
-    return getLatestAccessRelation();
-  }
+  isl_conv::map getAccessRelation() const { return getLatestAccessRelation(); }
 
   /// Get an isl map describing the memory address accessed.
   ///
   /// In most cases the memory address accessed is well described by the access
   /// relation obtained with getAccessRelation. However, in case of arrays
   /// accessed with types of different size the access relation maps one access
   /// to multiple smaller address locations. This method returns an isl map that
   /// relates each dynamic statement instance to the unique memory location
   /// that is loaded from / stored to.
   ///
   /// For an access relation { S[i] -> A[o] : 4i <= o <= 4i + 3 } this method
   /// will return the address function { S[i] -> A[4i] }.
   ///
   /// @returns The address function for this memory access.
-  __isl_give isl_map *getAddressFunction() const;
+  isl_conv::map getAddressFunction() const;
 
   /// Return the access relation after the schedule was applied.
-  __isl_give isl_pw_multi_aff *
+  isl_conv::pw_multi_aff
   applyScheduleToAccessRelation(__isl_take isl_union_map *Schedule) const;
 
   /// Get an isl string representing the access function read from IR.
   std::string getOriginalAccessRelationStr() const;
 
   /// Get an isl string representing a new access function, if available.
   std::string getNewAccessRelationStr() const;
 
   /// Get an isl string representing the latest access relation.
   std::string getAccessRelationStr() const;
 
   /// Get the original base address of this access (e.g. A for A[i+j]) when
   /// detected.
   ///
   /// This adress may differ from the base address referenced by the Original
   /// ScopArrayInfo to which this array belongs, as this memory access may
   /// have been unified to a ScopArray which has a different but identically
   /// valued base pointer in case invariant load hoisting is enabled.
   Value *getOriginalBaseAddr() const { return BaseAddr; }
 
   /// Get the detection-time base array isl_id for this access.
-  __isl_give isl_id *getOriginalArrayId() const;
+  isl_conv::id getOriginalArrayId() const;
 
   /// Get the base array isl_id for this access, modifiable through
   /// setNewAccessRelation().
-  __isl_give isl_id *getLatestArrayId() const;
+  isl_conv::id getLatestArrayId() const;
 
   /// Old name of getOriginalArrayId().
-  __isl_give isl_id *getArrayId() const { return getOriginalArrayId(); }
+  isl_conv::id getArrayId() const { return getOriginalArrayId(); }
 
   /// Get the detection-time ScopArrayInfo object for the base address.
   const ScopArrayInfo *getOriginalScopArrayInfo() const;
 
   /// Get the ScopArrayInfo object for the base address, or the one set
   /// by setNewAccessRelation().
   const ScopArrayInfo *getLatestScopArrayInfo() const;
 
public:
   unsigned getNumSubscripts() const { return Subscripts.size(); }
 
   /// Return the access function subscript in the dimension @p Dim.
   const SCEV *getSubscript(unsigned Dim) const { return Subscripts[Dim]; }
 
   /// Compute the isl representation for the SCEV @p E wrt. this access.
   ///
   /// Note that this function will also adjust the invalid context accordingly.
-  __isl_give isl_pw_aff *getPwAff(const SCEV *E);
+  isl_conv::pw_aff getPwAff(const SCEV *E);
 
   /// Get the invalid domain for this access.
-  __isl_give isl_set *getInvalidDomain() const {
-    return isl_set_copy(InvalidDomain);
-  }
+  isl_conv::set getInvalidDomain() const { return isl_set_copy(InvalidDomain); }
 
   /// Get the invalid context for this access.
-  __isl_give isl_set *getInvalidContext() const {
+  isl_conv::set getInvalidContext() const {
     return isl_set_params(getInvalidDomain());
   }
 
   /// Get the stride of this memory access in the specified Schedule. Schedule
   /// is a map from the statement to a schedule where the innermost dimension is
   /// the dimension of the innermost loop containing the statement.
-  __isl_give isl_set *getStride(__isl_take const isl_map *Schedule) const;
+  isl_conv::set getStride(__isl_take const isl_map *Schedule) const;
 
   /// Get the FortranArrayDescriptor corresponding to this memory access if
   /// it exists, and nullptr otherwise.
   Value *getFortranArrayDescriptor() const { return this->FAD; };
 
   /// Is the stride of the access equal to a certain width? Schedule is a map
   /// from the statement to a schedule where the innermost dimension is the
   /// dimension of the innermost loop containing the statement.
public:
   /// dimensionality of the ScopArrayInfo object that belongs to this memory
   /// access.
   void updateDimensionality();
 
   /// Get identifier for the memory access.
   ///
   /// This identifier is unique for all accesses that belong to the same scop
   /// statement.
-  __isl_give isl_id *getId() const;
+  isl_conv::id getId() const;
 
   /// Print the MemoryAccess.
   ///
   /// @param OS The output stream the MemoryAccess is printed to.
   void print(raw_ostream &OS) const;
 
 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
   /// Print the MemoryAccess to stderr.
public:
   ~ScopStmt();
 
   /// Get an isl_ctx pointer.
   isl_ctx *getIslCtx() const;
 
   /// Get the iteration domain of this ScopStmt.
   ///
   /// @return The iteration domain of this ScopStmt.
-  __isl_give isl_set *getDomain() const;
+  isl_conv::set getDomain() const;
 
   /// Get the space of the iteration domain
   ///
   /// @return The space of the iteration domain
-  __isl_give isl_space *getDomainSpace() const;
+  isl_conv::space getDomainSpace() const;
 
   /// Get the id of the iteration domain space
   ///
   /// @return The id of the iteration domain space
-  __isl_give isl_id *getDomainId() const;
+  isl_conv::id getDomainId() const;
 
   /// Get an isl string representing this domain.
   std::string getDomainStr() const;
 
   /// Get the schedule function of this ScopStmt.
   ///
   /// @return The schedule function of this ScopStmt, if it does not contain
   /// extension nodes, and nullptr, otherwise.
-  __isl_give isl_map *getSchedule() const;
+  isl_conv::map getSchedule() const;
 
   /// Get an isl string representing this schedule.
   ///
   /// @return An isl string representing this schedule, if it does not contain
   /// extension nodes, and an empty string, otherwise.
   std::string getScheduleStr() const;
 
   /// Get the invalid domain for this statement.
-  __isl_give isl_set *getInvalidDomain() const {
-    return isl_set_copy(InvalidDomain);
-  }
+  isl_conv::set getInvalidDomain() const { return isl_set_copy(InvalidDomain); }
 
   /// Get the invalid context for this statement.
-  __isl_give isl_set *getInvalidContext() const {
+  isl_conv::set getInvalidContext() const {
     return isl_set_params(getInvalidDomain());
   }
 
   /// Set the invalid context for this statement to @p ID.
   void setInvalidDomain(__isl_take isl_set *ID);
 
   /// Get the BasicBlock represented by this ScopStmt (if any).
   ///
private:
   ///   @see propagateDomainConstraintsToRegionExit
   ///
   /// @param BB     The block for which the predecessor domains are collected.
   /// @param Domain The domain under which BB is executed.
   /// @param DT     The DominatorTree for the current function.
   /// @param LI     The LoopInfo for the current function.
   ///
   /// @returns The domain under which @p BB is executed.
-  __isl_give isl_set *
-  getPredecessorDomainConstraints(BasicBlock *BB, __isl_keep isl_set *Domain,
-                                  DominatorTree &DT, LoopInfo &LI);
+  isl_conv::set getPredecessorDomainConstraints(BasicBlock *BB,
+                                                __isl_keep isl_set *Domain,
+                                                DominatorTree &DT,
+                                                LoopInfo &LI);
 
   /// Add loop carried constraints to the header block of the loop @p L.
   ///
   /// @param L                The loop to process.
   /// @param LI               The LoopInfo for the current function.
   /// @param InvalidDomainMap BB to InvalidDomain map for the BB of current
   ///                         region.
   ///
private:
   /// @param InvalidDomainMap BB to InvalidDomain map for the BB of current
   ///                         region.
   ///
   /// @returns True if there was no problem and false otherwise.
   bool buildDomains(Region *R, DominatorTree &DT, LoopInfo &LI,
                     DenseMap<BasicBlock *, isl::set> &InvalidDomainMap);
 
   /// Add parameter constraints to @p C that imply a non-empty domain.
-  __isl_give isl_set *addNonEmptyDomainConstraints(__isl_take isl_set *C) const;
+  isl_conv::set addNonEmptyDomainConstraints(__isl_take isl_set *C) const;
 
   /// Return the access for the base ptr of @p MA if any.
   MemoryAccess *lookupBasePtrAccess(MemoryAccess *MA);
 
   /// Check if the base ptr of @p MA is in the SCoP but not hoistable.
   bool hasNonHoistableBasePtrInScop(MemoryAccess *MA, isl::union_map Writes);
 
   /// Create equivalence classes for required invariant accesses.
private:
   void buildSchedule(RegionNode *RN, LoopStackTy &LoopStack, LoopInfo &LI);
 
   /// Collect all memory access relations of a given type.
   ///
   /// @param Predicate A predicate function that returns true if an access is
   ///                  of a given type.
   ///
   /// @returns The set of memory accesses in the scop that match the predicate.
-  __isl_give isl_union_map *
+  isl_conv::union_map
   getAccessesOfType(std::function<bool(MemoryAccess &)> Predicate);
 
   /// @name Helper functions for printing the Scop.
   ///
   //@{
   void printContext(raw_ostream &OS) const;
   void printArrayInfo(raw_ostream &OS) const;
   void printStatements(raw_ostream &OS, bool PrintInstructions) const;
inline const_array_range arrays() const {
     return const_array_range(array_begin(), array_end());
   }
 
   /// Return the isl_id that represents a certain parameter.
   ///
   /// @param Parameter A SCEV that was recognized as a Parameter.
   ///
   /// @return The corresponding isl_id or NULL otherwise.
-  __isl_give isl_id *getIdForParam(const SCEV *Parameter);
+  isl_conv::id getIdForParam(const SCEV *Parameter);
 
   /// Get the maximum region of this static control part.
   ///
   /// @return The maximum region of this static control part.
   inline const Region &getRegion() const { return R; }
   inline Region &getRegion() { return R; }
 
   /// Return the function this SCoP is in.
public:
   std::pair<std::string, std::string> getEntryExitStr() const;
 
   /// Get the name of this Scop.
   std::string getNameStr() const;
 
   /// Get the constraint on parameter of this Scop.
   ///
   /// @return The constraint on parameter of this Scop.
-  __isl_give isl_set *getContext() const;
-  __isl_give isl_space *getParamSpace() const;
+  isl_conv::set getContext() const;
+  isl_conv::space getParamSpace() const;
 
   /// Get the assumed context for this Scop.
   ///
   /// @return The assumed context of this Scop.
-  __isl_give isl_set *getAssumedContext() const;
+  isl_conv::set getAssumedContext() const;
 
   /// Return true if the optimized SCoP can be executed.
   ///
   /// In addition to the runtime check context this will also utilize the domain
   /// constraints to decide it the optimized version can actually be executed.
   ///
   /// @returns True if the optimized SCoP can be executed.
   bool hasFeasibleRuntimeContext() const;
public:
   /// @param Kind The assumption kind describing the underlying cause.
   /// @param Loc  The location in the source that triggered .
   /// @param BB   The BasicBlock where it was triggered.
   void invalidate(AssumptionKind Kind, DebugLoc Loc, BasicBlock *BB = nullptr);
 
   /// Get the invalid context for this Scop.
   ///
   /// @return The invalid context of this Scop.
-  __isl_give isl_set *getInvalidContext() const;
+  isl_conv::set getInvalidContext() const;
 
   /// Return true if and only if the InvalidContext is trivial (=empty).
   bool hasTrivialInvalidContext() const {
     return isl_set_is_empty(InvalidContext);
   }
 
   /// A vector of memory accesses that belong to an alias group.
   typedef SmallVector<MemoryAccess *, 4> AliasGroupTy;
#endif
   /// for complex cases without "error handling code" needed on the users side.
   __isl_give PWACtx getPwAff(const SCEV *E, BasicBlock *BB = nullptr,
                              bool NonNegative = false);
 
   /// Compute the isl representation for the SCEV @p E
   ///
   /// This function is like @see Scop::getPwAff() but strips away the invalid
   /// domain part associated with the piecewise affine function.
-  __isl_give isl_pw_aff *getPwAffOnly(const SCEV *E, BasicBlock *BB = nullptr);
+  isl_conv::pw_aff getPwAffOnly(const SCEV *E, BasicBlock *BB = nullptr);
 
   /// Return the domain of @p Stmt.
   ///
   /// @param Stmt The statement for which the conditions should be returned.
-  __isl_give isl_set *getDomainConditions(const ScopStmt *Stmt) const;
+  isl_conv::set getDomainConditions(const ScopStmt *Stmt) const;
 
   /// Return the domain of @p BB.
   ///
   /// @param BB The block for which the conditions should be returned.
-  __isl_give isl_set *getDomainConditions(BasicBlock *BB) const;
+  isl_conv::set getDomainConditions(BasicBlock *BB) const;
 
   /// Get a union set containing the iteration domains of all statements.
-  __isl_give isl_union_set *getDomains() const;
+  isl_conv::union_set getDomains() const;
 
   /// Get a union map of all may-writes performed in the SCoP.
-  __isl_give isl_union_map *getMayWrites();
+  isl_conv::union_map getMayWrites();
 
   /// Get a union map of all must-writes performed in the SCoP.
-  __isl_give isl_union_map *getMustWrites();
+  isl_conv::union_map getMustWrites();
 
   /// Get a union map of all writes performed in the SCoP.
-  __isl_give isl_union_map *getWrites();
+  isl_conv::union_map getWrites();
 
   /// Get a union map of all reads performed in the SCoP.
-  __isl_give isl_union_map *getReads();
+  isl_conv::union_map getReads();
 
   /// Get a union map of all memory accesses performed in the SCoP.
-  __isl_give isl_union_map *getAccesses();
+  isl_conv::union_map getAccesses();
 
   /// Get the schedule of all the statements in the SCoP.
   ///
   /// @return The schedule of all the statements in the SCoP, if the schedule of
   /// the Scop does not contain extension nodes, and nullptr, otherwise.
-  __isl_give isl_union_map *getSchedule() const;
+  isl_conv::union_map getSchedule() const;
 
   /// Get a schedule tree describing the schedule of all statements.
-  __isl_give isl_schedule *getScheduleTree() const;
+  isl_conv::schedule getScheduleTree() const;
 
   /// Update the current schedule
   ///
   /// NewSchedule The new schedule (given as a flat union-map).
   void setSchedule(__isl_take isl_union_map *NewSchedule);
 
   /// Update the current schedule
   ///

include/polly/Support/ISLConversion.h

+//===------ ISLConversion.h -------------------------------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This tool provides islpp classes that automatically convert to either the
+// native isl type or the corresponding islpp type.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef POLLY_ISL_CONVERSION_H
+#define POLLY_ISL_CONVERSION_H
+
+#include "isl-noexceptions.h"
+
+namespace polly {
+namespace isl_conv {
+
+template<class ISL_CLASS, typename ISL_TYPE>
+class IslConversion : public ISL_CLASS {
+  ISL_CLASS Obj;
+public:
+  IslConversion(ISL_TYPE *Ptr) : ISL_CLASS(isl::manage(Ptr)) {}
+  IslConversion(ISL_CLASS Obj) : ISL_CLASS(Obj) {}
+  operator ISL_TYPE*() {
+    return ISL_CLASS::copy();
+  }
+
+  operator ISL_CLASS() {
+    return this;
+  }
+};
+
+#define CONF(TYPE) typedef IslConversion<isl::TYPE, isl_ ## TYPE> TYPE;
+
+CONF(basic_set);
+CONF(set);
+CONF(union_set);
+
+CONF(basic_map);
+CONF(map);
+CONF(union_map);
+
+CONF(id);
+CONF(space);
+CONF(schedule);
+
+CONF(pw_aff);
+CONF(pw_multi_aff);
+
+}
+}
+
+#endif /* POLLY_ISL_CONVERSIONS_H */

lib/Analysis/DependenceInfo.cpp

for (MemoryAccess *MA : Stmt) {
         // a tagged Schedule tree.
 
         ReductionTagMap =
             isl_union_map_add_map(ReductionTagMap, isl_map_copy(accdom));
         accdom = isl_map_range_map(accdom);
       } else {
         accdom = tag(accdom, MA, Level);
         if (Level > Dependences::AL_Statement) {
-          auto *StmtScheduleMap = Stmt.getSchedule();
+          isl_map *StmtScheduleMap = Stmt.getSchedule();
           assert(StmtScheduleMap &&
                  "Schedules that contain extension nodes require special "
                  "handling.");
           isl_map *Schedule = tag(StmtScheduleMap, MA, Level);
           StmtSchedule = isl_union_map_add_map(StmtSchedule, Schedule);
         }
       }
 

lib/Analysis/PolyhedralInfo.cpp

__isl_give isl_union_map *PolyhedralInfo::getScheduleForLoop(const Scop *S,
   DEBUG(dbgs() << "Relative loop depth:\t" << CurrDim << "\n");
   assert(CurrDim >= 0 && "Loop in region should have at least depth one");
 
   for (auto &SS : *S) {
     if (L->contains(SS.getSurroundingLoop())) {
 
       unsigned int MaxDim = SS.getNumIterators();
       DEBUG(dbgs() << "Maximum depth of Stmt:\t" << MaxDim << "\n");
-      auto *ScheduleMap = SS.getSchedule();
+      isl_map *ScheduleMap = SS.getSchedule();
       assert(
           ScheduleMap &&
           "Schedules that contain extension nodes require special handling.");
 
       ScheduleMap = isl_map_project_out(ScheduleMap, isl_dim_out, CurrDim + 1,
                                         MaxDim - CurrDim - 1);
       ScheduleMap =
           isl_map_set_tuple_id(ScheduleMap, isl_dim_in, SS.getDomainId());

lib/Analysis/ScopInfo.cpp

if (!BasePtr || Kind != MemoryKind::Array) {
     return;
   }
 
   BasePtrOriginSAI = identifyBasePtrOriginSAI(S, BasePtr);
   if (BasePtrOriginSAI)
     const_cast<ScopArrayInfo *>(BasePtrOriginSAI)->addDerivedSAI(this);
 }
 
-__isl_give isl_space *ScopArrayInfo::getSpace() const {
+isl_conv::space ScopArrayInfo::getSpace() const {
   auto *Space =
       isl_space_set_alloc(isl_id_get_ctx(Id), 0, getNumberOfDimensions());
   Space = isl_space_set_tuple_id(Space, isl_dim_set, isl_id_copy(Id));
   return Space;
 }
 
 bool ScopArrayInfo::isReadOnly() {
   isl::union_set WriteSet = give(S.getWrites()).range();

 }
 
 std::string ScopArrayInfo::getName() const { return isl_id_get_name(Id); }
 
 int ScopArrayInfo::getElemSizeInBytes() const {
   return DL.getTypeAllocSize(ElementType);
 }
 
-__isl_give isl_id *ScopArrayInfo::getBasePtrId() const {
-  return isl_id_copy(Id);
-}
+isl_conv::id ScopArrayInfo::getBasePtrId() const { return isl_id_copy(Id); }
 
 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
 LLVM_DUMP_METHOD void ScopArrayInfo::dump() const { print(errs()); }
 #endif
 
 void ScopArrayInfo::print(raw_ostream &OS, bool SizeAsPwAff) const {
   OS.indent(8) << *getElementType() << " " << getName();
   unsigned u = 0;
   // If this is a Fortran array, then we can print the outermost dimension
   // as a isl_pw_aff even though there is no SCEV information.
   bool IsOutermostSizeKnown = SizeAsPwAff && FAD;
 
   if (!IsOutermostSizeKnown && getNumberOfDimensions() > 0 &&
       !getDimensionSize(0)) {
     OS << "[*]";
     u++;
   }
   for (; u < getNumberOfDimensions(); u++) {
     OS << "[";
 
     if (SizeAsPwAff) {
-      auto *Size = getDimensionSizePw(u);
+      isl_pw_aff *Size = getDimensionSizePw(u);
       OS << " " << Size << " ";
       isl_pw_aff_free(Size);
     } else {
       OS << *getDimensionSize(u);
     }
 
     OS << "]";
   }

 const ScopArrayInfo *MemoryAccess::getLatestScopArrayInfo() const {
   isl_id *ArrayId = getLatestArrayId();
   void *User = isl_id_get_user(ArrayId);
   const ScopArrayInfo *SAI = static_cast<ScopArrayInfo *>(User);
   isl_id_free(ArrayId);
   return SAI;
 }
 
-__isl_give isl_id *MemoryAccess::getOriginalArrayId() const {
+isl_conv::id MemoryAccess::getOriginalArrayId() const {
   return isl_map_get_tuple_id(AccessRelation, isl_dim_out);
 }
 
-__isl_give isl_id *MemoryAccess::getLatestArrayId() const {
+isl_conv::id MemoryAccess::getLatestArrayId() const {
   if (!hasNewAccessRelation())
     return getOriginalArrayId();
   return isl_map_get_tuple_id(NewAccessRelation, isl_dim_out);
 }
 
-__isl_give isl_map *MemoryAccess::getAddressFunction() const {
+isl_conv::map MemoryAccess::getAddressFunction() const {
   return isl_map_lexmin(getAccessRelation());
 }
 
-__isl_give isl_pw_multi_aff *MemoryAccess::applyScheduleToAccessRelation(
+isl_conv::pw_multi_aff MemoryAccess::applyScheduleToAccessRelation(
     __isl_take isl_union_map *USchedule) const {
   isl_map *Schedule, *ScheduledAccRel;
   isl_union_set *UDomain;
 
   UDomain = isl_union_set_from_set(getStatement()->getDomain());
   USchedule = isl_union_map_intersect_domain(USchedule, UDomain);
   Schedule = isl_map_from_union_map(USchedule);
   ScheduledAccRel = isl_map_apply_domain(getAddressFunction(), Schedule);
   return isl_pw_multi_aff_from_map(ScheduledAccRel);
 }
 
-__isl_give isl_map *MemoryAccess::getOriginalAccessRelation() const {
+isl_conv::map MemoryAccess::getOriginalAccessRelation() const {
   return isl_map_copy(AccessRelation);
 }
 
 std::string MemoryAccess::getOriginalAccessRelationStr() const {
   return stringFromIslObj(AccessRelation);
 }
 
-__isl_give isl_space *MemoryAccess::getOriginalAccessRelationSpace() const {
+isl_conv::space MemoryAccess::getOriginalAccessRelationSpace() const {
   return isl_map_get_space(AccessRelation);
 }
 
-__isl_give isl_map *MemoryAccess::getNewAccessRelation() const {
+isl_conv::map MemoryAccess::getNewAccessRelation() const {
   return isl_map_copy(NewAccessRelation);
 }
 
 std::string MemoryAccess::getNewAccessRelationStr() const {
   return stringFromIslObj(NewAccessRelation);
 }
 
 std::string MemoryAccess::getAccessRelationStr() const {
   return isl::manage(getAccessRelation()).to_str();
 }
 
-__isl_give isl_basic_map *
-MemoryAccess::createBasicAccessMap(ScopStmt *Statement) {
+isl_conv::basic_map MemoryAccess::createBasicAccessMap(ScopStmt *Statement) {
   isl_space *Space = isl_space_set_alloc(Statement->getIslCtx(), 0, 1);
   Space = isl_space_align_params(Space, Statement->getDomainSpace());
 
   return isl_basic_map_from_domain_and_range(
       isl_basic_set_universe(Statement->getDomainSpace()),
       isl_basic_set_universe(Space));
 }
 
for (int i = 1, Size = Space.dim(isl::dim::set); i < Size; ++i) {
     SizeE = SizeE.add_dims(isl::dim::in, Space.dim(isl::dim::set));
     SizeE = SizeE.set_tuple_id(isl::dim::in, Space.get_tuple_id(isl::dim::set));
     DimOutside = DimOutside.unite(SizeE.le_set(Var));
 
     Outside = Outside.unite(DimOutside);
   }
 
   Outside = Outside.apply(give(getAccessRelation()).reverse());
-  Outside = Outside.intersect(give(Statement->getDomain()));
+  Outside = Outside.intersect(Statement->getDomain());
   Outside = Outside.params();
 
   // Remove divs to avoid the construction of overly complicated assumptions.
   // Doing so increases the set of parameter combinations that are assumed to
   // not appear. This is always save, but may make the resulting run-time check
   // bail out more often than strictly necessary.
   Outside = Outside.remove_divs();
   Outside = Outside.complement();
   const auto &Loc = getAccessInstruction()
                         ? getAccessInstruction()->getDebugLoc()
                         : DebugLoc();
-  if (!PollyPreciseInbounds)
-    Outside = Outside.gist_params(give(Statement->getDomain()).params());
+  if (!PollyPreciseInbounds) {
+    Outside = Outside.gist_params(Statement->getDomain().params());
+  }
   Statement->getParent()->recordAssumption(INBOUNDS, Outside.release(), Loc,
                                            AS_ASSUMPTION);
 }
 
 void MemoryAccess::buildMemIntrinsicAccessRelation() {
   assert(isMemoryIntrinsic());
   assert(Subscripts.size() == 2 && Sizes.size() == 1);
 
for (int i = Size - 2; i >= 0; --i) {
     NewAccessRelation = NewAccessRelation.apply_range(MapOne);
   }
 
   isl::id BaseAddrId = give(getScopArrayInfo()->getBasePtrId());
   isl::space Space = give(Statement->getDomainSpace());
   NewAccessRelation = NewAccessRelation.set_tuple_id(
       isl::dim::in, Space.get_tuple_id(isl::dim::set));
   NewAccessRelation = NewAccessRelation.set_tuple_id(isl::dim::out, BaseAddrId);
-  NewAccessRelation =
-      NewAccessRelation.gist_domain(give(Statement->getDomain()));
+  NewAccessRelation = NewAccessRelation.gist_domain(Statement->getDomain());
 
   // Access dimension folding might in certain cases increase the number of
   // disjuncts in the memory access, which can possibly complicate the generated
   // run-time checks and can lead to costly compilation.
   if (!PollyPreciseFoldAccesses &&
       isl_map_n_basic_map(NewAccessRelation.get()) >
           isl_map_n_basic_map(AccessRelation)) {
   } else {
static bool isDivisible(const SCEV *Expr, unsigned Size, ScalarEvolution &SE) {
   return MulSCEV == Expr;
 }
 
 void MemoryAccess::buildAccessRelation(const ScopArrayInfo *SAI) {
   assert(!AccessRelation && "AccessRelation already built");
 
   // Initialize the invalid domain which describes all iterations for which the
   // access relation is not modeled correctly.
-  auto *StmtInvalidDomain = getStatement()->getInvalidDomain();
+  isl_set *StmtInvalidDomain = getStatement()->getInvalidDomain();
   InvalidDomain = isl_set_empty(isl_set_get_space(StmtInvalidDomain));
   isl_set_free(StmtInvalidDomain);
 
   isl_ctx *Ctx = isl_id_get_ctx(Id);
   isl_id *BaseAddrId = SAI->getBasePtrId();
 
   if (getAccessInstruction() && isa<MemIntrinsic>(getAccessInstruction())) {
     buildMemIntrinsicAccessRelation();
MemoryAccess::MemoryAccess(ScopStmt *Stmt, AccessType AccType,
   static const std::string TypeStrings[] = {"", "_Read", "_Write", "_MayWrite"};
   const std::string Access = TypeStrings[AccType] + utostr(Stmt->size());
 
   std::string IdName = Stmt->getBaseName() + Access;
   Id = isl_id_alloc(Stmt->getParent()->getIslCtx(), IdName.c_str(), this);
 }
 
 void MemoryAccess::realignParams() {
-  auto *Ctx = Statement->getParent()->getContext();
+  isl_set *Ctx = Statement->getParent()->getContext();
   InvalidDomain = isl_set_gist_params(InvalidDomain, isl_set_copy(Ctx));
   AccessRelation = isl_map_gist_params(AccessRelation, Ctx);
 }
 
 const std::string MemoryAccess::getReductionOperatorStr() const {
   return MemoryAccess::getReductionOperatorStr(getReductionType());
 }
 
-__isl_give isl_id *MemoryAccess::getId() const { return isl_id_copy(Id); }
+isl_conv::id MemoryAccess::getId() const { return isl_id_copy(Id); }
 
 raw_ostream &polly::operator<<(raw_ostream &OS,
                                MemoryAccess::ReductionType RT) {
   if (RT == MemoryAccess::RT_NONE)
     OS << "NONE";
   else
     OS << MemoryAccess::getReductionOperatorStr(RT);
   return OS;
void MemoryAccess::print(raw_ostream &OS) const {
   if (hasNewAccessRelation())
     OS.indent(11) << "new: " << getNewAccessRelationStr() << ";\n";
 }
 
 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
 LLVM_DUMP_METHOD void MemoryAccess::dump() const { print(errs()); }
 #endif
 
-__isl_give isl_pw_aff *MemoryAccess::getPwAff(const SCEV *E) {
+isl_conv::pw_aff MemoryAccess::getPwAff(const SCEV *E) {
   auto *Stmt = getStatement();
   PWACtx PWAC = Stmt->getParent()->getPwAff(E, Stmt->getEntryBlock());
   isl_set *StmtDom = isl_set_reset_tuple_id(getStatement()->getDomain());
   isl_set *NewInvalidDom = isl_set_intersect(StmtDom, PWAC.second);
   InvalidDomain = isl_set_union(InvalidDomain, NewInvalidDom);
   return PWAC.first;
 }
 
static isl_map *getEqualAndLarger(__isl_take isl_space *setDomain) {
   // last dimension of the output.
   //
   //   input[?,?,?,...,iX] -> output[?,?,?,...,oX] : iX < oX
   Map = isl_map_order_lt(Map, isl_dim_in, lastDimension, isl_dim_out,
                          lastDimension);
   return Map;
 }
 
-__isl_give isl_set *
+isl_conv::set
 MemoryAccess::getStride(__isl_take const isl_map *Schedule) const {
   isl_map *S = const_cast<isl_map *>(Schedule);
   isl_map *AccessRelation = getAccessRelation();
   isl_space *Space = isl_space_range(isl_map_get_space(S));
   isl_map *NextScatt = getEqualAndLarger(Space);
 
   S = isl_map_reverse(S);
   NextScatt = isl_map_lexmin(NextScatt);

 
 void MemoryAccess::setNewAccessRelation(__isl_take isl_map *NewAccess) {
   assert(NewAccess);
 
 #ifndef NDEBUG
   // Check domain space compatibility.
   auto *NewSpace = isl_map_get_space(NewAccess);
   auto *NewDomainSpace = isl_space_domain(isl_space_copy(NewSpace));
-  auto *OriginalDomainSpace = getStatement()->getDomainSpace();
+  isl_space *OriginalDomainSpace = getStatement()->getDomainSpace();
   assert(isl_space_has_equal_tuples(OriginalDomainSpace, NewDomainSpace));
   isl_space_free(NewDomainSpace);
   isl_space_free(OriginalDomainSpace);
 
   // Reads must be executed unconditionally. Writes might be executed in a
   // subdomain only.
   if (isRead()) {
     // Check whether there is an access for every statement instance.
-    auto *StmtDomain = getStatement()->getDomain();
+    isl_set *StmtDomain = getStatement()->getDomain();
     StmtDomain = isl_set_intersect_params(
         StmtDomain, getStatement()->getParent()->getContext());
     auto *NewDomain = isl_map_domain(isl_map_copy(NewAccess));
     assert(isl_set_is_subset(StmtDomain, NewDomain) &&
            "Partial READ accesses not supported");
     isl_set_free(NewDomain);
     isl_set_free(StmtDomain);
   }

 #endif
 
   isl_map_free(NewAccessRelation);
   NewAccess = isl_map_gist_domain(NewAccess, getStatement()->getDomain());
   NewAccessRelation = NewAccess;
 }
 
 bool MemoryAccess::isLatestPartialAccess() const {
-  isl::set StmtDom = give(getStatement()->getDomain());
+  isl::set StmtDom = getStatement()->getDomain();
   isl::set AccDom = give(isl_map_domain(getLatestAccessRelation()));
 
   return isl_set_is_subset(StmtDom.keep(), AccDom.keep()) == isl_bool_false;
 }
 
 //===----------------------------------------------------------------------===//
 
-__isl_give isl_map *ScopStmt::getSchedule() const {
+isl_conv::map ScopStmt::getSchedule() const {
   isl_set *Domain = getDomain();
   if (isl_set_is_empty(Domain)) {
     isl_set_free(Domain);
     return isl_map_from_aff(
         isl_aff_zero_on_domain(isl_local_space_from_space(getDomainSpace())));
   }
-  auto *Schedule = getParent()->getSchedule();
+  isl_union_map *Schedule = getParent()->getSchedule();
   if (!Schedule) {
     isl_set_free(Domain);
     return nullptr;
   }
   Schedule = isl_union_map_intersect_domain(
       Schedule, isl_union_set_from_set(isl_set_copy(Domain)));
   if (isl_union_map_is_empty(Schedule)) {
     isl_set_free(Domain);
void ScopStmt::addAccess(MemoryAccess *Access) {
 
   MemAccs.push_back(Access);
 }
 
 void ScopStmt::realignParams() {
   for (MemoryAccess *MA : *this)
     MA->realignParams();
 
-  auto *Ctx = Parent.getContext();
+  isl_set *Ctx = Parent.getContext();
   InvalidDomain = isl_set_gist_params(InvalidDomain, isl_set_copy(Ctx));
   Domain = isl_set_gist_params(Domain, Ctx);
 }
 
 /// Add @p BSet to the set @p User if @p BSet is bounded.
 static isl_stat collectBoundedParts(__isl_take isl_basic_set *BSet,
                                     void *User) {
   isl_set **BoundedParts = static_cast<isl_set **>(User);

 /// @param BB               The BB for which isl representation is to be
 /// computed.
 /// @param InvalidDomainMap A map of BB to their invalid domains.
 /// @param E                The SCEV that should be translated.
 /// @param NonNegative      Flag to indicate the @p E has to be non-negative.
 ///
 /// Note that this function will also adjust the invalid context accordingly.
 
-__isl_give isl_pw_aff *
-getPwAff(Scop &S, BasicBlock *BB,
-         DenseMap<BasicBlock *, isl::set> &InvalidDomainMap, const SCEV *E,
-         bool NonNegative = false) {
+isl_conv::pw_aff getPwAff(Scop &S, BasicBlock *BB,
+                          DenseMap<BasicBlock *, isl::set> &InvalidDomainMap,
+                          const SCEV *E, bool NonNegative = false) {
   PWACtx PWAC = S.getPwAff(E, BB, NonNegative);
   InvalidDomainMap[BB] = InvalidDomainMap[BB].unite(isl::manage(PWAC.second));
   return PWAC.first;
 }
 
 /// Build the conditions sets for the switch @p SI in the @p Domain.
 ///
 /// This will fill @p ConditionSets with the conditions under which control
for (const auto &CandidatePair : Candidates) {
     CandidatePair.first->markAsReductionLike(RT);
     CandidatePair.second->markAsReductionLike(RT);
   }
 }
 
 std::string ScopStmt::getDomainStr() const { return stringFromIslObj(Domain); }
 
 std::string ScopStmt::getScheduleStr() const {
-  auto *S = getSchedule();
+  isl_map *S = getSchedule();
   if (!S)
     return "";
   auto Str = stringFromIslObj(S);
   isl_map_free(S);
   return Str;
 }
 
 void ScopStmt::setInvalidDomain(__isl_take isl_set *ID) {

 const char *ScopStmt::getBaseName() const { return BaseName.c_str(); }
 
 Loop *ScopStmt::getLoopForDimension(unsigned Dimension) const {
   return NestLoops[Dimension];
 }
 
 isl_ctx *ScopStmt::getIslCtx() const { return Parent.getIslCtx(); }
 
-__isl_give isl_set *ScopStmt::getDomain() const { return isl_set_copy(Domain); }
+isl_conv::set ScopStmt::getDomain() const {
+  return isl::manage(isl_set_copy(Domain));
+}
 
-__isl_give isl_space *ScopStmt::getDomainSpace() const {
+isl_conv::space ScopStmt::getDomainSpace() const {
   return isl_set_get_space(Domain);
 }
 
-__isl_give isl_id *ScopStmt::getDomainId() const {
+isl_conv::id ScopStmt::getDomainId() const {
   return isl_set_get_tuple_id(Domain);
 }
 
 ScopStmt::~ScopStmt() {
   isl_set_free(Domain);
   isl_set_free(InvalidDomain);
 }
 
for (const SCEV *Parameter : NewParameters) {
     Parameter = extractConstantFactor(Parameter, *SE).second;
     Parameter = getRepresentingInvariantLoadSCEV(Parameter);
 
     if (Parameters.insert(Parameter))
       createParameterId(Parameter);
   }
 }
 
-__isl_give isl_id *Scop::getIdForParam(const SCEV *Parameter) {
+isl_conv::id Scop::getIdForParam(const SCEV *Parameter) {
   // Normalize the SCEV to get the representing element for an invariant load.
   Parameter = getRepresentingInvariantLoadSCEV(Parameter);
   return isl_id_copy(ParameterIds.lookup(Parameter));
 }
 
-__isl_give isl_set *
-Scop::addNonEmptyDomainConstraints(__isl_take isl_set *C) const {
+isl_conv::set Scop::addNonEmptyDomainConstraints(__isl_take isl_set *C) const {
   isl_set *DomainContext = isl_union_set_params(getDomains());
   return isl_set_intersect_params(C, DomainContext);
 }
 
 bool Scop::isDominatedBy(const DominatorTree &DT, BasicBlock *BB) const {
   return DT.dominates(BB, getEntry());
 }
 
for (auto *Param : DetectedParams) {
       if (Parameters.count(Param))
         continue;
       NewParams.insert(Param);
     }
 
     SmallVector<isl_set *, 2> ConditionSets;
     auto *TI = InScop ? CI->getParent()->getTerminator() : nullptr;
     auto &Stmt = InScop ? *getStmtFor(CI->getParent()) : *Stmts.begin();
-    auto *Dom = InScop ? getDomainConditions(&Stmt) : isl_set_copy(Context);
+    isl_set *Dom =
+        InScop ? (isl_set *)getDomainConditions(&Stmt) : isl_set_copy(Context);
     bool Valid = buildConditionSets(*this, Stmt.getEntryBlock(), Val, TI, L,
                                     Dom, InvalidDomainMap, ConditionSets);
     isl_set_free(Dom);
 
     if (!Valid)
       continue;
 
     isl_set *AssumptionCtx = nullptr;

 static inline __isl_give isl_set *addDomainDimId(__isl_take isl_set *Domain,
                                                  unsigned Dim, Loop *L) {
   Domain = isl_set_lower_bound_si(Domain, isl_dim_set, Dim, -1);
   isl_id *DimId =
       isl_id_alloc(isl_set_get_ctx(Domain), nullptr, static_cast<void *>(L));
   return isl_set_set_dim_id(Domain, isl_dim_set, Dim, DimId);
 }
 
-__isl_give isl_set *Scop::getDomainConditions(const ScopStmt *Stmt) const {
+isl_conv::set Scop::getDomainConditions(const ScopStmt *Stmt) const {
   return getDomainConditions(Stmt->getEntryBlock());
 }
 
-__isl_give isl_set *Scop::getDomainConditions(BasicBlock *BB) const {
+isl_conv::set Scop::getDomainConditions(BasicBlock *BB) const {
   auto DIt = DomainMap.find(BB);
   if (DIt != DomainMap.end())
     return DIt->getSecond().copy();
 
   auto &RI = *R.getRegionInfo();
   auto *BBR = RI.getRegionFor(BB);
   while (BBR->getEntry() == BB)
     BBR = BBR->getParent();
for (unsigned u = 0, e = ConditionSets.size(); u < e; u++) {
         isl_set_free(ConditionSets[u]);
       return false;
     }
   }
 
   return true;
 }
 
-__isl_give isl_set *
-Scop::getPredecessorDomainConstraints(BasicBlock *BB,
+isl_conv::set Scop::getPredecessorDomainConstraints(BasicBlock *BB,
                                                     __isl_keep isl_set *Domain,
-                                      DominatorTree &DT, LoopInfo &LI) {
+                                                    DominatorTree &DT,
+                                                    LoopInfo &LI) {
   // If @p BB is the ScopEntry we are done
   if (R.getEntry() == BB)
     return isl_set_universe(isl_set_get_space(Domain));
 
   // The region info of this function.
   auto &RI = *R.getRegionInfo();
 
   Loop *BBLoop = getFirstNonBoxedLoopFor(BB, LI, getBoxedLoops());
for (auto *PredBB : predecessors(BB)) {
 
     // If a valid region for propagation was found use the entry of that region
     // for propagation, otherwise the PredBB directly.
     if (PredR->getExit() == BB) {
       PredBB = PredR->getEntry();
       PropagatedRegions.insert(PredR);
     }
 
-    auto *PredBBDom = getDomainConditions(PredBB);
+    isl_set *PredBBDom = getDomainConditions(PredBB);
     Loop *PredBBLoop = getFirstNonBoxedLoopFor(PredBB, LI, getBoxedLoops());
 
     PredBBDom = adjustDomainDimensions(*this, PredBBDom, PredBBLoop, BBLoop);
 
     PredDom = isl_set_union(PredDom, PredBBDom);
   }
 
   return PredDom;
static bool canAlwaysBeHoisted(MemoryAccess *MA, bool StmtInvalidCtxIsEmpty,
   return true;
 }
 
 void Scop::addInvariantLoads(ScopStmt &Stmt, InvariantAccessesTy &InvMAs) {
 
   if (InvMAs.empty())
     return;
 
-  auto *StmtInvalidCtx = Stmt.getInvalidContext();
+  isl_set *StmtInvalidCtx = Stmt.getInvalidContext();
   bool StmtInvalidCtxIsEmpty = isl_set_is_empty(StmtInvalidCtx);
 
   // Get the context under which the statement is executed but remove the error
   // context under which this statement is reached.
   isl_set *DomainCtx = isl_set_params(Stmt.getDomain());
   DomainCtx = isl_set_subtract(DomainCtx, StmtInvalidCtx);
 
   if (isl_set_n_basic_set(DomainCtx) >= MaxDisjunctsInDomain) {
for (auto &InvMA : InvMAs) {
 
     // Check for another invariant access that accesses the same location as
     // MA and if found consolidate them. Otherwise create a new equivalence
     // class at the end of InvariantEquivClasses.
     LoadInst *LInst = cast<LoadInst>(MA->getAccessInstruction());
     Type *Ty = LInst->getType();
     const SCEV *PointerSCEV = SE->getSCEV(LInst->getPointerOperand());
 
-    auto *MAInvalidCtx = MA->getInvalidContext();
+    isl_set *MAInvalidCtx = MA->getInvalidContext();
     bool NonHoistableCtxIsEmpty = isl_set_is_empty(NHCtx);
     bool MAInvalidCtxIsEmpty = isl_set_is_empty(MAInvalidCtx);
 
     isl_set *MACtx;
     // Check if we know that this pointer can be speculatively accessed.
     if (canAlwaysBeHoisted(MA, StmtInvalidCtxIsEmpty, MAInvalidCtxIsEmpty,
                            NonHoistableCtxIsEmpty)) {
       MACtx = isl_set_universe(isl_set_get_space(DomainCtx));
if (hasNonHoistableBasePtrInScop(Access, Writes))
     return nullptr;
 
   isl::map AccessRelation = give(Access->getAccessRelation());
   assert(!AccessRelation.is_empty());
 
   if (AccessRelation.involves_dims(isl::dim::in, 0, Stmt.getNumIterators()))
     return nullptr;
 
-  AccessRelation = AccessRelation.intersect_domain(give(Stmt.getDomain()));
+  AccessRelation = AccessRelation.intersect_domain(Stmt.getDomain());
   isl::set SafeToLoad;
 
   auto &DL = getFunction().getParent()->getDataLayout();
   if (isSafeToLoadUnconditionally(LI->getPointerOperand(), LI->getAlignment(),
                                   DL)) {
     SafeToLoad = isl::set::universe(AccessRelation.get_space().range());
   } else if (BB != LI->getParent()) {
     // Skip accesses in non-affine subregions as they might not be executed
if (R.getExit()) {
     R.getExit()->printAsOperand(ExitStr, false);
     ExitStr.str();
   } else
     ExitName = "FunctionExit";
 
   return std::make_pair(EntryName, ExitName);
 }
 
-__isl_give isl_set *Scop::getContext() const { return isl_set_copy(Context); }
-__isl_give isl_space *Scop::getParamSpace() const {
+isl_conv::set Scop::getContext() const { return isl_set_copy(Context); }
+isl_conv::space Scop::getParamSpace() const {
   return isl_set_get_space(Context);
 }
 
-__isl_give isl_set *Scop::getAssumedContext() const {
+isl_conv::set Scop::getAssumedContext() const {
   assert(AssumedContext && "Assumed context not yet built");
   return isl_set_copy(AssumedContext);
 }
 
 bool Scop::isProfitable(bool ScalarsAreUnprofitable) const {
   if (PollyProcessUnprofitable)
     return true;
 
for (auto &Stmt : *this) {
     if (!ScalarsAreUnprofitable || (ContainsArrayAccs && !ContainsScalarAccs))
       OptimizableStmtsOrLoops += Stmt.getNumIterators();
   }
 
   return OptimizableStmtsOrLoops > 1;
 }
 
 bool Scop::hasFeasibleRuntimeContext() const {
-  auto *PositiveContext = getAssumedContext();
-  auto *NegativeContext = getInvalidContext();
+  isl_set *PositiveContext = getAssumedContext();
+  isl_set *NegativeContext = getInvalidContext();
   PositiveContext = addNonEmptyDomainConstraints(PositiveContext);
   bool IsFeasible = !(isl_set_is_empty(PositiveContext) ||
                       isl_set_is_subset(PositiveContext, NegativeContext));
   isl_set_free(PositiveContext);
   if (!IsFeasible) {
     isl_set_free(NegativeContext);
     return false;
   }
while (!RecordedAssumptions.empty()) {
     addAssumption(AS.Kind, S, AS.Loc, AS_RESTRICTION, AS.BB);
   }
 }
 
 void Scop::invalidate(AssumptionKind Kind, DebugLoc Loc, BasicBlock *BB) {
   addAssumption(Kind, isl_set_empty(getParamSpace()), Loc, AS_ASSUMPTION, BB);
 }
 
-__isl_give isl_set *Scop::getInvalidContext() const {
+isl_conv::set Scop::getInvalidContext() const {
   return isl_set_copy(InvalidContext);
 }
 
 void Scop::printContext(raw_ostream &OS) const {
   OS << "Context:\n";
   OS.indent(4) << Context << "\n";
 
   OS.indent(4) << "Assumed Context:\n";
if (PWAC.first) {
     return PWAC;
   }
 
   auto DL = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc();
   invalidate(COMPLEXITY, DL, BB);
   return Affinator.getPwAff(SE->getZero(E->getType()), BB);
 }
 
-__isl_give isl_union_set *Scop::getDomains() const {
+isl_conv::union_set Scop::getDomains() const {
   isl_space *EmptySpace = isl_space_params_alloc(getIslCtx(), 0);
   isl_union_set *Domain = isl_union_set_empty(EmptySpace);
 
   for (const ScopStmt &Stmt : *this)
     Domain = isl_union_set_add_set(Domain, Stmt.getDomain());
 
   return Domain;
 }
 
-__isl_give isl_pw_aff *Scop::getPwAffOnly(const SCEV *E, BasicBlock *BB) {
+isl_conv::pw_aff Scop::getPwAffOnly(const SCEV *E, BasicBlock *BB) {
   PWACtx PWAC = getPwAff(E, BB);
   isl_set_free(PWAC.second);
   return PWAC.first;
 }
 
-__isl_give isl_union_map *
+isl_conv::union_map
 Scop::getAccessesOfType(std::function<bool(MemoryAccess &)> Predicate) {
   isl_union_map *Accesses = isl_union_map_empty(getParamSpace());
 
   for (ScopStmt &Stmt : *this) {
     for (MemoryAccess *MA : Stmt) {
       if (!Predicate(*MA))
         continue;
 
       isl_set *Domain = Stmt.getDomain();
       isl_map *AccessDomain = MA->getAccessRelation();
       AccessDomain = isl_map_intersect_domain(AccessDomain, Domain);
       Accesses = isl_union_map_add_map(Accesses, AccessDomain);
     }
   }
   return isl_union_map_coalesce(Accesses);
 }
 
-__isl_give isl_union_map *Scop::getMustWrites() {
+isl_conv::union_map Scop::getMustWrites() {
   return getAccessesOfType([](MemoryAccess &MA) { return MA.isMustWrite(); });
 }
 
-__isl_give isl_union_map *Scop::getMayWrites() {
+isl_conv::union_map Scop::getMayWrites() {
   return getAccessesOfType([](MemoryAccess &MA) { return MA.isMayWrite(); });
 }
 
-__isl_give isl_union_map *Scop::getWrites() {
+isl_conv::union_map Scop::getWrites() {
   return getAccessesOfType([](MemoryAccess &MA) { return MA.isWrite(); });
 }
 
-__isl_give isl_union_map *Scop::getReads() {
+isl_conv::union_map Scop::getReads() {
   return getAccessesOfType([](MemoryAccess &MA) { return MA.isRead(); });
 }
 
-__isl_give isl_union_map *Scop::getAccesses() {
+isl_conv::union_map Scop::getAccesses() {
   return getAccessesOfType([](MemoryAccess &MA) { return true; });
 }
 
 // Check whether @p Node is an extension node.
 //
 // @return true if @p Node is an extension node.
 isl_bool isNotExtNode(__isl_keep isl_schedule_node *Node, void *User) {
   if (isl_schedule_node_get_type(Node) == isl_schedule_node_extension)
     return isl_bool_error;
   else
     return isl_bool_true;
 }
 
 bool Scop::containsExtensionNode(__isl_keep isl_schedule *Schedule) {
   return isl_schedule_foreach_schedule_node_top_down(Schedule, isNotExtNode,
                                                      nullptr) == isl_stat_error;
 }
 
-__isl_give isl_union_map *Scop::getSchedule() const {
-  auto *Tree = getScheduleTree();
+isl_conv::union_map Scop::getSchedule() const {
+  isl_schedule *Tree = getScheduleTree();
   if (containsExtensionNode(Tree)) {
     isl_schedule_free(Tree);
     return nullptr;
   }
   auto *S = isl_schedule_get_map(Tree);
   isl_schedule_free(Tree);
   return S;
 }
 
-__isl_give isl_schedule *Scop::getScheduleTree() const {
+isl_conv::schedule Scop::getScheduleTree() const {
   return isl_schedule_intersect_domain(isl_schedule_copy(Schedule),
                                        getDomains());
 }
 
 void Scop::setSchedule(__isl_take isl_union_map *NewSchedule) {
   auto *S = isl_schedule_from_domain(getDomains());
   S = isl_schedule_insert_partial_schedule(
       S, isl_multi_union_pw_aff_from_union_map(NewSchedule));

lib/CodeGen/BlockGenerators.cpp

 void BlockGenerator::generateScalarLoads(
     ScopStmt &Stmt, LoopToScevMapT &LTS, ValueMapT &BBMap,
     __isl_keep isl_id_to_ast_expr *NewAccesses) {
   for (MemoryAccess *MA : Stmt) {
     if (MA->isOriginalArrayKind() || MA->isWrite())
       continue;
 
 #ifndef NDEBUG
-    auto *StmtDom = Stmt.getDomain();
+    isl_set *StmtDom = Stmt.getDomain();
     auto *AccDom = isl_map_domain(MA->getAccessRelation());
     assert(isl_set_is_subset(StmtDom, AccDom) &&
            "Scalar must be loaded in all statement instances");
     isl_set_free(StmtDom);
     isl_set_free(AccDom);
 #endif
 
     auto *Address =
         getImplicitAddress(*MA, getLoopForStmt(Stmt), LTS, BBMap, NewAccesses);
     assert((!isa<Instruction>(Address) ||
             DT.dominates(cast<Instruction>(Address)->getParent(),
                          Builder.GetInsertBlock())) &&
            "Domination violation");
     BBMap[MA->getAccessValue()] =
         Builder.CreateLoad(Address, Address->getName() + ".reload");
   }
 }
 
 Value *BlockGenerator::buildContainsCondition(ScopStmt &Stmt,
                                               const isl::set &Subdomain) {
   isl::ast_build AstBuild = give(isl_ast_build_copy(Stmt.getAstBuild()));
-  isl::set Domain = give(Stmt.getDomain());
+  isl::set Domain = Stmt.getDomain();
 
   isl::union_map USchedule = AstBuild.get_schedule();
   USchedule = USchedule.intersect_domain(Domain);
 
   assert(!USchedule.is_empty());
   isl::map Schedule = isl::map::from_union_map(USchedule);
 
   isl::set ScheduledDomain = Schedule.range();
   isl::set ScheduledSet = Subdomain.apply(Schedule);
 
   isl::ast_build RestrictedBuild = AstBuild.restrict(ScheduledDomain);
 
   isl::ast_expr IsInSet = RestrictedBuild.expr_from(ScheduledSet);
   Value *IsInSetExpr = ExprBuilder->create(IsInSet.copy());
   IsInSetExpr = Builder.CreateICmpNE(
       IsInSetExpr, ConstantInt::get(IsInSetExpr->getType(), 0));
 
   return IsInSetExpr;
 }
 
 void BlockGenerator::generateConditionalExecution(
     ScopStmt &Stmt, const isl::set &Subdomain, StringRef Subject,
     const std::function<void()> &GenThenFunc) {
-  isl::set StmtDom = give(Stmt.getDomain());
+  isl::set StmtDom = Stmt.getDomain();
 
   // Don't call GenThenFunc if it is never executed. An ast index expression
   // might not be defined in this case.
   if (Subdomain.is_empty())
     return;
 
   // If the condition is a tautology, don't generate a condition around the
   // code.

lib/CodeGen/IslAst.cpp

 
 void IslAst::init(const Dependences &D) {
   bool PerformParallelTest = PollyParallel || DetectParallel ||
                              PollyVectorizerChoice != VECTORIZER_NONE;
 
   // We can not perform the dependence analysis and, consequently,
   // the parallel code generation in case the schedule tree contains
   // extension nodes.
-  auto *ScheduleTree = S.getScheduleTree();
+  isl_schedule *ScheduleTree = S.getScheduleTree();
   PerformParallelTest =
       PerformParallelTest && !S.containsExtensionNode(ScheduleTree);
   isl_schedule_free(ScheduleTree);
 
   // Skip AST and code generation if there was no benefit achieved.
   if (!benefitsFromPolly(S, PerformParallelTest))
     return;
 
void IslAstInfo::print(raw_ostream &OS) {
   P = isl_printer_set_output_format(P, ISL_FORMAT_C);
   P = isl_printer_print_ast_expr(P, RunCondition);
   RtCStr = isl_printer_get_str(P);
   P = isl_printer_flush(P);
   P = isl_printer_indent(P, 4);
   P = isl_ast_node_print(RootNode, P, Options);
   AstStr = isl_printer_get_str(P);
 
-  auto *Schedule = S.getScheduleTree();
+  isl_schedule *Schedule = S.getScheduleTree();
 
   DEBUG({
     dbgs() << S.getContextStr() << "\n";
     dbgs() << stringFromIslObj(Schedule);
   });
   OS << "\nif (" << RtCStr << ")\n\n";
   OS << AstStr << "\n";
   OS << "else\n";

lib/CodeGen/IslNodeBuilder.cpp

for (auto *MA : *Stmt) {
     }
     assert(MA->isAffine() &&
            "Only affine memory accesses can be code generated");
 
     auto Schedule = isl_ast_build_get_schedule(Build);
 
 #ifndef NDEBUG
     if (MA->isRead()) {
-      auto Dom = Stmt->getDomain();
+      isl_set *Dom = Stmt->getDomain();
       auto SchedDom = isl_set_from_union_set(
           isl_union_map_domain(isl_union_map_copy(Schedule)));
       auto AccDom = isl_map_domain(MA->getAccessRelation());
       Dom = isl_set_intersect_params(Dom, Stmt->getParent()->getContext());
       SchedDom =
           isl_set_intersect_params(SchedDom, Stmt->getParent()->getContext());
       assert(isl_set_is_subset(SchedDom, AccDom) &&
              "Access relation not defined on full schedule domain");
       assert(isl_set_is_subset(Dom, AccDom) &&
              "Access relation not defined on full domain");
       isl_set_free(AccDom);
       isl_set_free(SchedDom);
       isl_set_free(Dom);
     }
 #endif
 
-    auto PWAccRel = MA->applyScheduleToAccessRelation(Schedule);
+    isl_pw_multi_aff *PWAccRel = MA->applyScheduleToAccessRelation(Schedule);
 
     // isl cannot generate an index expression for access-nothing accesses.
     isl::set AccDomain =
         give(isl_pw_multi_aff_domain(isl_pw_multi_aff_copy(PWAccRel)));
     if (isl_set_is_empty(AccDomain.keep()) == isl_bool_true) {
       isl_pw_multi_aff_free(PWAccRel);
       continue;
     }
for (auto *Val : Values) {
           // there is a statement or the domain is not empty Inst is not dead.
           auto MemInst = MemAccInst::dyn_cast(Inst);
           auto Address = MemInst ? MemInst.getPointerOperand() : nullptr;
           if (Address && SE.getUnknown(UndefValue::get(Address->getType())) ==
                              SE.getPointerBase(SE.getSCEV(Address))) {
           } else if (S.getStmtFor(Inst)) {
             IsDead = false;
           } else {
-            auto *Domain = S.getDomainConditions(Inst->getParent());
+            isl_set *Domain = S.getDomainConditions(Inst->getParent());
             IsDead = isl_set_is_empty(Domain);
             isl_set_free(Domain);
           }
 
           if (IsDead) {
             V = UndefValue::get(ParamSCEV->getType());
             break;
           }

lib/CodeGen/PPCGCodeGeneration.cpp

public:
   /// the data format that ppcg expects.
   ///
   /// @returns Retun a map from collected ids to 'zero' ast expressions.
   __isl_give isl_id_to_ast_expr *getNames() {
     auto *Names = isl_id_to_ast_expr_alloc(
         S->getIslCtx(),
         S->getNumParams() + std::distance(S->array_begin(), S->array_end()));
     auto *Zero = isl_ast_expr_from_val(isl_val_zero(S->getIslCtx()));
-    auto *Space = S->getParamSpace();
+    isl_space *Space = S->getParamSpace();
 
     for (int I = 0, E = S->getNumParams(); I < E; ++I) {
       isl_id *Id = isl_space_get_dim_id(Space, isl_dim_param, I);
       Names = isl_id_to_ast_expr_set(Names, Id, isl_ast_expr_copy(Zero));
     }
 
     for (auto &Array : S->arrays()) {
       auto Id = Array->getBasePtrId();
__isl_give isl_set *getExtent(ScopArrayInfo *Array) {
     Extent = isl_set_intersect(
         Extent, isl_pw_aff_le_set(OuterMin, isl_pw_aff_copy(Val)));
     Extent = isl_set_intersect(Extent, isl_pw_aff_ge_set(OuterMax, Val));
 
     for (unsigned i = 1; i < NumDims; ++i)
       Extent = isl_set_lower_bound_si(Extent, isl_dim_set, i, 0);
 
     for (unsigned i = 0; i < NumDims; ++i) {
-      isl_pw_aff *PwAff =
-          const_cast<isl_pw_aff *>(Array->getDimensionSizePw(i));
+      isl_pw_aff *PwAff = Array->getDimensionSizePw(i);
 
       // isl_pw_aff can be NULL for zero dimension. Only in the case of a
       // Fortran array will we have a legitimate dimension.
       if (!PwAff) {
         assert(i == 0 && "invalid dimension isl_pw_aff for nonzero dimension");
         continue;
       }
 

lib/Support/SCEVAffinator.cpp

__isl_give PWACtx SCEVAffinator::getPWACtxFromPWA(__isl_take isl_pw_aff *PWA) {
   return std::make_pair(
       PWA, isl_set_empty(isl_space_set_alloc(Ctx, 0, NumIterators)));
 }
 
 __isl_give PWACtx SCEVAffinator::getPwAff(const SCEV *Expr, BasicBlock *BB) {
   this->BB = BB;
 
   if (BB) {
-    auto *DC = S->getDomainConditions(BB);
+    isl_set *DC = S->getDomainConditions(BB);
     NumIterators = isl_set_n_dim(DC);
     isl_set_free(DC);
   } else
     NumIterators = 0;
 
   return visit(Expr);
 }
 

lib/Transform/ScheduleOptimizer.cpp

static bool containsMatrMult(__isl_keep isl_map *PartialSchedule,
   if (Stmt->size() <= 1)
     return false;
   for (auto *MemA = Stmt->end() - 1; MemA != Stmt->begin(); MemA--) {
     auto *MemAccessPtr = *MemA;
     if (!MemAccessPtr->isLatestArrayKind())
       continue;
     if (!MemAccessPtr->isWrite())
       return false;
-    auto *AccMap = MemAccessPtr->getLatestAccessRelation();
+    isl_map *AccMap = MemAccessPtr->getLatestAccessRelation();
     if (isl_map_n_basic_map(AccMap) != 1 ||
         !isMatMulOperandAcc(AccMap, MMI.i, MMI.j)) {
       isl_map_free(AccMap);
       return false;
     }
     isl_map_free(AccMap);
     MMI.WriteToC = MemAccessPtr;
     break;
static __isl_give isl_schedule_node *optimizeDataLayoutMatrMulPattern(
   auto *AccRel = getMatMulAccRel(isl_map_copy(MapOldIndVar), 3, 7);
   unsigned FirstDimSize = MacroParams.Nc / MicroParams.Nr;
   unsigned SecondDimSize = MacroParams.Kc;
   unsigned ThirdDimSize = MicroParams.Nr;
   auto *SAI = Stmt->getParent()->createScopArrayInfo(
       MMI.B->getElementType(), "Packed_B",
       {FirstDimSize, SecondDimSize, ThirdDimSize});
   AccRel = isl_map_set_tuple_id(AccRel, isl_dim_out, SAI->getBasePtrId());
-  auto *OldAcc = MMI.B->getLatestAccessRelation();
+  isl_map *OldAcc = MMI.B->getLatestAccessRelation();
   MMI.B->setNewAccessRelation(AccRel);
   auto *ExtMap =
       isl_map_project_out(isl_map_copy(MapOldIndVar), isl_dim_out, 2,
                           isl_map_dim(MapOldIndVar, isl_dim_out) - 2);
   ExtMap = isl_map_reverse(ExtMap);
   ExtMap = isl_map_fix_si(ExtMap, isl_dim_out, MMI.i, 0);
-  auto *Domain = Stmt->getDomain();
+  isl_set *Domain = Stmt->getDomain();
 
   // Restrict the domains of the copy statements to only execute when also its
   // originating statement is executed.
   auto *DomainId = isl_set_get_tuple_id(Domain);
   auto *NewStmt = Stmt->getParent()->addScopStmt(
       OldAcc, MMI.B->getLatestAccessRelation(), isl_set_copy(Domain));
   ExtMap = isl_map_set_tuple_id(ExtMap, isl_dim_out, isl_id_copy(DomainId));
   ExtMap = isl_map_intersect_range(ExtMap, isl_set_copy(Domain));

lib/Transform/Simplify.cpp

for (auto *Acc : Accesses) {
 
       auto AccRel = give(Acc->getAccessRelation());
       auto AccRelSpace = AccRel.get_space();
 
       // Spaces being different means that they access different arrays.
       if (!TargetsSpace.has_equal_tuples(AccRelSpace))
         continue;
 
-      AccRel = AccRel.intersect_domain(give(Acc->getStatement()->getDomain()));
+      AccRel = AccRel.intersect_domain(Acc->getStatement()->getDomain());
       AccRel = AccRel.intersect_params(give(S->getContext()));
       auto CommonElt = Targets.intersect(AccRel);
       if (!CommonElt.is_empty())
         return Acc;
     }
     assert(Stmt->isRegionStmt() &&
            "To must be encountered in block statements");
     return nullptr;
   }
 
   /// Remove writes that are overwritten unconditionally later in the same
   /// statement.
   ///
   /// There must be no read of the same value between the write (that is to be
   /// removed) and the overwrite.
   void removeOverwrites() {
     for (auto &Stmt : *S) {
-      auto Domain = give(Stmt.getDomain());
+      auto Domain = Stmt.getDomain();
       isl::union_map WillBeOverwritten =
           isl::union_map::empty(give(S->getParamSpace()));
 
       SmallVector<MemoryAccess *, 32> Accesses(getAccessesInOrder(Stmt));
 
       // Iterate in reverse order, so the overwrite comes before the write that
       // is to be removed.
       for (auto *MA : reverse(Accesses)) {
for (auto &Stmt : *S) {
 
         auto RA = getReadAccessForValue(&Stmt, ReadingValue);
         if (!RA)
           continue;
         if (!RA->isLatestArrayKind())
           continue;
 
         auto WARel = give(WA->getLatestAccessRelation());
-        WARel = WARel.intersect_domain(give(WA->getStatement()->getDomain()));
+        WARel = WARel.intersect_domain(WA->getStatement()->getDomain());
         WARel = WARel.intersect_params(give(S->getContext()));
         auto RARel = give(RA->getLatestAccessRelation());
-        RARel = RARel.intersect_domain(give(RA->getStatement()->getDomain()));
+        RARel = RARel.intersect_domain(RA->getStatement()->getDomain());
         RARel = RARel.intersect_params(give(S->getContext()));
 
         if (!RARel.is_equal(WARel)) {
           PairUnequalAccRels++;
           DEBUG(dbgs() << "Not cleaning up " << WA
                        << " because of unequal access relations:\n");
           DEBUG(dbgs() << "      RA: " << RARel << "\n");
           DEBUG(dbgs() << "      WA: " << WARel << "\n");