forget to update the test comment, sorry

test case foo1_and_signbit_lshr_without_shifting_signbit_not_pwr2() aim to check that we are not creating additional shift instruction when fold fails.

I think we should only create signbit shift instruction when fold is supposed to happen.

In D64275#1575312, @lebedev.ri wrote:

Thanks for working on this!
This is for sure missing some one-use checks (i.e. increases instruction count).
Could you please add 5 copies of @foo1_and_signbit_lshr_without_shifting_signbit, each one with different instruction having extra use?

Addressed review comments

Generalize InstCombiner::foldAndOrOfICmpsOfAndWithPow2() in D64275

for onehot_merge.ll
mathematically speaking

(signbit l>> C)

is equivalent to

Rebased patch, and addressed review comments.

I simplify the code for pattern matching, more readable.

update for added vector tests

minor update for vector test,

Added vector test to check for predicate variance.
Canonicalization happens for ule -> ult , uge -> ugt

addressed review comments

remove test file for "shl-and-compare", as "shl-compare" test cases are sufficient.

addressed review comments

This will fix the missing fold found in D63505

minor fix of comments in the test file

Yes , this reorder expose yet another missing fold. As regression in test/Transforms/InstCombine/pr17827.ll

this differential update address inline comment - adding comment for restriction this fold to single-use 'and' (PR10267)

This is the second fold we talked about , split from D63026

for example, test.ll below

In D63025#1544768, @lebedev.ri wrote:

Hmm, which commit? Could you just use either arc patch, or manually add Differential Revision: <link> so that there is a reference between them?

Merged

Original test cases are added in D63025 . Hopefully would be good coverage :)
D63026 fix fold order issue
this differential introduce new fold for icmp pred (and X, (sh signbit, Y)), 0

test cases added in D63025

In D62818#1534806, @xbolva00 wrote:

More signum, sgn patterns
https://godbolt.org/z/tE00f4

D62818 is now split into D63025 , D63026 , D63028 and D62818

split from D62818

Thank you so much for all the review feedback, really appreciate it! :)

This fix D63025
Split from D62818

D62818
Split D62818 into 4 differentials.

Test cases in icmp-shift-and-signbit.ll shows the updated fold order can generate better IR.

Yes , changing the order would allow these folds.

The other approach could be changing the order of folding. Move foldICmpBinOpEqualityWithConstant to the very beginning of foldICmpInstWithConstant.
foldICmpBinOpEqualityWithConstant has rules to replace (and X, (1 << size(X)-1) != 0) with x s< 0.
Let me know if this approach is more preferable?

For thumb target, this optimization allow generation of more compacted instructions.
run: clang -mcpu=cortex-m0 -target armv6m-none-eabi icmp-shl-and.ll -O2 -S -o t.s
@ %bb.0: @ %entry

subs    r0, r0, #1
lsls    r1, r0
cmp     r1, #0
blt     .LBB0_2

@ %bb.1: @ %entry

mov     r2, r3

.LBB0_2: @ %entry

mov     r0, r2
bx      lr