Thanks @fhahn , stack accesses are not needed. I just clean them in https://reviews.llvm.org/rG19302cd7a449

Thanks Eli for the feedbacks!
Exclude undef from overlap diagnosis.

Take test mir attached test/CodeGen/AArch64/stp-opt-with-renaming-crash.mir
run with llc -run-pass=aarch64-ldst-opt -mtriple=aarch64 -verify-machineinstrs

Thank you guys for looking into this!

Thanks Sanjay for the review!
I did another local run for fadd, with "--disable-undef-input" it finish within a minute.
When removing "--disable-undef-input", it's taking about an hour now, still not finished.

Rebased, and a gentle ping ?

Update on overnight run for fdiv

Addressed review comments.
Pre-commit baseline test test/Transforms/InstCombine/select-binop-foldable-floating-point.ll

Thanks Sanjay for the comments, I will update unit test as suggested.

Take test.ll attached.

I think this fix looks right, but wait a bit for @reames , in case he caught anything unusual ?

Another note on LSRInstance::GenerateReassociationsImpl() where 1*reg is created, eventually trigger this assertion.

Ideally we should reject early when stride is zero, but in this case we won't be able to detect this early since stride zero is in a form of add expression.

Thanks @sdesmalen for the review! Happy to help out! ;)

To be more conservative, added checking IgnoreSignificantBits || isMulSExtable(MulRHS, SE) to MulRHS as well.

Thanks @efriedma @dmgreen for the feedbacks!
Addressed review comments, please let me know if there are anything I missed ?

Update diff to use SetVector.

Thank you for the feedback!
Addressed review comments.

Thank you for the review! @wenlei , could you also help take a look at D99544 and D99549. They are in a similar vein. Thanks a lot!

Thanks @frasercrmck for helping! Appreciate it!

This is crashing SVE target lowering with "LLVM ERROR: Cannot select: t23: nxv4i32 = mulhu t9, t34"
Let me know if there is a way of fixing it?

Thanks David and Paul for the reviews!

Take test function @sext_inreg
run: llc -mtriple=aarch64-linux-gnu -mattr=+sve < test/CodeGen/AArch64/DAGCombine_vscale.ll

Thanks for the feedback!
Test cases for vector splitting added. Also fix the warning message caused by extracting subvector.

Thanks @sdesmalen for the review!
Fixed in the commit patch.

Current upstream mis-compile, take t.ll , run "llc -mtriple=aarch64-linux-gnu -mattr=+sve < t.ll"

Current upstream crash with test attached.

Thanks guys for the feedback!
Addressed review comments.

Thanks Sanjay for the review!
Addressed review comments.

I don't think that's the intention of this specific test given the name insert_extract_element_same_vec_idx_2. And also the unused parameter %a.
This is failing due after a local change to instsimplify and I think the test maybe isn't testing what it wants to test?

why do we need this change?
insert element into undef is common to construct a vector, being fixed or scalable.

Thanks @paulwalker-arm for the review!
I have moved the new tests into sve-masked-ldst-nonext.ll in the commit.

Hey @fpetrogalli @sdesmalen , any updates on this patch? This should be the last one to commit for structure load? Or are we using different approach?

Thanks Eli for pointing this out!

In D78267#2025884, @thakis wrote:

Looks like this breaks check-llvm at least on Linux: http://45.33.8.238/linux/17186/step_12.txt

Can you take a look? If it takes a while to fix, please revert while you investigate.