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Differential D32425

[mips] Make checks in CodeGen/mips-varargs.c less fragile
ClosedPublic

Authored by arichardson on Apr 24 2017, 3:48 AM.

Details

Reviewers
sdardis
atanasyan
Commits
rG657188ab0052: [mips] Make checks in CodeGen/mips-varargs.c less fragile
rC303619: [mips] Make checks in CodeGen/mips-varargs.c less fragile
rL303619: [mips] Make checks in CodeGen/mips-varargs.c less fragile
Summary

This test was failing on our fork of clang because it was not capturing
[[ARG]] in the N32 case. Therefore it used the value from the last function
which does not always have to be the same. All other cases were already
capturing ARG so this appears to be an oversight.
The test now uses -enable-var-scope to prevent such errors in the future.

Diff Detail

Event Timeline

arichardson created this revision.Apr 24 2017, 3:48 AM
Harbormaster completed remote builds in B5801: Diff 96373.Apr 24 2017, 3:48 AM
arichardson set the repository for this revision to rL LLVM.Apr 24 2017, 3:49 AM
arichardson added a subscriber: llvm-commits.
sdardis edited edge metadata.Apr 24 2017, 7:17 AM

This needs to be posted to cfe-commits, not llvm-commits.

arichardson edited subscribers, added: cfe-commits; removed: llvm-commits.Apr 24 2017, 7:18 AM
arichardson updated this revision to Diff 98059.May 6 2017, 6:12 AM
arichardson retitled this revision from [mips] Make N32 checks in CodeGen/mips-varargs.c less fragile to [mips] Make checks in CodeGen/mips-varargs.c less fragile.
arichardson edited the summary of this revision. (Show Details)

Used -enable-var-scope to ensure we don't reuse a capture from a preivous function

Herald added a subscriber: krytarowski. · View Herald TranscriptMay 6 2017, 6:12 AM
sdardis accepted this revision.May 22 2017, 6:49 AM

LGTM,,

This revision is now accepted and ready to land.May 22 2017, 6:49 AM
arichardson added a comment.May 23 2017, 1:56 AM

I don't have commit access, could you commit for me please?

Closed by commit rL303619: [mips] Make checks in CodeGen/mips-varargs.c less fragile (authored by sdardis). · Explain WhyMay 23 2017, 2:42 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
test/
CodeGen/
1 line

Diff 96373

test/CodeGen/mips-varargs.c

Show First 20 Lines • Show All 153 Lines • ▼ Show 20 Lines
// NEW: [[AP_CUR:%.+]] = inttoptr [[INTPTR_T]] [[TMP3]] to i8* // NEW: [[AP_CUR:%.+]] = inttoptr [[INTPTR_T]] [[TMP3]] to i8*
// //
// ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[INTPTR_T]] 16 // ALL: [[AP_NEXT:%.+]] = getelementptr inbounds i8, i8* [[AP_CUR]], [[INTPTR_T]] 16
// ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]] // ALL: store i8* [[AP_NEXT]], i8** %va, align [[PTRALIGN]]
// //
// ALL: [[AP_CAST:%.+]] = bitcast i8* [[AP_CUR]] to <4 x i32>* // ALL: [[AP_CAST:%.+]] = bitcast i8* [[AP_CUR]] to <4 x i32>*
// O32: [[ARG:%.+]] = load <4 x i32>, <4 x i32>* [[AP_CAST]], align 8 // O32: [[ARG:%.+]] = load <4 x i32>, <4 x i32>* [[AP_CAST]], align 8
// N64: [[ARG:%.+]] = load <4 x i32>, <4 x i32>* [[AP_CAST]], align 16 // N64: [[ARG:%.+]] = load <4 x i32>, <4 x i32>* [[AP_CAST]], align 16
// N32: [[ARG:%.+]] = load <4 x i32>, <4 x i32>* [[AP_CAST]], align 16
// ALL: store <4 x i32> [[ARG]], <4 x i32>* [[V]], align 16 // ALL: store <4 x i32> [[ARG]], <4 x i32>* [[V]], align 16
// //
// ALL: [[VA1:%.+]] = bitcast i8** %va to i8* // ALL: [[VA1:%.+]] = bitcast i8** %va to i8*
// ALL: call void @llvm.va_end(i8* [[VA1]]) // ALL: call void @llvm.va_end(i8* [[VA1]])
// ALL: [[VECEXT:%.+]] = extractelement <4 x i32> {{.*}}, i32 0 // ALL: [[VECEXT:%.+]] = extractelement <4 x i32> {{.*}}, i32 0
// ALL: ret i32 [[VECEXT]] // ALL: ret i32 [[VECEXT]]
// ALL: } // ALL: }