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[AArch64] Avoid partial register writes on lane 0 of BUILD_VECTOR for i8/i16/f16
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Authored by anemet on Apr 13 2017, 10:00 AM.

Details

Summary

This further improves Ahmed's change in rL299482. See the new comment for the
rationale.

The patch recovers most of the regression for bzip2 after D31965. We're down
to +2.68% from +6.97%.

Event Timeline

anemet created this revision.Apr 13 2017, 10:00 AM
ab accepted this revision.Apr 13 2017, 4:20 PM

Nice, LGTM

This revision is now accepted and ready to land.Apr 13 2017, 4:20 PM
This revision was automatically updated to reflect the committed changes.