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[MVT][SVE] Scalable vector MVTs (2/3)
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Authored by huntergr on Apr 13 2017, 8:21 AM.

Details

Summary

Adds scalable vector machine value types, and updates
the switch statements required for tablegen.

Diff Detail

Repository
rL LLVM

Event Timeline

huntergr created this revision.Apr 13 2017, 8:21 AM
craig.topper added inline comments.Apr 13 2017, 9:26 AM
include/llvm/CodeGen/MachineValueType.h
31 ↗(On Diff #95132)

I wonder if we should move INVALID_SIMPLE_VALUE_TYPE up to 0 and shift everything so we can keep this as a byte. Not sure if anything depends on Other being 0.

rengolin added inline comments.Apr 13 2017, 10:39 AM
include/llvm/CodeGen/MachineValueType.h
144 ↗(On Diff #95132)

Are these values serialised in binary IR form?

If so, then reading previous IR would give you the wrong types, no?

craig.topper edited edge metadata.Apr 13 2017, 10:48 AM

They aren't serialized. They belong to the CodeGen implementation. IR doesn't use these.

rengolin edited edge metadata.Apr 13 2017, 10:50 AM

Right, then it looks ok.

huntergr added inline comments.Apr 18 2017, 5:49 AM
include/llvm/CodeGen/MachineValueType.h
31 ↗(On Diff #95132)

I'll try that as an experiment and see if anything falls over.

huntergr updated this revision to Diff 95715.Apr 19 2017, 4:54 AM

Changed SimpleValueType enum back to 8 bits, but made it unsigned. Renumbered all of them, with 0 now being the invalid value.

This passes 'make check-all' with all targets active, and passes lnt nightly tests.

rengolin accepted this revision.Apr 20 2017, 3:16 AM

All three patches look good to me, now. Thanks Graham for the extended work on them, I think we have a solid foundation in which to start the SVE upstreaming.

This revision is now accepted and ready to land.Apr 20 2017, 3:16 AM
This revision was automatically updated to reflect the committed changes.