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Differential D28630

[PPC] Give unaligned memory access lower cost on processor that supports it
ClosedPublic

Authored by Carrot on Jan 12 2017, 4:32 PM.

Details

Reviewers
echristo
kbarton
hfinkel
Commits
rG7ec2c7209564: [PPC] Give unaligned memory access lower cost on processor that supports it
rGa5c6ed5a5ce7: [PPC] Give unaligned memory access lower cost on processor that supports it
rL295506: [PPC] Give unaligned memory access lower cost on processor that supports it
rL292680: [PPC] Give unaligned memory access lower cost on processor that supports it
Summary

Newer ppc supports unaligned memory access, it reduces the cost of unaligned memory access significantly. This patch handles this case in PPCTTIImpl::getMemoryOpCost.

This patch fixes pr31492.

Diff Detail

Event Timeline

Carrot updated this revision to Diff 84190.Jan 12 2017, 4:32 PM
Carrot retitled this revision from to [PPC] Give unaligned memory access lower cost on processor that supports it.
Carrot updated this object.
Carrot added reviewers: hfinkel, kbarton, echristo.
Carrot added a subscriber: llvm-commits.
Herald added subscribers: nemanjai, mehdi_amini. · View Herald TranscriptJan 12 2017, 4:32 PM
Carrot added a comment.Jan 19 2017, 3:25 PM

ping

echristo accepted this revision.Jan 19 2017, 4:46 PM

LGTM.

Thanks!

-eric

This revision is now accepted and ready to land.Jan 19 2017, 4:46 PM
Closed by commit rL292680: [PPC] Give unaligned memory access lower cost on processor that supports it (authored by Carrot). · Explain WhyJan 20 2017, 3:46 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
PowerPC/
4 lines
test/
Analysis/
CostModel/
PowerPC/
2 lines
26 lines

Diff 84190

lib/Target/PowerPC/PPCTargetTransformInfo.cpp

Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
// For VSX, we can do unaligned loads and stores on Altivec/VSX types. On the // For VSX, we can do unaligned loads and stores on Altivec/VSX types. On the
// P7, unaligned vector loads are more expensive than the permutation-based // P7, unaligned vector loads are more expensive than the permutation-based
// load sequence, so that might be used instead, but regardless, the net cost // load sequence, so that might be used instead, but regardless, the net cost
// is about the same (not counting loop-invariant instructions). // is about the same (not counting loop-invariant instructions).
if (IsVSXType || (ST->hasVSX() && IsAltivecType)) if (IsVSXType || (ST->hasVSX() && IsAltivecType))
return Cost; return Cost;
// Newer PPC supports unaligned memory access.
if (TLI->allowsMisalignedMemoryAccesses(LT.second, 0))
return Cost;
// PPC in general does not support unaligned loads and stores. They'll need // PPC in general does not support unaligned loads and stores. They'll need
// to be decomposed based on the alignment factor. // to be decomposed based on the alignment factor.
// Add the cost of each scalar load or store. // Add the cost of each scalar load or store.
Cost += LT.first*(SrcBytes/Alignment-1); Cost += LT.first*(SrcBytes/Alignment-1);
// For a vector type, there is also scalarization overhead (only for // For a vector type, there is also scalarization overhead (only for
// stores, loads are expanded using the vector-load + permutation sequence, // stores, loads are expanded using the vector-load + permutation sequence,
Show All 32 Lines

test/Analysis/CostModel/PowerPC/load_store.ll

; RUN: opt < %s -cost-model -analyze -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s ; RUN: opt < %s -cost-model -analyze -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 -disable-ppc-unaligned | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
define i32 @stores(i32 %arg) { define i32 @stores(i32 %arg) {
; CHECK: cost of 1 {{.*}} store ; CHECK: cost of 1 {{.*}} store
store i8 undef, i8* undef, align 4 store i8 undef, i8* undef, align 4
; CHECK: cost of 1 {{.*}} store ; CHECK: cost of 1 {{.*}} store
Show All 36 Lines

test/Analysis/CostModel/PowerPC/unaligned_ld_st.ll

; RUN: opt < %s -cost-model -analyze -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=+vsx | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu"
define i32 @test(i32 %arg) {
; CHECK: cost of 1 {{.*}} load
load i8, i8* undef, align 1
; CHECK: cost of 1 {{.*}} load
load i16, i16* undef, align 1
; CHECK: cost of 1 {{.*}} load
load i32, i32* undef, align 1
; CHECK: cost of 1 {{.*}} load
load i64, i64* undef, align 1
; CHECK: cost of 1 {{.*}} store
store i8 undef, i8* undef, align 1
; CHECK: cost of 1 {{.*}} store
store i16 undef, i16* undef, align 1
; CHECK: cost of 1 {{.*}} store
store i32 undef, i32* undef, align 1
; CHECK: cost of 1 {{.*}} store
store i64 undef, i64* undef, align 1
ret i32 undef
}