[PowerPC] Fix the wrong implementation of builtin vec_rlnm.

[jtony]

Summary

vec_rlnm was implemented according to the old ABI, which was wrong. The ABI team have fixed the issue (although not published yet). We need to re-implement these builtins according to the new ABI.

From (old implementation):
builtin_altivec_vrlwnm(a, b) & c;

To (new implementation):
vector unsigned int OneByte = { 0x8, 0x8, 0x8, 0x8 };
__builtin_altivec_vrlwnm(a, ((c << OneByte) | b));

[nemanjai]

Please fix the minor issue with the test case and then commit.
LGTM.

test/CodeGen/builtins-ppc-p9vector.c

871

Don't hard-code the names of intermediate results. I imagine this will fail even now on some build bot. Rather specify it as something like:
// CHECK-BE: %[[RES1:.+]] = shl <4 x i32

And feel free to use the saved result as the operand to the next instruction. Like:
// CHECK-BE: %[[RES2:.+]] = or <4 x i32> %[[RES1]]

lib/Headers/altivec.h

vec_rlmi(vector unsigned long long __a, vector unsigned long long __b,
          vector unsigned long long __c) {
   return __builtin_altivec_vrldmi(__a, __c, __b);
 }
 
 /* vec_rlnm */
 static __inline__ vector unsigned int __ATTRS_o_ai
 vec_rlnm(vector unsigned int __a, vector unsigned int __b,
          vector unsigned int __c) {
-  return __builtin_altivec_vrlwnm(__a, __b) & __c;
+  vector unsigned int OneByte = { 0x8, 0x8, 0x8, 0x8 };
+  return __builtin_altivec_vrlwnm(__a, ((__c << OneByte) | __b));
 }
 
 static __inline__ vector unsigned long long __ATTRS_o_ai
 vec_rlnm(vector unsigned long long __a, vector unsigned long long __b,
          vector unsigned long long __c) {
-  return __builtin_altivec_vrldnm(__a, __b) & __c;
+  vector unsigned long long OneByte = { 0x8, 0x8 };
+  return __builtin_altivec_vrldnm(__a, ((__c << OneByte) | __b));
 }
 #endif
 
 /* vec_vrlb */
 
 static __inline__ vector signed char __ATTRS_o_ai
 vec_vrlb(vector signed char __a, vector unsigned char __b) {
   return (vector signed char)__builtin_altivec_vrlb((vector char)__a, __b);

test/CodeGen/builtins-ppc-p9vector.c

 vector unsigned long long test76(void) {
 // CHECK-BE: @llvm.ppc.altivec.vrldmi(<2 x i64
 // CHECK-BE-NEXT: ret <2 x i64>
 // CHECK: @llvm.ppc.altivec.vrldmi(<2 x i64
 // CHECK-NEXT: ret <2 x i64>
   return vec_rlmi(vula, vula, vula);
 }
 vector unsigned int test77(void) {
+// CHECK-BE: %shl.i = shl <4 x i32
+// CHECK-BE: %or.i = or <4 x i32> %shl.i
 // CHECK-BE: @llvm.ppc.altivec.vrlwnm(<4 x i32
-// CHECK-BE: and <4 x i32
 // CHECK-BE: ret <4 x i32>
+// CHECK: %shl.i = shl <4 x i32
+// CHECK: %or.i = or <4 x i32> %shl.i
 // CHECK: @llvm.ppc.altivec.vrlwnm(<4 x i32
-// CHECK: and <4 x i32
 // CHECK: ret <4 x i32>
   return vec_rlnm(vuia, vuia, vuia);
 }
 vector unsigned long long test78(void) {
+// CHECK-BE: %shl.i = shl <2 x i64
+// CHECK-BE: %or.i = or <2 x i64> %shl.i
 // CHECK-BE: @llvm.ppc.altivec.vrldnm(<2 x i64
-// CHECK-BE: and <2 x i64
 // CHECK-BE-NEXT: ret <2 x i64>
+// CHECK: %shl.i = shl <2 x i64
+// CHECK: %or.i = or <2 x i64> %shl.i
 // CHECK: @llvm.ppc.altivec.vrldnm(<2 x i64
-// CHECK: and <2 x i64
 // CHECK-NEXT: ret <2 x i64>
   return vec_rlnm(vula, vula, vula);
 }
 vector double test79(void) {
 // CHECK-BE: extractelement <4 x float>
 // CHECK-BE: fpext float
 // CHECK-BE: insertelement <2 x double>
 // CHECK-BE: extractelement <4 x float>