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[PowerPC] Fix the wrong implementation of builtin vec_rlnm.
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Authored by jtony on Jan 10 2017, 12:12 PM.

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Summary

vec_rlnm was implemented according to the old ABI, which was wrong. The ABI team have fixed the issue (although not published yet). We need to re-implement these builtins according to the new ABI.

From (old implementation):
builtin_altivec_vrlwnm(a, b) & c;

To (new implementation):
vector unsigned int OneByte = { 0x8, 0x8, 0x8, 0x8 };
__builtin_altivec_vrlwnm(a, ((c << OneByte) | b));

Diff Detail

Event Timeline

jtony updated this revision to Diff 83846.Jan 10 2017, 12:12 PM
jtony retitled this revision from to [PowerPC] [PowerPC] Fix the wrong implementation of builtin vec_rlnm..
jtony updated this object.
jtony added reviewers: nemanjai, kbarton, sfertile, lei, syzaara.
jtony retitled this revision from [PowerPC] [PowerPC] Fix the wrong implementation of builtin vec_rlnm. to [PowerPC] Fix the wrong implementation of builtin vec_rlnm..Jan 10 2017, 12:16 PM
nemanjai accepted this revision.Jan 11 2017, 12:30 PM
nemanjai edited edge metadata.

Please fix the minor issue with the test case and then commit.
LGTM.

test/CodeGen/builtins-ppc-p9vector.c
871

Don't hard-code the names of intermediate results. I imagine this will fail even now on some build bot. Rather specify it as something like:
// CHECK-BE: %[[RES1:.+]] = shl <4 x i32

And feel free to use the saved result as the operand to the next instruction. Like:
// CHECK-BE: %[[RES2:.+]] = or <4 x i32> %[[RES1]]

This revision is now accepted and ready to land.Jan 11 2017, 12:30 PM
jtony marked an inline comment as done.Jan 11 2017, 12:47 PM
jtony closed this revision.Jan 12 2017, 5:21 PM