Remove the '-disable-llvm-passes' flag (which I didn't even know existed, and I suspect many others aren't aware of either) and strength '-disable-llvm-optzns' to do the same thing.

[chandlerc]

Summary

Much to my surprise, '-disable-llvm-optzns' which I thought was the
magical flag I wanted to get at the raw LLVM IR coming out of Clang
deosn't do that. It still runs some passes over the IR. I don't want
that, I really want the *raw* IR coming out of Clang and I strongly
suspect everyone else using it is in the same camp.

I've not talked to anyone debugging Clang and LLVM interactions that
needed these different flags so I'd like to remove the less widely known
one (I think) and consolidate on a simple, strong model for the one flag
left.

This is part of simplifying how Clang drives LLVM to make it cleaner to
wire up to the new pass manager.

[joerg]

There are two issues I have with the flags right now. The first one you are addressing with this patch. The second issue is they remain CC1-only flags. Can we introduce a proper "-emit-raw-llvm" flag to work like "-emit-llvm" but without the additional IR processing. We can make "-disable-llvm-optzns" an alias on the CC1-level for backwards compatibility. It is fine as a second step, but it would be nice to consider the big picture before shuffling things around.

[rnk]

How about standardizing on -disable-llvm-passes instead of -disable-llvm-optzns? I never liked "optzns" and can't remember how to spell it. Also, this flag disables LLVM instrumentation passes (ASan) as well as optimization passes, so I think -disable-llvm-passes is the better name.

[mehdi_amini]

In D28047#629746, @rnk wrote:

How about standardizing on -disable-llvm-passes instead of -disable-llvm-optzns? I never liked "optzns" and can't remember how to spell it. Also, this flag disables LLVM instrumentation passes (ASan) as well as optimization passes, so I think -disable-llvm-passes is the better name.

I agree with that.
To be friendly with developers/users we could print an error mentioning to use -disable-llvm-passes when they try to use -disable-llvm-optzns (which we accept as a -mllvm -disable-llvm-optzns hardcoded in the driver by the way).

[chandlerc]

In D28047#629824, @mehdi_amini wrote:

In D28047#629746, @rnk wrote:

How about standardizing on -disable-llvm-passes instead of -disable-llvm-optzns? I never liked "optzns" and can't remember how to spell it. Also, this flag disables LLVM instrumentation passes (ASan) as well as optimization passes, so I think -disable-llvm-passes is the better name.

I agree with that.
To be friendly with developers/users we could print an error mentioning to use -disable-llvm-passes when they try to use -disable-llvm-optzns (which we accept as a -mllvm -disable-llvm-optzns hardcoded in the driver by the way).

I only have a mild preference for how we spell the name based on the fact that i've told people to use -disable-llvm-optzns for years. If we want to go with ...-passes, fine with me.

I'll probably just add an alias so that you can use either spelling, but change the tests to consolidate on whichever spelling we end up with.

SG? I can regenerate the patch if desired, but it'll just be a lot of perl...

[mehdi_amini]

LGTM, but please wait for @rnk to confirm :)

Also any opinion about a driver option -emit-raw-llvm as @joerg suggested?

[rnk]

In D28047#629889, @chandlerc wrote:

I only have a mild preference for how we spell the name based on the fact that i've told people to use -disable-llvm-optzns for years. If we want to go with ...-passes, fine with me.

We have some freedom to change the -cc1 interface. I liked being able to pass -g to -cc1, but then we went to -debug-info-kind=(limited|full|linetables) or whatever. =?

I'll probably just add an alias so that you can use either spelling, but change the tests to consolidate on whichever spelling we end up with.

SG? I can regenerate the patch if desired, but it'll just be a lot of perl...

Sounds good! We definitely don't need both -disable-llvm-optzns and -disable-llvm-passes.

[chandlerc]

In D28047#629892, @mehdi_amini wrote:

LGTM, but please wait for @rnk to confirm :)

Also any opinion about a driver option -emit-raw-llvm as @joerg suggested?

I like the idea generally, but I don't have an immediate use case and would defer that to a subsequent patch authored by someone who wants this? I really only wanted to remove the divergence between two flags here.

[mehdi_amini]

In D28047#629922, @chandlerc wrote:

In D28047#629892, @mehdi_amini wrote:

LGTM, but please wait for @rnk to confirm :)
Also any opinion about a driver option -emit-raw-llvm as @joerg suggested?

I like the idea generally, but I don't have an immediate use case and would defer that to a subsequent patch authored by someone who wants this? I really only wanted to remove the divergence between two flags here.

Sure, even @joerg mentioned it was fine to leave for later in his suggestion, I just didn't want it to go unnoticed.

include/clang/Driver/CC1Options.td

HelpText<"Save temporary labels in the symbol table. "
            "on compiler-generated code.">;
 def mrelocation_model : Separate<["-"], "mrelocation-model">,
   HelpText<"The relocation model to use">;
 def fno_math_builtin : Flag<["-"], "fno-math-builtin">,
   HelpText<"Disable implicit builtin knowledge of math functions">;
 }
 
 def disable_llvm_optzns : Flag<["-"], "disable-llvm-optzns">,
-  HelpText<"Don't run LLVM optimization passes">;
+  HelpText<"Don't run LLVM passes prior to emitting IR or bitcode">;
 def disable_llvm_verifier : Flag<["-"], "disable-llvm-verifier">,
   HelpText<"Don't run the LLVM IR verifier pass">;
-def disable_llvm_passes : Flag<["-"], "disable-llvm-passes">,
-  HelpText<"Use together with -emit-llvm to get pristine LLVM IR from the "
-           "frontend by not running any LLVM passes at all">;
 def disable_red_zone : Flag<["-"], "disable-red-zone">,
   HelpText<"Do not emit code that uses the red zone.">;
 def dwarf_column_info : Flag<["-"], "dwarf-column-info">,
   HelpText<"Turn on column location information.">;
 def split_dwarf : Flag<["-"], "split-dwarf">,
   HelpText<"Split out the dwarf .dwo sections">;
 def gnu_pubnames : Flag<["-"], "gnu-pubnames">,
   HelpText<"Emit newer GNU style pubnames">;

include/clang/Frontend/CodeGenOptions.def

 CODEGENOPT(DisableFPElim     , 1, 0) ///< Set when -fomit-frame-pointer is enabled.
 CODEGENOPT(DisableFree       , 1, 0) ///< Don't free memory.
 CODEGENOPT(DiscardValueNames , 1, 0) ///< Discard Value Names from the IR (LLVMContext flag)
 CODEGENOPT(DisableGCov       , 1, 0) ///< Don't run the GCov pass, for testing.
 CODEGENOPT(DisableLLVMOpts   , 1, 0) ///< Don't run any optimizations, for use in
                                      ///< getting .bc files that correspond to the
                                      ///< internal state before optimizations are
                                      ///< done.
-CODEGENOPT(DisableLLVMPasses , 1, 0) ///< Don't run any LLVM IR passes to get
-                                     ///< the pristine IR generated by the
-                                     ///< frontend.
 CODEGENOPT(DisableRedZone    , 1, 0) ///< Set when -mno-red-zone is enabled.
 CODEGENOPT(DisableTailCalls  , 1, 0) ///< Do not emit tail calls.
 CODEGENOPT(EmitDeclMetadata  , 1, 0) ///< Emit special metadata indicating what
                                      ///< Decl* various IR entities came from.
                                      ///< Only useful when running CodeGen as a
                                      ///< subroutine.
 CODEGENOPT(EmitGcovArcs      , 1, 0) ///< Emit coverage data files, aka. GCDA.
 CODEGENOPT(EmitGcovNotes     , 1, 0) ///< Emit coverage "notes" files, aka GCNO.

lib/CodeGen/BackendUtil.cpp

static void addSymbolRewriterPass(const CodeGenOptions &Opts,
   for (const auto &MapFile : Opts.RewriteMapFiles)
     MapParser.parse(MapFile, &DL);
 
   MPM->add(createRewriteSymbolsPass(DL));
 }
 
 void EmitAssemblyHelper::CreatePasses(legacy::PassManager &MPM,
                                       legacy::FunctionPassManager &FPM) {
-  if (CodeGenOpts.DisableLLVMPasses)
+  // Handle disabling of LLVM optimization, where we want to preserve the
+  // internal module before any optimization.
+  if (CodeGenOpts.DisableLLVMOpts)
     return;
 
   unsigned OptLevel = CodeGenOpts.OptimizationLevel;
   CodeGenOptions::InliningMethod Inlining = CodeGenOpts.getInlining();
 
-  // Handle disabling of LLVM optimization, where we want to preserve the
-  // internal module before any optimization.
-  if (CodeGenOpts.DisableLLVMOpts) {
-    OptLevel = 0;
-    Inlining = CodeGenOpts.NoInlining;
-  }
-
   PassManagerBuilderWrapper PMBuilder(CodeGenOpts, LangOpts);
 
   // Figure out TargetLibraryInfo.  This needs to be added to MPM and FPM
   // manually (and not via PMBuilder), since some passes (eg. InstrProfiling)
   // are inserted before PMBuilder ones - they'd get the default-constructed
   // TLI with an unknown target otherwise.
   Triple TargetTriple(TheModule->getTargetTriple());
   std::unique_ptr<TargetLibraryInfoImpl> TLII(

lib/Driver/Tools.cpp

for (const Arg *A : Args.filtered(options::OPT_mllvm)) {
     // it and developers have been trained to spell it with -mllvm.
     if (StringRef(A->getValue(0)) == "-disable-llvm-optzns") {
       CmdArgs.push_back("-disable-llvm-optzns");
     } else
       A->render(Args, CmdArgs);
   }
 
   // With -save-temps, we want to save the unoptimized bitcode output from the
-  // CompileJobAction, use -disable-llvm-passes to get pristine IR generated
+  // CompileJobAction, use -disable-llvm-optzns to get pristine IR generated
   // by the frontend.
   // When -fembed-bitcode is enabled, optimized bitcode is emitted because it
   // has slightly different breakdown between stages.
   // FIXME: -fembed-bitcode -save-temps will save optimized bitcode instead of
   // pristine IR generated by the frontend. Ideally, a new compile action should
   // be added so both IR can be captured.
   if (C.getDriver().isSaveTempsEnabled() &&
       !C.getDriver().embedBitcodeInObject() && isa<CompileJobAction>(JA))
-    CmdArgs.push_back("-disable-llvm-passes");
+    CmdArgs.push_back("-disable-llvm-optzns");
 
   if (Output.getType() == types::TY_Dependencies) {
     // Handled with other dependency code.
   } else if (Output.isFilename()) {
     CmdArgs.push_back("-o");
     CmdArgs.push_back(Output.getFilename());
   } else {
     assert(Output.isNothing() && "Invalid output.");

lib/Frontend/CompilerInvocation.cpp

static bool ParseCodeGenArgs(CodeGenOptions &Opts, ArgList &Args, InputKind IK,
   for (const auto &Arg : Args.getAllArgValues(OPT_fdebug_prefix_map_EQ))
     Opts.DebugPrefixMap.insert(StringRef(Arg).split('='));
 
   if (const Arg *A =
           Args.getLastArg(OPT_emit_llvm_uselists, OPT_no_emit_llvm_uselists))
     Opts.EmitLLVMUseLists = A->getOption().getID() == OPT_emit_llvm_uselists;
 
   Opts.DisableLLVMOpts = Args.hasArg(OPT_disable_llvm_optzns);
-  Opts.DisableLLVMPasses = Args.hasArg(OPT_disable_llvm_passes);
   Opts.DisableRedZone = Args.hasArg(OPT_disable_red_zone);
   Opts.ForbidGuardVariables = Args.hasArg(OPT_fforbid_guard_variables);
   Opts.UseRegisterSizedBitfieldAccess = Args.hasArg(
     OPT_fuse_register_sized_bitfield_access);
   Opts.RelaxedAliasing = Args.hasArg(OPT_relaxed_aliasing);
   Opts.StructPathTBAA = !Args.hasArg(OPT_no_struct_path_tbaa);
   Opts.DwarfDebugFlags = Args.getLastArgValue(OPT_dwarf_debug_flags);
   Opts.MergeAllConstants = !Args.hasArg(OPT_fno_merge_all_constants);

test/CodeGen/debug-info-scope.c

-// RUN: %clang_cc1 -dwarf-version=4 -debug-info-kind=limited -disable-llvm-passes -emit-llvm < %s | FileCheck %s
-// RUN: %clang_cc1 -dwarf-version=4 -debug-info-kind=line-tables-only -disable-llvm-passes -emit-llvm < %s | FileCheck --check-prefix=GMLT %s
+// RUN: %clang_cc1 -dwarf-version=4 -debug-info-kind=limited -disable-llvm-optzns -emit-llvm < %s | FileCheck %s
+// RUN: %clang_cc1 -dwarf-version=4 -debug-info-kind=line-tables-only -disable-llvm-optzns -emit-llvm < %s | FileCheck --check-prefix=GMLT %s
 // Two variables with same name in separate scope.
 // Radar 8330217.
 int main() {
   int j = 0;
   int k = 0;
 // CHECK: !DILocalVariable(name: "i"
 // CHECK-NEXT: !DILexicalBlock(
 

test/CodeGen/sanitize-address-field-padding.cpp

 // Test -fsanitize-address-field-padding
 // RUN: echo 'type:SomeNamespace::BlacklistedByName=field-padding' > %t.type.blacklist
 // RUN: echo 'src:*sanitize-address-field-padding.cpp=field-padding' > %t.file.blacklist
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -fsanitize=address -fsanitize-address-field-padding=1 -fsanitize-blacklist=%t.type.blacklist -Rsanitize-address -emit-llvm -o - %s 2>&1 | FileCheck %s
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -fsanitize=address -fsanitize-address-field-padding=1 -fsanitize-blacklist=%t.type.blacklist -Rsanitize-address -emit-llvm -o - %s -O1 -mconstructor-aliases 2>&1 | FileCheck %s --check-prefix=WITH_CTOR_ALIASES
 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -fsanitize=address -fsanitize-address-field-padding=1 -fsanitize-blacklist=%t.file.blacklist -Rsanitize-address -emit-llvm -o - %s 2>&1 | FileCheck %s --check-prefix=FILE_BLACKLIST
 // RUN: %clang_cc1 -fsanitize=address -emit-llvm -o - %s 2>&1 | FileCheck %s --check-prefix=NO_PADDING
-// Try to emulate -save-temps option and make sure -disable-llvm-passes will not run sanitize instrumentation.
-// RUN: %clang_cc1 -fsanitize=address -emit-llvm -disable-llvm-passes -o - %s | %clang_cc1 -fsanitize=address -emit-llvm -o - -x ir | FileCheck %s --check-prefix=NO_PADDING
+// Try to emulate -save-temps option and make sure -disable-llvm-optzns will not run sanitize instrumentation.
+// RUN: %clang_cc1 -fsanitize=address -emit-llvm -disable-llvm-optzns -o - %s | %clang_cc1 -fsanitize=address -emit-llvm -o - -x ir | FileCheck %s --check-prefix=NO_PADDING
 //
 
 // The reasons to ignore a particular class are not set in stone and will change.
 //
 // CHECK: -fsanitize-address-field-padding applied to Positive1
 // CHECK: -fsanitize-address-field-padding ignored for Negative1 because it is trivially copyable
 // CHECK: -fsanitize-address-field-padding ignored for Negative2 because it is trivially copyable
 // CHECK: -fsanitize-address-field-padding ignored for Negative3 because it is a union

test/CodeGenCUDA/convergent.cu

 // REQUIRES: x86-registered-target
 // REQUIRES: nvptx-registered-target
 
 // RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -emit-llvm \
-// RUN:   -disable-llvm-passes -o - %s | FileCheck -check-prefix DEVICE %s
+// RUN:   -disable-llvm-optzns -o - %s | FileCheck -check-prefix DEVICE %s
 
 // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm \
-// RUN:   -disable-llvm-passes -o - %s | \
+// RUN:   -disable-llvm-optzns -o - %s | \
 // RUN:  FileCheck -check-prefix HOST %s
 
 #include "Inputs/cuda.h"
 
 // DEVICE: Function Attrs:
 // DEVICE-SAME: convergent
 // DEVICE-NEXT: define void @_Z3foov
 __device__ void foo() {}

test/CodeGenCUDA/fp-contract.cu

 // REQUIRES: x86-registered-target
 // REQUIRES: nvptx-registered-target
 
 // By default we should fuse multiply/add into fma instruction.
 // RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN:   -disable-llvm-passes -o - %s | FileCheck -check-prefix ENABLED %s
+// RUN:   -disable-llvm-optzns -o - %s | FileCheck -check-prefix ENABLED %s
 
 // Explicit -ffp-contract=fast
 // RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN:   -ffp-contract=fast -disable-llvm-passes -o - %s \
+// RUN:   -ffp-contract=fast -disable-llvm-optzns -o - %s \
 // RUN:   | FileCheck -check-prefix ENABLED %s
 
 // Explicit -ffp-contract=on -- fusing by front-end (disabled).
 // RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN:   -ffp-contract=on -disable-llvm-passes -o - %s \
+// RUN:   -ffp-contract=on -disable-llvm-optzns -o - %s \
 // RUN:   | FileCheck -check-prefix DISABLED %s
 
 // Explicit -ffp-contract=off should disable instruction fusing.
 // RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN:   -ffp-contract=off -disable-llvm-passes -o - %s \
+// RUN:   -ffp-contract=off -disable-llvm-optzns -o - %s \
 // RUN:   | FileCheck -check-prefix DISABLED %s
 
 
 #include "Inputs/cuda.h"
 
 __host__ __device__ float func(float a, float b, float c) { return a + b * c; }
 // ENABLED:       fma.rn.f32
 // ENABLED-NEXT:  st.param.f32
 
 // DISABLED:      mul.rn.f32
 // DISABLED-NEXT: add.rn.f32
 // DISABLED-NEXT: st.param.f32

test/CodeGenCUDA/link-device-bitcode.cu

 // Test for linking with CUDA's libdevice as outlined in
 // http://llvm.org/docs/NVPTXUsage.html#linking-with-libdevice
 //
 // REQUIRES: nvptx-registered-target
 //
 // Prepare bitcode file to link with
 // RUN: %clang_cc1 -triple nvptx-unknown-cuda -emit-llvm-bc \
-// RUN:    -disable-llvm-passes -o %t.bc %S/Inputs/device-code.ll
+// RUN:    -disable-llvm-optzns -o %t.bc %S/Inputs/device-code.ll
 // RUN: %clang_cc1 -triple nvptx-unknown-cuda -emit-llvm-bc \
-// RUN:    -disable-llvm-passes -o %t-2.bc %S/Inputs/device-code-2.ll
+// RUN:    -disable-llvm-optzns -o %t-2.bc %S/Inputs/device-code-2.ll
 //
 // Make sure function in device-code gets linked in and internalized.
 // RUN: %clang_cc1 -triple nvptx-unknown-cuda -fcuda-is-device \
 // RUN:    -mlink-cuda-bitcode %t.bc  -emit-llvm \
-// RUN:    -disable-llvm-passes -o - %s \
+// RUN:    -disable-llvm-optzns -o - %s \
 // RUN:    | FileCheck %s -check-prefix CHECK-IR
 //
 // Make sure we can link two bitcode files.
 // RUN: %clang_cc1 -triple nvptx-unknown-cuda -fcuda-is-device \
 // RUN:    -mlink-cuda-bitcode %t.bc -mlink-cuda-bitcode %t-2.bc \
-// RUN:    -emit-llvm -disable-llvm-passes -o - %s \
+// RUN:    -emit-llvm -disable-llvm-optzns -o - %s \
 // RUN:    | FileCheck %s -check-prefix CHECK-IR -check-prefix CHECK-IR-2
 //
 // Make sure function in device-code gets linked but is not internalized
 // without -fcuda-uses-libdevice
 // RUN: %clang_cc1 -triple nvptx-unknown-cuda -fcuda-is-device \
 // RUN:    -mlink-bitcode-file %t.bc -emit-llvm \
-// RUN:    -disable-llvm-passes -o - %s \
+// RUN:    -disable-llvm-optzns -o - %s \
 // RUN:    | FileCheck %s -check-prefix CHECK-IR-NLD
 //
 // Make sure NVVMReflect pass is enabled in NVPTX back-end.
 // RUN: %clang_cc1 -triple nvptx-unknown-cuda -fcuda-is-device \
 // RUN:    -mlink-cuda-bitcode %t.bc -S -o /dev/null %s \
 // RUN:    -backend-option -debug-pass=Structure 2>&1 \
 // RUN:    | FileCheck %s -check-prefix CHECK-REFLECT
 

test/CodeGenCUDA/nothrow.cu

 // RUN: %clang_cc1 -std=c++11 -fcxx-exceptions -fexceptions -fcuda-is-device \
-// RUN:   -triple nvptx-nvidia-cuda -emit-llvm -disable-llvm-passes -o - %s | \
+// RUN:   -triple nvptx-nvidia-cuda -emit-llvm -disable-llvm-optzns -o - %s | \
 // RUN: FileCheck -check-prefix DEVICE %s
 
 // RUN: %clang_cc1 -std=c++11 -fcxx-exceptions -fexceptions \
-// RUN:   -triple x86_64-unknown-linux-gnu -emit-llvm -disable-llvm-passes -o - %s | \
+// RUN:   -triple x86_64-unknown-linux-gnu -emit-llvm -disable-llvm-optzns -o - %s | \
 // RUN:  FileCheck -check-prefix HOST %s
 
 #include "Inputs/cuda.h"
 
 __host__ __device__ void f();
 
 // HOST: define void @_Z7host_fnv() [[HOST_ATTR:#[0-9]+]]
 void host_fn() { f(); }

test/CodeGenCXX/alias-available-externally.cpp

-// RUN: %clang_cc1 -O1 -std=c++11 -emit-llvm -triple %itanium_abi_triple -disable-llvm-passes -o - %s | FileCheck %s
+// RUN: %clang_cc1 -O1 -std=c++11 -emit-llvm -triple %itanium_abi_triple -disable-llvm-optzns -o - %s | FileCheck %s
 // Clang should not generate alias to available_externally definitions.
 // Check that the destructor of Foo is defined.
 // The destructors have different return type for different targets.
 // CHECK: define linkonce_odr {{.*}} @_ZN3FooD2Ev
 template <class CharT>
 struct String {
   String() {}
   ~String();

test/CodeGenCoroutines/coro-alloc.cpp

-// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -emit-llvm %s -o - -disable-llvm-optzns | FileCheck %s
 
 namespace std {
 namespace experimental {
 template <typename... T>
 struct coroutine_traits; // expected-note {{declared here}}
 }
 }
 

test/CodeGenCoroutines/coro-builtins.c

-// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc18.0.0 -fcoroutines-ts -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc18.0.0 -fcoroutines-ts -emit-llvm %s -o - -disable-llvm-optzns | FileCheck %s
 
 void *myAlloc(long long);
 
 // CHECK-LABEL: f( 
 void f(int n) {
   // CHECK: %n.addr = alloca i32
   // CHECK: %n_copy = alloca i32
   // CHECK: %promise = alloca i32

test/CodeGenCoroutines/microsoft-abi-operator-coawait.cpp

-// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc18.0.0 -fcoroutines-ts -emit-llvm %s -o - -std=c++14 -disable-llvm-passes | FileCheck %s
+// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc18.0.0 -fcoroutines-ts -emit-llvm %s -o - -std=c++14 -disable-llvm-optzns | FileCheck %s
 struct no_suspend {
   bool await_ready() { return true; }
   template <typename F> void await_suspend(F) {}
   void await_resume() {}
 };
 
 struct A {
   no_suspend operator co_await() { return {}; }

test/CodeGenObjC/arc-linetable.m

-// RUN: %clang_cc1 -emit-llvm -fblocks -fobjc-arc -debug-info-kind=standalone -dwarf-version=4 -disable-llvm-passes -triple x86_64-apple-darwin10 %s -o - | FileCheck %s
+// RUN: %clang_cc1 -emit-llvm -fblocks -fobjc-arc -debug-info-kind=standalone -dwarf-version=4 -disable-llvm-optzns -triple x86_64-apple-darwin10 %s -o - | FileCheck %s
 
 // Legend: EXP = Return expression, RET = ret instruction
 
 // CHECK: define {{.*}}testNoSideEffect
 // CHECK: call void @objc_storeStrong{{.*}}
 // CHECK: call void @objc_storeStrong{{.*}} !dbg ![[RET1:[0-9]+]]
 // CHECK: ret {{.*}} !dbg ![[RET1]]
 

test/Driver/save-temps.c

 // RUN: %clang -target x86_64-apple-darwin -save-temps -arch x86_64 %s -### 2>&1 \
 // RUN:   | FileCheck %s
 // CHECK: "-o" "save-temps.i"
 // CHECK: "-emit-llvm-uselists"
-// CHECK: "-disable-llvm-passes"
+// CHECK: "-disable-llvm-optzns"
 // CHECK: "-o" "save-temps.bc"
 // CHECK: "-o" "save-temps.s"
 // CHECK: "-o" "save-temps.o"
 // CHECK: "-o" "a.out"
 
 // Check -save-temps=cwd which should work the same as -save-temps above
 //
 // RUN: %clang -target x86_64-apple-darwin -save-temps=cwd -arch x86_64 %s -### 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=CWD
 // CWD: "-o" "save-temps.i"
 // CWD: "-emit-llvm-uselists"
-// CWD: "-disable-llvm-passes"
+// CWD: "-disable-llvm-optzns"
 // CWD: "-o" "save-temps.bc"
 // CWD: "-o" "save-temps.s"
 // CWD: "-o" "save-temps.o"
 // CWD: "-o" "a.out"
 
 // Check for a single clang cc1 invocation when NOT using -save-temps.
 // RUN: %clang -target x86_64-apple-darwin -arch x86_64 -S %s -### 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=NO-TEMPS

 // MULT-ARCH-CWD: "-create" "-output" "a.out" "a.out-i386" "a.out-x86_64"
 
 // Check that temp files are saved in the same directory as the output file
 // regardless of whether -o is specified.
 //
 // RUN: %clang -target x86_64-apple-darwin -save-temps=obj -o obj/dir/a.out -arch x86_64 %s -### 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=CHECK-OBJ
 // CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}save-temps.i"
-// CHECK-OBJ: "-disable-llvm-passes"
+// CHECK-OBJ: "-disable-llvm-optzns"
 // CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}save-temps.bc"
 // CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}save-temps.s"
 // CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}save-temps.o"
 // CHECK-OBJ: "-o" "obj/dir{{/|\\\\}}a.out"
 //
 // RUN: %clang -target x86_64-apple-darwin -save-temps=obj -arch x86_64 %s -### 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=CHECK-OBJ-NOO
 // CHECK-OBJ-NOO: "-o" "save-temps.i"
-// CHECK-OBJ-NOO: "-disable-llvm-passes"
+// CHECK-OBJ-NOO: "-disable-llvm-optzns"
 // CHECK-OBJ-NOO: "-o" "save-temps.bc"
 // CHECK-OBJ-NOO: "-o" "save-temps.s"
 // CHECK-OBJ-NOO: "-o" "save-temps.o"
 // CHECK-OBJ-NOO: "-o" "a.out"
 
 // RUN: %clang -target i386-unknown-freebsd -save-temps -g -c %s -### 2>&1 \
 // RUN:   | FileCheck %s -check-prefix=CHECK-SAVE-TEMPS
 // CHECK-SAVE-TEMPS: "-cc1as"
 // CHECK-SAVE-TEMPS: "-dwarf-version={{.}}"