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[PPC] add absolute difference altivec instructions and matching intrinsics
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Authored by sfertile on Oct 28 2016, 6:12 AM.

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Summary

adds vabsd* instruction for unsigned byte/halfword/word, and matching intrinsics to expose them.

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sfertile updated this revision to Diff 76183.Oct 28 2016, 6:12 AM
sfertile retitled this revision from to [PPC] add absolute difference altivec instructions and matching intrinsics .
sfertile updated this object.
sfertile set the repository for this revision to rL LLVM.
sfertile added a subscriber: llvm-commits.
sfertile removed a subscriber: nemanjai.
amehsan added inline comments.Oct 28 2016, 9:26 AM
lib/Target/PowerPC/PPCInstrAltivec.td
1409–1418

IIRC, when I was doing the patches that I sent you, there was a generic absolute value intrinsic, that I could use. That is better than the PPC intrinsics, because it is more likely that optimizations understand it. Could you use the generic one here?

test/CodeGen/PowerPC/vec_absd.ll
2–3

you should not need -mattr=+altivec when you have -mcpu=pwr9. Does something go wrong when you remove that?

nemanjai added inline comments.Oct 28 2016, 9:51 AM
include/llvm/IR/IntrinsicsPowerPC.td
697

Been a while since I looked at this, but do the PowerPC_Vec_BBB_Intrinsic and it's halfword and word equivalent not have the same definition as this (and therefore allow you to more concisely define these)? Basically what I'm getting at is using the most specialized class that has the right form.

lib/Target/PowerPC/PPCInstrAltivec.td
454

Please don't add blank lines arbitrarily.

1409–1418

I don't think there is a generic one for integer types, but I might be wrong. I think there's only llvm.fabs.

1411

This is a very minor nit, but the very first characters on the continuation line should line up inside the angle bracket. So the double quote character should line up with the 1 character above.

test/CodeGen/PowerPC/vec_absd.ll
2–3

I agree. If this test case behaves differently with and without -mattr=+altivec, we need to look into why.

21

Please add the register operands here. The ABI locks all 3.
vabsdub 2, 2, 3
The same goes for the other tests as well.

test/MC/Disassembler/PowerPC/ppc64-encoding-p9vector.txt
1 ↗(On Diff #76183)

Please don't add this file or the one below. The assembler and disassembler do not care about predicates. If they understand an encoding, they will emit what it is. Just add these to the existing test cases.

sfertile updated this revision to Diff 76223.Oct 28 2016, 11:49 AM
sfertile removed rL LLVM as the repository for this revision.

Updated based on the review comments:

  1. fixed extra blank line/spacing issues
  2. switched the intrinsics to use the most derived type that fits the format
  3. removed the new test files and put the checks into the existing files
  4. removed the unneeded altivec feature to the codegen test
sfertile marked 5 inline comments as done.Oct 28 2016, 11:58 AM
sfertile added inline comments.
include/llvm/IR/IntrinsicsPowerPC.td
697

Your right, I've updated them to use the specialized formats.

lib/Target/PowerPC/PPCInstrAltivec.td
1409–1418

I checked, there isn't a generic version of absolute difference to use.

sfertile set the repository for this revision to rL LLVM.Oct 28 2016, 11:59 AM
kbarton accepted this revision.Oct 31 2016, 8:58 AM
kbarton edited edge metadata.

LGTM

This revision is now accepted and ready to land.Oct 31 2016, 8:58 AM
nemanjai edited edge metadata.Oct 31 2016, 12:57 PM

Committed revision 285627.
Sean, please close this review if there are no buildbot failures.

sfertile closed this revision.Nov 1 2016, 5:49 AM
sfertile marked an inline comment as done.