[InstCombine] New opportunities for FoldAndOfICmp and FoldXorOfICmp

[amehsan]

Summary

This is motivated by PR-30483. New testcases and comments in the code explain the opportunities. Still more work can be done for this. I will open new PR for remaining cases (including those that Sanjay mentioned in the PR 30483)

[spatel]

I know we want to expand the patterns that are matched beyond what's included in this patch, but it's not clear to me why we need IsAnyBitSet() for these cases. Eg, there are no tests for the 'icmp ugt' case.

Is it simpler to just use more direct pattern matching for now and then see how it can be recoded as we add cases?

I'm also wondering if there's some way to reuse the existing decomposeBitTestICmp() or the code in foldSelectInstWithICmp() that is marked with a FIXME. We also have isSignBitCheck() and isSignTest() in InstCombineCompares.cpp. There must be some way to refactor all of this logic because we're looking for similar patterns in several different places?

test/Transforms/InstCombine/and-or-icmps.ll

54–60

You can use utils/update_test_checks.py to auto-generate better checks for all of these tests. That's how the existing checks in this file were produced.

[majnemer]

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

744–750

A tuple with multiple bool types can be a little confusing. I'd prefer a little struct. At the very least, this needs to be documented.

751

Please follow the LLVM naming convention.

752–754

Prefer early return to reduce indentation.

752–755

Prefer auto *

756–769

Prefer std::initialzier_list syntax here to reduce visual noise.

762–765

These parenthesis are not necessary.

834–835

auto *

836

Please stick the return on its own line.

[amehsan]

In D25200#562499, @spatel wrote:

I know we want to expand the patterns that are matched beyond what's included in this patch, but it's not clear to me why we need IsAnyBitSet() for these cases. Eg, there are no tests for the 'icmp ugt' case.

Is it simpler to just use more direct pattern matching for now and then see how it can be recoded as we add cases?

I'm also wondering if there's some way to reuse the existing decomposeBitTestICmp() or the code in foldSelectInstWithICmp() that is marked with a FIXME. We also have isSignBitCheck() and isSignTest() in InstCombineCompares.cpp. There must be some way to refactor all of this logic because we're looking for similar patterns in several different places?

IsAnyBitSet factors out common pattern matching logic in FoldAndOFICmp and FoldXorOfICmp. I can add testcase for UGT case. DecomposeBitTestICmp will be helpful to be called for extending the current functionality. Currently IsAnyBitSet expects patterns similar to those generated by decomposeBitTestICmp so I believe we can first call decomposeBitTestICmp and then IsAnyBitSet to extend the functionality. I prefer to leave that as an extension of the current functionality. isSignBitCheck is a similar but different functionality because it looks at a single special bit. IsAnyBitSet looks at masks that might have more than one bit. I also looked at the FIXME in simplifySelectWithICmpCond if that is what you mean. It says the logic is similar to decomposeBitTestICmp. So given what I said about decomposeBitTestICmp this is a separate issue.

[amehsan]

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

744–750

I figured that I will need to add some comments even if I have a struct, because the field names will not be clear enough. So I concluded creating a struct will not be a significant help to clarify things and so I added explanation to the comments before the function to explain each component of the return value. Will update the patch shortly.

[amehsan]

Applied the comments marked as DONE.

[amehsan]

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

744–750

Actually, I changed my mind about this. Will add an struct and update the patch.

[amehsan]

returning a struct from the helper function instead of std::tuple

[majnemer]

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

760

auto *

762

Er, shouldn't this be !Inst || Inst->getOpcode() != Instruction::And

[amehsan]

Thanks David for the review. I have tested this with test-suite. I forgot to do so, after I made first set of changes.

[amehsan]

ping :-)

Could someone take a look at this?

[amehsan]

@spatel @eli.friedman Could one of you please look at this patch? @majnemer said he is busy and will be even busier next week.

[amehsan]

In D25200#600208, @amehsan wrote:

@spatel @eli.friedman Could one of you please look at this patch? @majnemer said he is busy and will be even busier next week.

To be clear, @majnemer said that one of you guys can look into this instead of him.

[spatel]

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

747–748

Is the Valid field necessary? The callers can always just check if (!Mask) ?

755–758

I've scanned over this a few times, and it just never reads clearly to me. Can you add comments and example patterns, so we'll know how this will be used?

762–763

This was not updated to address the earlier review comment.

765

Please use m_APInt here or add a TODO comment because this won't work for vectors.

776–778

The UGT case still has no test coverage?

834–835

Same as above - use m_APInt or add a TODO about the lack of vector support.

840

Can we check that RHSCst == LHSCst and remove the getBitWidth checks below?

844–846

This needs a comment that shows the pattern we are matching and what it folds to.

940

Can we check that RHSCst == LHSCst and remove the getBitWidth checks below?

946–952

This needs an explanatory comment with an example.

test/Transforms/InstCombine/and-or-icmps.ll

54–56

Each test should have a comment to explain the motivation. Ie, it's good to have negative tests, but I can't tell from glancing at these why we would do the transform in some cases and skip it in the others.

[amehsan]

Will shortly update the patch.

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

755–758

added a comment. I hope that make is it more readable.

840

See the respond to a similar comment below.

940

getBitWidth is used for the mask which is operand of the and operator. RHSCst and LHSCst are operands of icmp instructions. I double checked the set of conditions that I have used below and they are all required.

946–952

Example is provided in lines 945-946. (line numbers may change after updating the review). Will revise the comment to be more general and contains more details.

[spatel]

Thanks for adding the code and test comments - this is much easier to follow now. See inline comments for a couple of small items.

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

758–766

Simplify?

ConstantInt *Mask;
if (!match(LHS, m_And(m_Value(), m_ConstantInt(Mask))))
  return BGC;

840

Sorry for not seeing it, but I don't know how it's possible that:

(*BGC1.Mask == *BGC2.Mask) && (BGC1.Mask->getBitWidth() != BGC2.Mask->getBitWidth())

Can you add a test case to show where that happens?

To be clear, my proposal is to change the initial check:

if (RHSCst->isZero() && LHSCst->isZero())

to:

if (RHSCst->isZero() && LHSCst == RHSCst)

And then remove the bit width check from the later 'if' statement. The operand types of icmp and xor/and must match, so I thought that would be sufficient?

2799

Period at end of sentence.

[amehsan]

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

758–766

Sure.

840

operator== that is called with (*BGC1.Mask == *BGC2.Mask) has an assertion that the two masks has the same bitwidth. IIUC, if we want to do LHSCst == RHSCst the same operator== is called, and so we would need to check the bit widths of RHSCst and LHSCst. So overall it does not make a difference.

2799

Sure.

[spatel]

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

840

*BGC1.Mask == *BGC2.Mask is the APInt operator== and yes, it asserts on bitwidth.
LHSCst == RHSCst is just an equality check of 2 pointers. Ie, I think there can only be one '0' value of a given bitwidth.

[amehsan]

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

840

Sorry, I misinterpreted the code. Will change.

[spatel]

Sorry for not noticing this earlier, but InstCombine always canonicalizes the 'icmp ugt X, 0' cases to 'icmp ne X, 0' (see foldICmpUsingKnownBits()).

Can you just assert that the predicate is not 'ugt' in isAnyBitSet() and simplify that a bit more? Ie, we don't need a switch if we know that eq/ne are the only predicate possibilities for this transform.

[spatel]

In D25200#610626, @spatel wrote:

Can you just assert that the predicate is not 'ugt' in isAnyBitSet() and simplify that a bit more? Ie, we don't need a switch if we know that eq/ne are the only predicate possibilities for this transform.

"assert" is probably too strong...I've made that mistake before. :)
But I think it's still safe to ignore the 'ugt' case and assume that InstCombine will churn that away sooner or later.

[amehsan]

In D25200#610628, @spatel wrote:

In D25200#610626, @spatel wrote:

Can you just assert that the predicate is not 'ugt' in isAnyBitSet() and simplify that a bit more? Ie, we don't need a switch if we know that eq/ne are the only predicate possibilities for this transform.

"assert" is probably too strong...I've made that mistake before. :)
But I think it's still safe to ignore the 'ugt' case and assume that InstCombine will churn that away sooner or later.

You are right (I just tried it :-) If that is the only concern is it possible to approve this and I will remove that line from the switch stmt. (I think it does not hurt to leave the testcases though) and commit.

[spatel]

In D25200#610847, @amehsan wrote:

You are right (I just tried it :-) If that is the only concern is it possible to approve this and I will remove that line from the switch stmt. (I think it does not hurt to leave the testcases though) and commit.

Yes, it's good to keep the tests to make sure the underlying assumption doesn't break.
LGTM - although I don't think we need a switch for just 2 cases. :)

[amehsan]

In D25200#610857, @spatel wrote:

In D25200#610847, @amehsan wrote:

You are right (I just tried it :-) If that is the only concern is it possible to approve this and I will remove that line from the switch stmt. (I think it does not hurt to leave the testcases though) and commit.

Yes, it's good to keep the tests to make sure the underlying assumption doesn't break.
LGTM - although I don't think we need a switch for just 2 cases. :)

Sure :-) Will change it to if statement after removing UGT

[amehsan]

rL289813

lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

if (Mask & FoldMskICmp_BMask_Mixed) {
     Value *NewOr1 = Builder->CreateOr(B, D);
     Value *NewOr2 = ConstantExpr::getOr(CCst, ECst);
     Value *NewAnd = Builder->CreateAnd(A, NewOr1);
     return Builder->CreateICmp(NewCC, NewAnd, NewOr2);
   }
   return nullptr;
 }
 
+// For an ICMP where RHS is zero, we want to check if the ICMP is equivalent to
+// comparing a group of bits in an integer value against zero. We return a tuple
+// (X, Y, Z) to indicate the result.
+// X is a boolean, which indicates the icmp has the desired form. If false,
+// values of Y and Z should be ignored.
+// Y is a boolean which indicates whether we check that the bit group of
+// interest is all zero, or it has some non-zero bit.
+// Z is a mask that specifies the bit group of interest.
+static std::tuple<bool, bool, const APInt *>
+isAnyBitSet(Value *LHS, ICmpInst::Predicate CC) {
+  auto Inst = dyn_cast<Instruction>(LHS);
+
+  if (Inst && Inst->getOpcode() != Instruction::And)
+    return {false, false, nullptr};
+
+  auto *Mask = dyn_cast<ConstantInt>(Inst->getOperand(1));
+  if (!Mask)
+    return {false, false, nullptr};
+
+  switch (CC) {
+  default: break;
+  case ICmpInst::ICMP_EQ:
+    return {true, false, &Mask->getValue()};
+  case ICmpInst::ICMP_NE:
+  case ICmpInst::ICMP_UGT:
+    return {true, true, &Mask->getValue()};
+  }
+
+  return {false, false, nullptr};
+}
+
 /// Try to fold a signed range checked with lower bound 0 to an unsigned icmp.
 /// Example: (icmp sge x, 0) & (icmp slt x, n) --> icmp ult x, n
 /// If \p Inverted is true then the check is for the inverted range, e.g.
 /// (icmp slt x, 0) | (icmp sgt x, n) --> icmp ugt x, n
 Value *InstCombiner::simplifyRangeCheck(ICmpInst *Cmp0, ICmpInst *Cmp1,
                                         bool Inverted) {
   // Check the lower range comparison, e.g. x >= 0
   // InstCombine already ensured that if there is a constant it's on the RHS.
   ConstantInt *RangeStart = dyn_cast<ConstantInt>(Cmp0->getOperand(1));
   if (!RangeStart)
     return nullptr;
 
if (!IsNotNegative)
     return nullptr;
 
   if (Inverted)
     NewPred = ICmpInst::getInversePredicate(NewPred);
 
   return Builder->CreateICmp(NewPred, Input, RangeEnd);
 }
 
+Value *InstCombiner::FoldXorOfICmps(ICmpInst *LHS, ICmpInst *RHS) {
+
+  Value *Val = LHS->getOperand(0), *Val2 = RHS->getOperand(0);
+  auto *LHSCst = dyn_cast<ConstantInt>(LHS->getOperand(1));
+  auto *RHSCst = dyn_cast<ConstantInt>(RHS->getOperand(1));
+  if (!LHSCst || !RHSCst)
+    return nullptr;
+  ICmpInst::Predicate LHSCC = LHS->getPredicate(), RHSCC = RHS->getPredicate();
+
+  if (RHSCst->isZero() && LHSCst->isZero()) {
+
+    bool IsBitCheck1, IsBitCheck2, CheckSet1, CheckSet2;
+    const APInt *Mask1, *Mask2;
+    std::tie(IsBitCheck1, CheckSet1, Mask1) = isAnyBitSet(Val, LHSCC);
+    std::tie(IsBitCheck2, CheckSet2, Mask2) = isAnyBitSet(Val2, RHSCC);
+    if (IsBitCheck1 && IsBitCheck2 && CheckSet1 == CheckSet2 &&
+        Mask1->getBitWidth() == Mask2->getBitWidth() &&
+        *Mask1 == *Mask2 &&
+        Mask1->isPowerOf2()) {
+      return Builder->CreateICmp(ICmpInst::ICMP_NE, Val2, Val);
+    }
+  }
+  return nullptr;
+}
+
 /// Fold (icmp)&(icmp) if possible.
 Value *InstCombiner::FoldAndOfICmps(ICmpInst *LHS, ICmpInst *RHS) {
   ICmpInst::Predicate LHSCC = LHS->getPredicate(), RHSCC = RHS->getPredicate();
 
   // (icmp1 A, B) & (icmp2 A, B) --> (icmp3 A, B)
   if (PredicatesFoldable(LHSCC, RHSCC)) {
     if (LHS->getOperand(0) == RHS->getOperand(1) &&
         LHS->getOperand(1) == RHS->getOperand(0))
if (SmallCst && BigCst) {
         Value *NewAnd = Builder->CreateAnd(V, Low | AndCst->getValue());
         APInt N = SmallCst->getValue().zext(BigBitSize) | BigCst->getValue();
         Value *NewVal = ConstantInt::get(AndCst->getType()->getContext(), N);
         return Builder->CreateICmp(LHSCC, NewAnd, NewVal);
       }
     }
   }
 
+  // E.g. (icmp eq x, 0) & (icmp ne y, 0) => icmp ult x, y if (x = and a, mask1)
+  // and (y = and b, mask2) where both masks have one bit and mask1 >= mask2
+  if (RHSCst->isZero() && LHSCst->isZero()) {
+    bool IsBitCheck1, IsBitCheck2, CheckSet1, CheckSet2;
+    const APInt *Mask1, *Mask2;
+    std::tie(IsBitCheck1, CheckSet1, Mask1) = isAnyBitSet(Val, LHSCC);
+    std::tie(IsBitCheck2, CheckSet2, Mask2) = isAnyBitSet(Val2, RHSCC);
+
+    if (IsBitCheck1 && IsBitCheck2 && (CheckSet1 != CheckSet2) &&
+        Mask1->getBitWidth() == Mask2->getBitWidth()) {
+      if (!CheckSet1 &&
+          Mask1->countTrailingZeros() >=
+          Mask2->getBitWidth() - Mask2->countLeadingZeros() - 1)
+        return Builder->CreateICmp(ICmpInst::ICMP_ULT, Val, Val2);
+      else if (!CheckSet2 &&
+          Mask2->countTrailingZeros() >=
+          Mask1->getBitWidth() - Mask1->countLeadingZeros() - 1)
+        return Builder->CreateICmp(ICmpInst::ICMP_ULT, Val2, Val);
+    }
+  }
+
   // From here on, we only handle:
   //    (icmp1 A, C1) & (icmp2 A, C2) --> something simpler.
   if (Val != Val2) return nullptr;
 
   // ICMP_[US][GL]E X, CST is folded to ICMP_[US][GL]T elsewhere.
   if (LHSCC == ICmpInst::ICMP_UGE || LHSCC == ICmpInst::ICMP_ULE ||
       RHSCC == ICmpInst::ICMP_UGE || RHSCC == ICmpInst::ICMP_ULE ||
       LHSCC == ICmpInst::ICMP_SGE || LHSCC == ICmpInst::ICMP_SLE ||
Instruction *InstCombiner::visitXor(BinaryOperator &I) {
   }
 
   Value *A = nullptr, *B = nullptr;
   // (A & ~B) ^ (~A) -> ~(A & B)
   if (match(Op0, m_And(m_Value(A), m_Not(m_Value(B)))) &&
       match(Op1, m_Not(m_Specific(A))))
     return BinaryOperator::CreateNot(Builder->CreateAnd(A, B));
 
-  // (icmp1 A, B) ^ (icmp2 A, B) --> (icmp3 A, B)
   if (ICmpInst *RHS = dyn_cast<ICmpInst>(I.getOperand(1)))
-    if (ICmpInst *LHS = dyn_cast<ICmpInst>(I.getOperand(0)))
+    if (ICmpInst *LHS = dyn_cast<ICmpInst>(I.getOperand(0))) {
+
+      // E.g. if we have xor (icmp eq %A, 0), (icmp eq %B, 0)
+      // and we know both A and B are either 8 (power of 2) or 0
+      // we can simplify to (icmp ne A, B)
+      if (Value *Res = FoldXorOfICmps(LHS, RHS))
+        return replaceInstUsesWith(I, Res);
+
+      // (icmp1 A, B) ^ (icmp2 A, B) --> (icmp3 A, B)
       if (PredicatesFoldable(LHS->getPredicate(), RHS->getPredicate())) {
         if (LHS->getOperand(0) == RHS->getOperand(1) &&
             LHS->getOperand(1) == RHS->getOperand(0))
           LHS->swapOperands();
         if (LHS->getOperand(0) == RHS->getOperand(0) &&
             LHS->getOperand(1) == RHS->getOperand(1)) {
           Value *Op0 = LHS->getOperand(0), *Op1 = LHS->getOperand(1);
           unsigned Code = getICmpCode(LHS) ^ getICmpCode(RHS);
           bool isSigned = LHS->isSigned() || RHS->isSigned();
           return replaceInstUsesWith(I,
                                getNewICmpValue(isSigned, Code, Op0, Op1,
                                                Builder));
         }
       }
+    }
 
   if (Instruction *CastedXor = foldCastedBitwiseLogic(I))
     return CastedXor;
 
   return Changed ? &I : nullptr;
 }

lib/Transforms/InstCombine/InstCombineInternal.h

public:
   Instruction *commonIRemTransforms(BinaryOperator &I);
   Instruction *commonDivTransforms(BinaryOperator &I);
   Instruction *commonIDivTransforms(BinaryOperator &I);
   Instruction *visitUDiv(BinaryOperator &I);
   Instruction *visitSDiv(BinaryOperator &I);
   Instruction *visitFDiv(BinaryOperator &I);
   Value *simplifyRangeCheck(ICmpInst *Cmp0, ICmpInst *Cmp1, bool Inverted);
   Value *FoldAndOfICmps(ICmpInst *LHS, ICmpInst *RHS);
+  Value *FoldXorOfICmps(ICmpInst *LHS, ICmpInst *RHS);
   Value *FoldAndOfFCmps(FCmpInst *LHS, FCmpInst *RHS);
   Instruction *visitAnd(BinaryOperator &I);
   Value *FoldOrOfICmps(ICmpInst *LHS, ICmpInst *RHS, Instruction *CxtI);
   Value *FoldOrOfFCmps(FCmpInst *LHS, FCmpInst *RHS);
   Instruction *FoldOrWithConstants(BinaryOperator &I, Value *Op, Value *A,
                                    Value *B, Value *C);
   Instruction *FoldXorWithConstants(BinaryOperator &I, Value *Op, Value *A,
                                     Value *B, Value *C);

test/Transforms/InstCombine/and-or-icmps.ll

 ; CHECK-NEXT:    ret i1 [[TMP1030_CMP]]
 ;
   %tmp1037 = icmp ne i32 %tmp1030, 39
   %tmp1039 = icmp ne i32 %tmp1030, 40
   %tmp1042 = and i1 %tmp1037, %tmp1039
   ret i1 %tmp1042
 }
 
+define i1 @test2(i32 %a, i32 %b) {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:    [[VAL1:%.*]] = and i32 %a, 8
+; CHECK-NEXT:    [[VAL2:%.*]] = and i32 %b, 8
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[VAL2]], [[VAL1]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+  %val1 = and i32 %a, 8
+  %val2 = and i32 %b, 8
+  %cmp.a = icmp ne i32 %val1, 0
+  %cmp.b = icmp eq i32 %val2, 0
+  %and = and i1 %cmp.b, %cmp.a
+  ret i1 %and
+}
+
+define i1 @test3(i32 %a, i32 %b) {
+; CHECK-LABEL: @test3(
+; CHECK-NEXT:    [[VAL1:%.*]] = and i32 %a, 8
+; CHECK-NEXT:    [[VAL2:%.*]] = and i32 %b, 8
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[VAL2]], [[VAL1]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+  %val1 = and i32 %a, 8
+  %val2 = and i32 %b, 8
+  %cmp.a = icmp ne i32 %val1, 0
+  %cmp.b = icmp eq i32 %val2, 0
+  %and = and i1 %cmp.a, %cmp.b
+  ret i1 %and
+}
+
+define i1 @test4(i32 %a, i32 %b) {
+; CHECK-LABEL: @test4(
+; CHECK-NEXT:    [[VAL1:%.*]] = and i32 %a, 15
+; CHECK-NEXT:    [[VAL2:%.*]] = and i32 %b, 24
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[VAL2]], [[VAL1]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+  %val1 = and i32 %a, 15
+  %val2 = and i32 %b, 24
+  %cmp.a = icmp ne i32 %val1, 0
+  %cmp.b = icmp eq i32 %val2, 0
+  %and = and i1 %cmp.a, %cmp.b
+  ret i1 %and
+}
+
+define i1 @test5(i32 %a, i32 %b) {
+; CHECK-LABEL: @test5(
+; CHECK-NEXT:    [[VAL1:%.*]] = and i32 %a, 15
+; CHECK-NEXT:    [[VAL2:%.*]] = and i32 %b, 24
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[VAL2]], [[VAL1]]
+; CHECK-NEXT:    ret i1 [[TMP1]]
+;
+  %val1 = and i32 %a, 15
+  %val2 = and i32 %b, 24
+  %cmp.a = icmp ne i32 %val1, 0
+  %cmp.b = icmp eq i32 %val2, 0
+  %and = and i1 %cmp.b, %cmp.a
+  ret i1 %and
+}
+
+define i1 @test6(i32 %a, i32 %b) {
+; CHECK-LABEL: @test6(
+; CHECK-NEXT:    [[VAL1:%.*]] = and i32 %a, 16
+; CHECK-NEXT:    [[VAL2:%.*]] = and i32 %b, 24
+; CHECK-NEXT:    [[CMP_A:%.*]] = icmp ne i32 [[VAL1]], 0
+; CHECK-NEXT:    [[CMP_B:%.*]] = icmp eq i32 [[VAL2]], 0
+; CHECK-NEXT:    [[AND:%.*]] = and i1 [[CMP_B]], [[CMP_A]]
+; CHECK-NEXT:    ret i1 [[AND]]
+;
+  %val1 = and i32 %a, 16
+  %val2 = and i32 %b, 24
+  %cmp.a = icmp ne i32 %val1, 0
+  %cmp.b = icmp eq i32 %val2, 0
+  %and = and i1 %cmp.b, %cmp.a
+  ret i1 %and
+}
+
+define i1 @test7(i16 %a, i32 %b) {
+; CHECK-LABEL: @test7(
+; CHECK-NEXT:    [[VAL1:%.*]] = and i16 %a, 15
+; CHECK-NEXT:    [[VAL2:%.*]] = and i32 %b, 24
+; CHECK-NEXT:    [[CMP_A:%.*]] = icmp ne i16 [[VAL1]], 0
+; CHECK-NEXT:    [[CMP_B:%.*]] = icmp eq i32 [[VAL2]], 0
+; CHECK-NEXT:    [[AND:%.*]] = and i1 [[CMP_B]], [[CMP_A]]
+; CHECK-NEXT:    ret i1 [[AND]]
+;
+  %val1 = and i16 %a, 15
+  %val2 = and i32 %b, 24
+  %cmp.a = icmp ne i16 %val1, 0
+  %cmp.b = icmp eq i32 %val2, 0
+  %and = and i1 %cmp.b, %cmp.a
+  ret i1 %and
+}
+
+define i1 @test8(i32 %a, i32 %b) {
+; CHECK-LABEL: @test8(
+; CHECK-NEXT:    [[TMP1:%.*]] = xor i32 %a, %b
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
+; CHECK-NEXT:    ret i1 [[TMP3]]
+;
+  %val1 = and i32 %a, 8
+  %val2 = and i32 %b, 8
+  %cmp.a = icmp ne i32 %val1, 0
+  %cmp.b = icmp ne i32 %val2, 0
+  %and = xor i1 %cmp.b, %cmp.a
+  ret i1 %and
+}
+
+define i1 @test9(i32 %a, i32 %b) {
+; CHECK-LABEL: @test9(
+; CHECK-NEXT:    [[VAL1:%.*]] = and i32 %a, 24
+; CHECK-NEXT:    [[VAL2:%.*]] = and i32 %b, 24
+; CHECK-NEXT:    [[CMP_A:%.*]] = icmp ne i32 [[VAL1]], 0
+; CHECK-NEXT:    [[CMP_B:%.*]] = icmp ne i32 [[VAL2]], 0
+; CHECK-NEXT:    [[AND:%.*]] = xor i1 [[CMP_B]], [[CMP_A]]
+; CHECK-NEXT:    ret i1 [[AND]]
+;
+  %val1 = and i32 %a, 24
+  %val2 = and i32 %b, 24
+  %cmp.a = icmp ne i32 %val1, 0
+  %cmp.b = icmp ne i32 %val2, 0
+  %and = xor i1 %cmp.b, %cmp.a
+  ret i1 %and
+}
+
+define i1 @test10(i32 %a, i32 %b) {
+; CHECK-LABEL: @test10(
+; CHECK-NEXT:    [[TMP1:%.*]] = xor i32 %a, %b
+; CHECK-NEXT:    [[TMP2:%.*]] = and i32 [[TMP1]], 8
+; CHECK-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
+; CHECK-NEXT:    ret i1 [[TMP3]]
+;
+  %val1 = and i32 %a, 8
+  %val2 = and i32 %b, 8
+  %cmp.a = icmp eq i32 %val1, 0
+  %cmp.b = icmp eq i32 %val2, 0
+  %and = xor i1 %cmp.b, %cmp.a
+  ret i1 %and
+}
+
+define i1 @test11(i16 %a, i32 %b) {
+; CHECK-LABEL: @test11(
+; CHECK-NEXT:    [[VAL1:%.*]] = and i16 %a, 8
+; CHECK-NEXT:    [[VAL2:%.*]] = and i32 %b, 8
+; CHECK-NEXT:    [[CMP_A:%.*]] = icmp ne i16 [[VAL1]], 0
+; CHECK-NEXT:    [[CMP_B:%.*]] = icmp ne i32 [[VAL2]], 0
+; CHECK-NEXT:    [[AND:%.*]] = xor i1 [[CMP_B]], [[CMP_A]]
+; CHECK-NEXT:    ret i1 [[AND]]
+;
+  %val1 = and i16 %a, 8
+  %val2 = and i32 %b, 8
+  %cmp.a = icmp ne i16 %val1, 0
+  %cmp.b = icmp ne i32 %val2, 0
+  %and = xor i1 %cmp.b, %cmp.a
+  ret i1 %and
+}
+
+