[RFC/WIP] CodeGen: Initial support for references to absolute symbols in immediate operands.

[pcc]

Summary

Our support for references to absolute symbols is not very good. The symbol
will be resolved accurately in non-PIC code, but suboptimally: the symbol
reference cannot currently appear as the immediate operand of an instruction,
and the code generator cannot make any assumptions about the value of the
symbol (so for example, it could not use a R_X86_64_8 relocation if the
value is known to be in the range 0..255).

In PIC mode, if the reference is not known to be DSO-local, the value is loaded
from the GOT (or a synthetic GOT entry), which again means suboptimal code. If
the reference is known to be DSO-local, the symbol will be referenced with a PC
relative relocation and therefore cannot be resolved properly to an absolute
value (c.f. D19844). The latter case in particular would seem to indicate
that a representational change is required for correctness to distinguish
references to absolute symbols from references to regular symbols. The
specific change I have in mind is to add an "absolute" flag to GlobalObject.

To allow the code generator to narrow absolute global references appearing
as immediates, we would allow !range metadata on GlobalObjects. This would
be similar to existing !range metadata, but it would apply to the "address"
of the attached GlobalObject, rather than any value loaded from it. See
for example the test case included with this patch, which involves a testb
instruction with an absolute immediate operand.

This patch implements part of this change. Rather than introducing the
"absolute" flag, it just checks for !range metadata on GlobalObjects
(switching to the correct representation is a TODO). At the SDAG level,
if a global reference has !range metadata and the target/object format
supports the required relocations (ELF only for now), we combine it into a
special ConstantSDNode which holds a reference to the symbol. Like any other
ConstantSDNode, this ConstantSDNode can appear as an immediate operand. This
means that we now have ConstantSDNodes which are not in fact constant integers,
but to a certain extent this seems like the least worst approach. I considered
other approaches before arriving at this one:

• Introduce a new opcode for absolute symbol constants. This intuitively seemed like the least risky approach, as individual instructions could "opt in" to the new absolute symbol references. However, this seems hard to fit into the existing SDAG pattern matching engine, as the engine expects each "variable" to have a specific opcode. I tried adding special support for "either of the two constant opcodes" to the matcher, but I could not see a good way to do it without making fundamental changes to how patterns are matched.

• Use the ISD::Constant opcode for absolute symbol constants, but introduce a separate class for them. This also seemed problematic, as there is a strong assumption (both in existing SDAG code and in generated code) of a many-to-one mapping from opcodes to classes.

In the end I decided that because

• this ConstantSDNode is morally similar in certain respects to a regular constant that can appear as an immediate, and SDAG already has an opcode which in principle inhibits looking at the constant value (i.e. TargetConstant)
• we can consider documenting absolute symbol references as an experimental feature
• we can avoid exposing this feature to C and so we have control over how it is used

it may be reasonable to proceed even in light of potential type confusion
problems.

[chandlerc]

I'm *really* excited to see this fixed. Our handling of these references has been a source of a lot of frustration.

A small comment on the overall design:

This patch implements part of this change. Rather than introducing the
"absolute" flag, it just checks for !range metadata on GlobalObjects
(switching to the correct representation is a TODO).

So you're still planning on adding the absolute bit here? What will that gain us over the range metadata?

At the SDAG level,
if a global reference has !range metadata and the target/object format
supports the required relocations (ELF only for now), we combine it into a
special ConstantSDNode which holds a reference to the symbol. Like any other
ConstantSDNode, this ConstantSDNode can appear as an immediate operand. This
means that we now have ConstantSDNodes which are not in fact constant integers,
but to a certain extent this seems like the least worst approach.

Oof. I see your explanation of why, but this does seem painful. We have both "target" and "opaque" constants already though (although i have *no* idea what "opaque" constants really are), so this doesn't really seem to make things much worse.

In some ways, modeling relocation constants as "target constants" makes a lot of sense...

[pcc]

So you're still planning on adding the absolute bit here? What will that gain us over the range metadata?

After thinking about this a little more, I think we don't need the absolute bit if we just define !range to mean "the address of this symbol is fixed at link time, and this is its range". That would seem to be the correct definition -- it would override any assumptions about the symbol value that may be derived from the relocation model, code model and symbol visibility rather than being a strict limitation (e.g. consider non-PIC code compiled with the medium code model -- this would be equivalent to a !range of [0..2^32) on every global but the metadata could in principle provide a wider range on 64-bit targets).

Oof. I see your explanation of why, but this does seem painful. We have both "target" and "opaque" constants already though (although i have *no* idea what "opaque" constants really are), so this doesn't really seem to make things much worse.

Agreed, though this has become more painful as I've been extending this patch to handle globals in more places. One possibility for lessening the pain may be to introduce derived classes of ConstantSDNode (one for ConstantInt and another for globals). I'll continue experimenting to see if I can find the best approach.

llvm/include/llvm/CodeGen/SelectionDAG.h

#endif
   SDValue getGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT,
                            int64_t offset = 0, bool isTargetGA = false,
                            unsigned char TargetFlags = 0);
   SDValue getTargetGlobalAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT,
                                  int64_t offset = 0,
                                  unsigned char TargetFlags = 0) {
     return getGlobalAddress(GV, DL, VT, offset, true, TargetFlags);
   }
+  SDValue getAbsoluteAddress(const GlobalValue *GV, const SDLoc &DL, EVT VT,
+                             bool isTarget = false);
   SDValue getFrameIndex(int FI, EVT VT, bool isTarget = false);
   SDValue getTargetFrameIndex(int FI, EVT VT) {
     return getFrameIndex(FI, VT, true);
   }
   SDValue getJumpTable(int JTI, EVT VT, bool isTarget = false,
                        unsigned char TargetFlags = 0);
   SDValue getTargetJumpTable(int JTI, EVT VT, unsigned char TargetFlags = 0) {
     return getJumpTable(JTI, VT, true, TargetFlags);

llvm/include/llvm/CodeGen/SelectionDAGNodes.h

public:
   }
 
   static bool classof(const SDNode *N) {
     return N->getOpcode() == ISD::VECTOR_SHUFFLE;
   }
 };
 
 class ConstantSDNode : public SDNode {
-  const ConstantInt *Value;
+  PointerUnion<const ConstantInt *, const GlobalValue *> Value;
   friend class SelectionDAG;
   ConstantSDNode(bool isTarget, bool isOpaque, const ConstantInt *val,
                  const DebugLoc &DL, EVT VT)
       : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DL,
                getSDVTList(VT)),
         Value(val) {
     ConstantSDNodeBits.IsOpaque = isOpaque;
   }
+  ConstantSDNode(bool isTarget, const GlobalValue *GV, const DebugLoc &DL,
+                 EVT VT)
+      : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DL,
+               getSDVTList(VT)),
+        Value(GV) {
+    ConstantSDNodeBits.IsOpaque = true;
+  }
+
 public:
+  bool isInt() const { return Value.is<const ConstantInt *>(); }
+
+  const ConstantInt *getConstantIntValue() const {
+    return Value.get<const ConstantInt *>();
+  }
+  const APInt &getAPIntValue() const { return getConstantIntValue()->getValue(); }
+  uint64_t getZExtValue() const { return getConstantIntValue()->getZExtValue(); }
+  int64_t getSExtValue() const { return getConstantIntValue()->getSExtValue(); }
 
-  const ConstantInt *getConstantIntValue() const { return Value; }
-  const APInt &getAPIntValue() const { return Value->getValue(); }
-  uint64_t getZExtValue() const { return Value->getZExtValue(); }
-  int64_t getSExtValue() const { return Value->getSExtValue(); }
-
-  bool isOne() const { return Value->isOne(); }
-  bool isNullValue() const { return Value->isNullValue(); }
-  bool isAllOnesValue() const { return Value->isAllOnesValue(); }
+  bool isOne() const { return getConstantIntValue()->isOne(); }
+  bool isNullValue() const { return getConstantIntValue()->isNullValue(); }
+  bool isAllOnesValue() const { return getConstantIntValue()->isAllOnesValue(); }
 
   bool isOpaque() const { return ConstantSDNodeBits.IsOpaque; }
 
+  bool isGlobal() const { return Value.is<const GlobalValue *>(); }
+  const GlobalValue *getGlobal() const { return Value.get<const GlobalValue *>(); }
+
   static bool classof(const SDNode *N) {
     return N->getOpcode() == ISD::Constant ||
            N->getOpcode() == ISD::TargetConstant;
   }
 };
 
 class ConstantFPSDNode : public SDNode {
   const ConstantFP *Value;

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

if (ISD::isBuildVectorOfConstantFPSDNodes(N.getNode()))
     return N.getNode();
   return nullptr;
 }
 
 // \brief Returns the SDNode if it is a constant splat BuildVector or constant
 // int.
 static ConstantSDNode *isConstOrConstSplat(SDValue N) {
   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N))
+    if (CN->isInt())
       return CN;
 
   if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N)) {
     BitVector UndefElements;
     ConstantSDNode *CN = BV->getConstantSplatNode(&UndefElements);
 
     // BuildVectors can truncate their operands. Ignore that case here.
     // FIXME: We blindly ignore splats which include undef which is overly
     // pessimistic.
if ((N0.getOpcode() == ISD::EXTRACT_VECTOR_ELT &&
     LoadSDNode *Load = cast<LoadSDNode>( (N0.getOpcode() == ISD::LOAD) ?
                                          N0 : N0.getOperand(0) );
 
     // Get the constant (if applicable) the zero'th operand is being ANDed with.
     // This can be a pure constant or a vector splat, in which case we treat the
     // vector as a scalar and use the splat value.
     APInt Constant = APInt::getNullValue(1);
     if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(N1)) {
+      if (C->isInt())
         Constant = C->getAPIntValue();
     } else if (BuildVectorSDNode *Vector = dyn_cast<BuildVectorSDNode>(N1)) {
       APInt SplatValue, SplatUndef;
       unsigned SplatBitSize;
       bool HasAnyUndefs;
       bool IsSplat = Vector->isConstantSplat(SplatValue, SplatUndef,
                                              SplatBitSize, HasAnyUndefs);
       if (IsSplat) {
         // Undef bits can contribute to a possible optimisation if set, so

llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

void InstrEmitter::AddOperand(MachineInstrBuilder &MIB,
                               unsigned IIOpNum,
                               const MCInstrDesc *II,
                               DenseMap<SDValue, unsigned> &VRBaseMap,
                               bool IsDebug, bool IsClone, bool IsCloned) {
   if (Op.isMachineOpcode()) {
     AddRegisterOperand(MIB, Op, IIOpNum, II, VRBaseMap,
                        IsDebug, IsClone, IsCloned);
   } else if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
+    if (C->isGlobal())
+      MIB.addGlobalAddress(C->getGlobal(), 0, 0);
+    else
       MIB.addImm(C->getSExtValue());
   } else if (ConstantFPSDNode *F = dyn_cast<ConstantFPSDNode>(Op)) {
     MIB.addFPImm(F->getConstantFPValue());
   } else if (RegisterSDNode *R = dyn_cast<RegisterSDNode>(Op)) {
     // Turn additional physreg operands into implicit uses on non-variadic
     // instructions. This is used by call and return instructions passing
     // arguments in registers.
     bool Imp = II && (IIOpNum >= II->getNumOperands() && !II->isVariadic());
     MIB.addReg(R->getReg(), getImplRegState(Imp));

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
   case ISD::TargetExternalSymbol:
   case ISD::ExternalSymbol:
   case ISD::MCSymbol:
     llvm_unreachable("Should only be used on nodes with operands");
   default: break;  // Normal nodes don't need extra info.
   case ISD::TargetConstant:
   case ISD::Constant: {
     const ConstantSDNode *C = cast<ConstantSDNode>(N);
+    if (C->isInt())
       ID.AddPointer(C->getConstantIntValue());
+    else
+      ID.AddPointer(C->getGlobal());
     ID.AddBoolean(C->isOpaque());
     break;
   }
   case ISD::TargetConstantFP:
   case ISD::ConstantFP: {
     ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
     break;
   }
SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, const SDLoc &DL,
 
   auto *N = newSDNode<GlobalAddressSDNode>(
       Opc, DL.getIROrder(), DL.getDebugLoc(), GV, VT, Offset, TargetFlags);
   CSEMap.InsertNode(N, IP);
     InsertNode(N);
   return SDValue(N, 0);
 }
 
+SDValue SelectionDAG::getAbsoluteAddress(const GlobalValue *GV, const SDLoc &DL,
+                                         EVT VT, bool isTarget) {
+  FoldingSetNodeID ID;
+  AddNodeIDNode(ID, ISD::Constant, getVTList(VT), None);
+  ID.AddPointer(GV);
+  void *IP = nullptr;
+  if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
+    return SDValue(E, 0);
+
+  auto *N = newSDNode<ConstantSDNode>(isTarget, GV, DL.getDebugLoc(), VT);
+  CSEMap.InsertNode(N, IP);
+  InsertNode(N);
+  return SDValue(N, 0);
+}
+
 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
   unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
   FoldingSetNodeID ID;
   AddNodeIDNode(ID, Opc, getVTList(VT), None);
   ID.AddInteger(FI);
   void *IP = nullptr;
   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
     return SDValue(E, 0);
void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
   KnownZero = KnownOne = APInt(BitWidth, 0);   // Don't know anything.
   if (Depth == 6)
     return;  // Limit search depth.
 
   APInt KnownZero2, KnownOne2;
 
   switch (Op.getOpcode()) {
   case ISD::Constant:
+    if (!cast<ConstantSDNode>(Op)->isInt())
+      break;
     // We know all of the bits for a constant!
     KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
     KnownZero = ~KnownOne;
     break;
   case ISD::BUILD_VECTOR:
     // Collect the known bits that are shared by every vector element.
     KnownZero = KnownOne = APInt::getAllOnesValue(BitWidth);
     for (SDValue SrcOp : Op->ops()) {

 }
 
 //===----------------------------------------------------------------------===//
 //                              SDNode Class
 //===----------------------------------------------------------------------===//
 
 bool llvm::isNullConstant(SDValue V) {
   ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
-  return Const != nullptr && Const->isNullValue();
+  return Const != nullptr && Const->isInt() && Const->isNullValue();
 }
 
 bool llvm::isNullFPConstant(SDValue V) {
   ConstantFPSDNode *Const = dyn_cast<ConstantFPSDNode>(V);
   return Const != nullptr && Const->isZero() && !Const->isNegative();
 }
 
 bool llvm::isAllOnesConstant(SDValue V) {
   ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
-  return Const != nullptr && Const->isAllOnesValue();
+  return Const != nullptr && Const->isInt() && Const->isAllOnesValue();
 }
 
 bool llvm::isOneConstant(SDValue V) {
   ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
-  return Const != nullptr && Const->isOne();
+  return Const != nullptr && Const->isInt() && Const->isOne();
 }
 
 bool llvm::isBitwiseNot(SDValue V) {
   return V.getOpcode() == ISD::XOR && isAllOnesConstant(V.getOperand(1));
 }
 
 HandleSDNode::~HandleSDNode() {
   DropOperands();

llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
       if (i) OS << ",";
       if (Idx < 0)
         OS << "u";
       else
         OS << Idx;
     }
     OS << ">";
   } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
-    OS << '<' << CSDN->getAPIntValue() << '>';
+    OS << '<';
+    if (CSDN->isGlobal())
+      CSDN->getGlobal()->printAsOperand(OS);
+    else
+      OS << CSDN->getAPIntValue();
+    OS << '>';
   } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
     if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEsingle)
       OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
     else if (&CSDN->getValueAPF().getSemantics()==&APFloat::IEEEdouble)
       OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
     else {
       OS << "<APFloat(";
       CSDN->getValueAPF().bitcastToAPInt().dump();

llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

 LLVM_ATTRIBUTE_ALWAYS_INLINE static inline bool
 CheckInteger(const unsigned char *MatcherTable, unsigned &MatcherIndex,
              SDValue N) {
   int64_t Val = MatcherTable[MatcherIndex++];
   if (Val & 128)
     Val = GetVBR(Val, MatcherTable, MatcherIndex);
 
   ConstantSDNode *C = dyn_cast<ConstantSDNode>(N);
-  return C && C->getSExtValue() == Val;
+  return C && C->isInt() && C->getSExtValue() == Val;
 }
 
 LLVM_ATTRIBUTE_ALWAYS_INLINE static inline bool
 CheckChildInteger(const unsigned char *MatcherTable, unsigned &MatcherIndex,
                   SDValue N, unsigned ChildNo) {
   if (ChildNo >= N.getNumOperands())
     return false;  // Match fails if out of range child #.
   return ::CheckInteger(MatcherTable, MatcherIndex, N.getOperand(ChildNo));
#endif
 
     case OPC_EmitConvertToTarget:  {
       // Convert from IMM/FPIMM to target version.
       unsigned RecNo = MatcherTable[MatcherIndex++];
       assert(RecNo < RecordedNodes.size() && "Invalid EmitConvertToTarget");
       SDValue Imm = RecordedNodes[RecNo].first;
 
       if (Imm->getOpcode() == ISD::Constant) {
-        const ConstantInt *Val=cast<ConstantSDNode>(Imm)->getConstantIntValue();
+        auto ImmC = cast<ConstantSDNode>(Imm);
+        if (ImmC->isInt()) {
+          const ConstantInt *Val = ImmC->getConstantIntValue();
           Imm = CurDAG->getTargetConstant(*Val, SDLoc(NodeToMatch),
                                           Imm.getValueType());
+        } else {
+          Imm = CurDAG->getAbsoluteAddress(
+              ImmC->getGlobal(), SDLoc(NodeToMatch), Imm.getValueType(), true);
+        }
       } else if (Imm->getOpcode() == ISD::ConstantFP) {
         const ConstantFP *Val=cast<ConstantFPSDNode>(Imm)->getConstantFPValue();
         Imm = CurDAG->getTargetConstantFP(*Val, SDLoc(NodeToMatch),
                                           Imm.getValueType());
       }
 
       RecordedNodes.push_back(std::make_pair(Imm, RecordedNodes[RecNo].second));
       continue;

llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

bool TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(SDValue Op,
 
   // FIXME: ISD::SELECT, ISD::SELECT_CC
   switch (Op.getOpcode()) {
   default: break;
   case ISD::XOR:
   case ISD::AND:
   case ISD::OR: {
     ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1));
-    if (!C) return false;
+    if (!C || !C->isInt()) return false;
 
     if (Op.getOpcode() == ISD::XOR &&
         (C->getAPIntValue() | (~Demanded)).isAllOnesValue())
       return false;
 
     // if we can expand it to have all bits set, do it
     if (C->getAPIntValue().intersects(~Demanded)) {
       EVT VT = Op.getValueType();
if (!Op.getNode()->hasOneUse()) {
     return false;
   } else if (Depth == 6) {        // Limit search depth.
     return false;
   }
 
   APInt KnownZero2, KnownOne2, KnownZeroOut, KnownOneOut;
   switch (Op.getOpcode()) {
   case ISD::Constant:
+    if (!cast<ConstantSDNode>(Op)->isInt())
+      break;
     // We know all of the bits for a constant!
     KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
     KnownZero = ~KnownOne;
     return false;   // Don't fall through, will infinitely loop.
   case ISD::BUILD_VECTOR:
     // Collect the known bits that are shared by every constant vector element.
     KnownZero = KnownOne = APInt::getAllOnesValue(BitWidth);
     for (SDValue SrcOp : Op->ops()) {
case ISD::BUILD_VECTOR:
     }
     return false;   // Don't fall through, will infinitely loop.
   case ISD::AND:
     // If the RHS is a constant, check to see if the LHS would be zero without
     // using the bits from the RHS.  Below, we use knowledge about the RHS to
     // simplify the LHS, here we're using information from the LHS to simplify
     // the RHS.
     if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
+      if (RHSC->isInt()) {
         APInt LHSZero, LHSOne;
         // Do not increment Depth here; that can cause an infinite loop.
         TLO.DAG.computeKnownBits(Op.getOperand(0), LHSZero, LHSOne, Depth);
         // If the LHS already has zeros where RHSC does, this and is dead.
         if ((LHSZero & NewMask) == (~RHSC->getAPIntValue() & NewMask))
           return TLO.CombineTo(Op, Op.getOperand(0));
         // If any of the set bits in the RHS are known zero on the LHS, shrink
         // the constant.
         if (TLO.ShrinkDemandedConstant(Op, ~LHSZero & NewMask))
           return true;
       }
+    }
 
     if (SimplifyDemandedBits(Op.getOperand(1), NewMask, KnownZero,
                              KnownOne, TLO, Depth+1))
       return true;
     assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
     if (SimplifyDemandedBits(Op.getOperand(0), ~KnownZero & NewMask,
                              KnownZero2, KnownOne2, TLO, Depth+1))
       return true;

llvm/lib/Target/X86/X86ISelLowering.cpp

 #include "X86TargetMachine.h"
 #include "X86TargetObjectFile.h"
 #include "llvm/ADT/SmallBitVector.h"
 #include "llvm/ADT/SmallSet.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/ADT/StringSwitch.h"
 #include "llvm/Analysis/EHPersonalities.h"
+#include "llvm/Analysis/ValueTracking.h"
 #include "llvm/CodeGen/IntrinsicLowering.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineJumpTableInfo.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/WinEHFuncInfo.h"
static SDValue combineVectorCompareTruncation(SDNode *N, SDLoc &DL,
   if (SVT != MVT::i8 && SVT != MVT::i16 && SVT != MVT::i32)
     return SDValue();
   if (InSVT != MVT::i16 && InSVT != MVT::i32 && InSVT != MVT::i64)
     return SDValue();
 
   return truncateVectorCompareWithPACKSS(VT, In, DL, DAG, Subtarget);
 }
 
+static SDValue combineAbsoluteSymbolReference(EVT VT, SDNode *N,
+                                              SelectionDAG &DAG,
+                                              const X86Subtarget &Subtarget) {
+  if (!Subtarget.isTargetELF() ||
+      N->getOperand(0)->getOpcode() != ISD::TargetGlobalAddress)
+    return SDValue();
+
+  auto GO = dyn_cast<GlobalObject>(
+      cast<GlobalAddressSDNode>(N->getOperand(0))->getGlobal());
+  if (!GO)
+    return SDValue();
+
+  MDNode *MD = GO->getMetadata(LLVMContext::MD_range);
+  if (!MD)
+    return SDValue();
+
+  ConstantRange CR = getConstantRangeFromMetadata(*MD);
+  if (CR.getUnsignedMax().uge(1 << VT.getSizeInBits()))
+    return SDValue();
+
+  SDLoc DL(N);
+  return DAG.getAbsoluteAddress(GO, DL, VT);
+}
+
+static SDValue combineWrapper(SDNode *N, SelectionDAG &DAG,
+                              const X86Subtarget &Subtarget) {
+  return combineAbsoluteSymbolReference(N->getValueType(0), N, DAG, Subtarget);
+}
+
 static SDValue combineTruncate(SDNode *N, SelectionDAG &DAG,
                                const X86Subtarget &Subtarget) {
   EVT VT = N->getValueType(0);
   SDValue Src = N->getOperand(0);
   SDLoc DL(N);
 
   // Try to detect AVG pattern first.
   if (SDValue Avg = detectAVGPattern(Src, VT, DAG, Subtarget, DL))
     return Avg;
 
   // The bitcast source is a direct mmx result.
   // Detect bitcasts between i32 to x86mmx
   if (Src.getOpcode() == ISD::BITCAST && VT == MVT::i32) {
     SDValue BCSrc = Src.getOperand(0);
     if (BCSrc.getValueType() == MVT::x86mmx)
       return DAG.getNode(X86ISD::MMX_MOVD2W, DL, MVT::i32, BCSrc);
   }
 
   // Try to truncate vector comparison results with PACKSS.
   if (SDValue V = combineVectorCompareTruncation(N, DL, DAG, Subtarget))
     return V;
 
+  if (Src->getOpcode() == X86ISD::Wrapper)
+    if (SDValue V =
+            combineAbsoluteSymbolReference(VT, Src.getNode(), DAG, Subtarget))
+      return V;
+
   return combineVectorTruncation(N, DAG, Subtarget);
 }
 
 /// Returns the negated value if the node \p N flips sign of FP value.
 ///
 /// FP-negation node may have different forms: FNEG(x) or FXOR (x, 0x80000000).
 /// AVX512F does not have FXOR, so FNEG is lowered as
 /// (bitcast (xor (bitcast x), (bitcast ConstantFP(0x80000000)))).
SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
   case ISD::STORE:          return combineStore(N, DAG, Subtarget);
   case ISD::MSTORE:         return combineMaskedStore(N, DAG, Subtarget);
   case ISD::SINT_TO_FP:     return combineSIntToFP(N, DAG, Subtarget);
   case ISD::UINT_TO_FP:     return combineUIntToFP(N, DAG, Subtarget);
   case ISD::FADD:
   case ISD::FSUB:           return combineFaddFsub(N, DAG, Subtarget);
   case ISD::FNEG:           return combineFneg(N, DAG, Subtarget);
   case ISD::TRUNCATE:       return combineTruncate(N, DAG, Subtarget);
+  case X86ISD::Wrapper:     return combineWrapper(N, DAG, Subtarget);
   case X86ISD::FXOR:
   case X86ISD::FOR:         return combineFOr(N, DAG, Subtarget);
   case X86ISD::FMIN:
   case X86ISD::FMAX:        return combineFMinFMax(N, DAG);
   case ISD::FMINNUM:
   case ISD::FMAXNUM:        return combineFMinNumFMaxNum(N, DAG, Subtarget);
   case X86ISD::FAND:        return combineFAnd(N, DAG, Subtarget);
   case X86ISD::FANDN:       return combineFAndn(N, DAG, Subtarget);

llvm/test/CodeGen/X86/absolute-constant.ll

+; RUN: llc -o - %s | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+
+@foo = external global i8, align 1, !range !0
+
+define void @bar(i8* %x) {
+entry:
+  %0 = load i8, i8* %x, align 1
+  %conv = sext i8 %0 to i32
+  ; CHECK: testb $foo, (%rdi)
+  %and = and i32 %conv, sext (i8 ptrtoint (i8* @foo to i8) to i32)
+  %tobool = icmp eq i32 %and, 0
+  br i1 %tobool, label %if.end, label %if.then
+
+if.then:                                          ; preds = %entry
+  tail call void (...) @xf()
+  br label %if.end
+
+if.end:                                           ; preds = %entry, %if.then
+  ret void
+}
+
+declare void @xf(...)
+
+!0 = !{i32 0, i32 256}