[RISCV 2/10] Add RISC-V ELF defines

[asb]

Summary

Add the necessary definitions for RISC-V ELF files, including relocs. Also make necessary trivial change to ELFYaml, llvm-objdump, and llvm-readobj in order to work with RISC-V ELFs.

[emaste]

Confirmed EM_RISCV and relocations against https://sourceforge.net/p/elftoolchain/code/HEAD/tree/trunk/common/elfdefinitions.h (except that R_RISCV_RVC_LUI, ELF_RELOC(R_RISCV_GPREL_I, ELF_RELOC(R_RISCV_GPREL_S not yet added there).

Aside, it's unfortunate that ElfMachineType has a mix of "friendly" names and verbatim EM_* constants.

[Eugene.Zelenko]

include/llvm/Support/ELFRelocs/RISCV.def

1

Please insert copyrights header. See other .def files as example.

[asb]

include/llvm/Support/ELFRelocs/RISCV.def

1

Hi Eugene, I've actually followed the lead of all the other include/llvm/Support/ELFRelocs/*.def files in this case, none of which contain a copyright header in the current llvm HEAD. You're right that other .def files elsewhere in the tree seem to have such a header.

[jyknight]

In D23558#517268, @emaste wrote:

Confirmed EM_RISCV and relocations against https://sourceforge.net/p/elftoolchain/code/HEAD/tree/trunk/common/elfdefinitions.h (except that R_RISCV_RVC_LUI, ELF_RELOC(R_RISCV_GPREL_I, ELF_RELOC(R_RISCV_GPREL_S not yet added there).

I guess the relocation types aren't actually documented anywhere? The elftoolchain source code is the canonical location?

At least, I've not seen any RISCV ELF psABI supplement. If there isn't any such thing, someone really ought to start writing one ASAP.

[emaste]

I guess the relocation types aren't actually documented anywhere? The elftoolchain source code is the canonical location?

It is not. I asked about a canonical list on the RISC-V sw-dev list but one did not exist. The best source I had was:

We haven't written up a full ABI description, but you can find the
reloc listing here:

https://github.com/riscv/riscv-gnu-toolchain/blob/master/binutils/include/elf/riscv.h

Although it's now a dead link.

[jyknight]

FWIW, https://github.com/riscv/riscv-binutils-gdb/blob/riscv-binutils-2.27/include/elf/riscv.h seems to be the current location for your link.

[theraven]

I've not checked the relocations against the ABI doc, but assuming that they're correct it all looks good to me.

[asb]

Closed by rL285708 and rL285709.

include/llvm/Object/ELFObjectFile.h

case ELF::ELFCLASS32:
     case ELF::EM_HEXAGON:
       return "ELF32-hexagon";
     case ELF::EM_LANAI:
       return "ELF32-lanai";
     case ELF::EM_MIPS:
       return "ELF32-mips";
     case ELF::EM_PPC:
       return "ELF32-ppc";
+    case ELF::EM_RISCV:
+      return "ELF32-riscv";
     case ELF::EM_SPARC:
     case ELF::EM_SPARC32PLUS:
       return "ELF32-sparc";
     case ELF::EM_WEBASSEMBLY:
       return "ELF32-wasm";
     case ELF::EM_AMDGPU:
       return "ELF32-amdgpu";
     default:
       return "ELF32-unknown";
     }
   case ELF::ELFCLASS64:
     switch (EF.getHeader()->e_machine) {
     case ELF::EM_386:
       return "ELF64-i386";
     case ELF::EM_X86_64:
       return "ELF64-x86-64";
     case ELF::EM_AARCH64:
       return (IsLittleEndian ? "ELF64-aarch64-little" : "ELF64-aarch64-big");
     case ELF::EM_PPC64:
       return "ELF64-ppc64";
+    case ELF::EM_RISCV:
+      return "ELF64-riscv";
     case ELF::EM_S390:
       return "ELF64-s390";
     case ELF::EM_SPARCV9:
       return "ELF64-sparc";
     case ELF::EM_MIPS:
       return "ELF64-mips";
     case ELF::EM_WEBASSEMBLY:
       return "ELF64-wasm";
case ELF::ELFCLASS64:
       return IsLittleEndian ? Triple::mips64el : Triple::mips64;
     default:
       report_fatal_error("Invalid ELFCLASS!");
     }
   case ELF::EM_PPC:
     return Triple::ppc;
   case ELF::EM_PPC64:
     return IsLittleEndian ? Triple::ppc64le : Triple::ppc64;
+  case ELF::EM_RISCV:
+    switch (EF.getHeader()->e_ident[ELF::EI_CLASS]) {
+    case ELF::ELFCLASS32:
+      return Triple::riscv32;
+    case ELF::ELFCLASS64:
+      return Triple::riscv64;
+    default:
+      report_fatal_error("Invalid ELFCLASS!");
+    }
   case ELF::EM_S390:
     return Triple::systemz;
 
   case ELF::EM_SPARC:
   case ELF::EM_SPARC32PLUS:
     return IsLittleEndian ? Triple::sparcel : Triple::sparc;
   case ELF::EM_SPARCV9:
     return Triple::sparcv9;

include/llvm/Support/ELF.h

enum {
   EM_KMX8          = 213, // KM211 KMX8 8-bit processor
   EM_KVARC         = 214, // KM211 KVARC processor
   EM_CDP           = 215, // Paneve CDP architecture family
   EM_COGE          = 216, // Cognitive Smart Memory Processor
   EM_COOL          = 217, // iCelero CoolEngine
   EM_NORC          = 218, // Nanoradio Optimized RISC
   EM_CSR_KALIMBA   = 219, // CSR Kalimba architecture family
   EM_AMDGPU        = 224, // AMD GPU architecture
+  EM_RISCV         = 243, // RISC-V
   EM_LANAI         = 244, // Lanai 32-bit processor
   EM_BPF           = 247, // Linux kernel bpf virtual machine
 
   // A request has been made to the maintainer of the official registry for
   // such numbers for an official value for WebAssembly. As soon as one is
   // allocated, this enum will be updated to use it.
   EM_WEBASSEMBLY   = 0x4157, // WebAssembly architecture
 };

 #include "ELFRelocs/Hexagon.def"
 };
 
 // ELF Relocation type for Lanai.
 enum {
 #include "ELFRelocs/Lanai.def"
 };
 
+// ELF Relocation types for RISC-V
+enum {
+#include "ELFRelocs/RISCV.def"
+};
+
 // ELF Relocation types for S390/zSeries
 enum {
 #include "ELFRelocs/SystemZ.def"
 };
 
 // ELF Relocation type for Sparc.
 enum {
 #include "ELFRelocs/Sparc.def"

include/llvm/Support/ELFRelocs/RISCV.def

+
+#ifndef ELF_RELOC
+#error "ELF_RELOC must be defined"
+#endif
+
+ELF_RELOC(R_RISCV_NONE,               0)
+ELF_RELOC(R_RISCV_32,                 1)
+ELF_RELOC(R_RISCV_64,                 2)
+ELF_RELOC(R_RISCV_RELATIVE,           3)
+ELF_RELOC(R_RISCV_COPY,               4)
+ELF_RELOC(R_RISCV_JUMP_SLOT,          5)
+ELF_RELOC(R_RISCV_TLS_DTPMOD32,       6)
+ELF_RELOC(R_RISCV_TLS_DTPMOD64,       7)
+ELF_RELOC(R_RISCV_TLS_DTPREL32,       8)
+ELF_RELOC(R_RISCV_TLS_DTPREL64,       9)
+ELF_RELOC(R_RISCV_TLS_TPREL32,       10)
+ELF_RELOC(R_RISCV_TLS_TPREL64,       11)
+ELF_RELOC(R_RISCV_BRANCH,            16)
+ELF_RELOC(R_RISCV_JAL,               17)
+ELF_RELOC(R_RISCV_CALL,              18)
+ELF_RELOC(R_RISCV_CALL_PLT,          19)
+ELF_RELOC(R_RISCV_GOT_HI20,          20)
+ELF_RELOC(R_RISCV_TLS_GOT_HI20,      21)
+ELF_RELOC(R_RISCV_TLS_GD_HI20,       22)
+ELF_RELOC(R_RISCV_PCREL_HI20,        23)
+ELF_RELOC(R_RISCV_PCREL_LO12_I,      24)
+ELF_RELOC(R_RISCV_PCREL_LO12_S,      25)
+ELF_RELOC(R_RISCV_HI20,              26)
+ELF_RELOC(R_RISCV_LO12_I,            27)
+ELF_RELOC(R_RISCV_LO12_S,            28)
+ELF_RELOC(R_RISCV_TPREL_HI20,        29)
+ELF_RELOC(R_RISCV_TPREL_LO12_I,      30)
+ELF_RELOC(R_RISCV_TPREL_LO12_S,      31)
+ELF_RELOC(R_RISCV_TPREL_ADD,         32)
+ELF_RELOC(R_RISCV_ADD8,              33)
+ELF_RELOC(R_RISCV_ADD16,             34)
+ELF_RELOC(R_RISCV_ADD32,             35)
+ELF_RELOC(R_RISCV_ADD64,             36)
+ELF_RELOC(R_RISCV_SUB8,              37)
+ELF_RELOC(R_RISCV_SUB16,             38)
+ELF_RELOC(R_RISCV_SUB32,             39)
+ELF_RELOC(R_RISCV_SUB64,             40)
+ELF_RELOC(R_RISCV_GNU_VTINHERIT,     41)
+ELF_RELOC(R_RISCV_GNU_VTENTRY,       42)
+ELF_RELOC(R_RISCV_ALIGN,             43)
+ELF_RELOC(R_RISCV_RVC_BRANCH,        44)
+ELF_RELOC(R_RISCV_RVC_JUMP,          45)
+ELF_RELOC(R_RISCV_RVC_LUI,           46)
+ELF_RELOC(R_RISCV_GPREL_I,           47)
+ELF_RELOC(R_RISCV_GPREL_S,           48)

lib/Object/ELF.cpp

#include "llvm/Support/ELFRelocs/PowerPC.def"
     break;
   case ELF::EM_PPC64:
     switch (Type) {
 #include "llvm/Support/ELFRelocs/PowerPC64.def"
     default:
       break;
     }
     break;
+  case ELF::EM_RISCV:
+    switch (Type) {
+#include "llvm/Support/ELFRelocs/RISCV.def"
+    default:
+      break;
+    }
+    break;
   case ELF::EM_S390:
     switch (Type) {
 #include "llvm/Support/ELFRelocs/SystemZ.def"
     default:
       break;
     }
     break;
   case ELF::EM_SPARC:

lib/ObjectYAML/ELFYAML.cpp

#define ECase(X) IO.enumCase(Value, #X, ELF::X);
   ECase(EM_COREA_2ND)
   ECase(EM_ARC_COMPACT2)
   ECase(EM_OPEN8)
   ECase(EM_RL78)
   ECase(EM_VIDEOCORE5)
   ECase(EM_78KOR)
   ECase(EM_56800EX)
   ECase(EM_AMDGPU)
+  ECase(EM_RISCV)
   ECase(EM_LANAI)
   ECase(EM_BPF)
 #undef ECase
 }
 
 void ScalarEnumerationTraits<ELFYAML::ELF_ELFCLASS>::enumeration(
     IO &IO, ELFYAML::ELF_ELFCLASS &Value) {
 #define ECase(X) IO.enumCase(Value, #X, ELF::X);

 #include "llvm/Support/ELFRelocs/i386.def"
     break;
   case ELF::EM_AARCH64:
 #include "llvm/Support/ELFRelocs/AArch64.def"
     break;
   case ELF::EM_ARM:
 #include "llvm/Support/ELFRelocs/ARM.def"
     break;
+  case ELF::EM_RISCV:
+#include "llvm/Support/ELFRelocs/RISCV.def"
+    break;
   case ELF::EM_LANAI:
 #include "llvm/Support/ELFRelocs/Lanai.def"
     break;
   case ELF::EM_AMDGPU:
 #include "llvm/Support/ELFRelocs/AMDGPU.def"
     break;
   case ELF::EM_BPF:
 #include "llvm/Support/ELFRelocs/BPF.def"

tools/llvm-objdump/llvm-objdump.cpp

case ELF::EM_AARCH64: {
     break;
   }
   case ELF::EM_386:
   case ELF::EM_IAMCU:
   case ELF::EM_ARM:
   case ELF::EM_HEXAGON:
   case ELF::EM_MIPS:
   case ELF::EM_BPF:
+  case ELF::EM_RISCV:
     res = Target;
     break;
   case ELF::EM_WEBASSEMBLY:
     switch (type) {
     case ELF::R_WEBASSEMBLY_DATA: {
       std::string fmtbuf;
       raw_string_ostream fmt(fmtbuf);
       fmt << Target << (addend < 0 ? "" : "+") << addend;

tools/llvm-readobj/ELFDumper.cpp

static const EnumEntry<unsigned> ElfMachineType[] = {
   ENUM_ENT(EM_COREA_2ND,     "EM_COREA_2ND"),
   ENUM_ENT(EM_ARC_COMPACT2,  "EM_ARC_COMPACT2"),
   ENUM_ENT(EM_OPEN8,         "EM_OPEN8"),
   ENUM_ENT(EM_RL78,          "Renesas RL78"),
   ENUM_ENT(EM_VIDEOCORE5,    "Broadcom VideoCore V processor"),
   ENUM_ENT(EM_78KOR,         "EM_78KOR"),
   ENUM_ENT(EM_56800EX,       "EM_56800EX"),
   ENUM_ENT(EM_AMDGPU,        "EM_AMDGPU"),
+  ENUM_ENT(EM_RISCV,         "RISC-V"),
   ENUM_ENT(EM_WEBASSEMBLY,   "EM_WEBASSEMBLY"),
   ENUM_ENT(EM_LANAI,         "EM_LANAI"),
   ENUM_ENT(EM_BPF,           "EM_BPF"),
 };
 
 static const EnumEntry<unsigned> ElfSymbolBindings[] = {
     {"Local",  "LOCAL",  ELF::STB_LOCAL},
     {"Global", "GLOBAL", ELF::STB_GLOBAL},