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Differential D19279

[LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
ClosedPublic

Authored by mgrang on Apr 19 2016, 12:39 PM.

Details

Reviewers
t.p.northover
dblaikie
uweigand
• tstellarAMD
MatzeB
mcrosier
Commits
rG029a0567fa9f: [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
rL266834: [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC.
Summary

Removed unwanted --check-prefix=CHECK from numerous unit tests.

Diff Detail

Event Timeline

mgrang updated this revision to Diff 54241.Apr 19 2016, 12:39 PM
mgrang retitled this revision from to [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC..
mgrang updated this object.
mgrang added reviewers: t.p.northover, dblaikie, uweigand, MatzeB.
mgrang set the repository for this revision to rL LLVM.
Herald added a reviewer: • tstellarAMD. · View Herald TranscriptApr 19 2016, 12:39 PM
Herald added a subscriber: dsanders. · View Herald Transcript
mgrang added a comment.Apr 19 2016, 12:40 PM

This is fourth in a series of commits to clean up the unit tests by removing unwanted --check-prefix=CHECK. NFC.

mcrosier accepted this revision.Apr 19 2016, 12:43 PM
mcrosier added a reviewer: mcrosier.
mcrosier added a subscriber: mcrosier.

LGTM. Thanks, Mandeep.

This revision is now accepted and ready to land.Apr 19 2016, 12:43 PM
Closed by commit rL266834: [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC. (authored by mgrang). · Explain WhyApr 19 2016, 4:57 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

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test/
CodeGen/
AArch64/
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AMDGPU/
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ARM/
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Mips/
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PowerPC/
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SystemZ/
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X86/
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DebugInfo/
ARM/
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Instrumentation/
AddressSanitizer/
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SanitizerCoverage/
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MC/
ARM/
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AsmParser/
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Disassembler/
ARM/
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Mips/
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Transforms/
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SimplifyCFG/
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tools/
llvm-profdata/
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llvm-symbolizer/
pdb/
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Diff 54241

test/CodeGen/AArch64/128bit_load_store.ll

; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=neon | FileCheck %s --check-prefix=CHECK ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=neon | FileCheck %s
define void @test_store_f128(fp128* %ptr, fp128 %val) #0 { define void @test_store_f128(fp128* %ptr, fp128 %val) #0 {
; CHECK-LABEL: test_store_f128 ; CHECK-LABEL: test_store_f128
; CHECK: str {{q[0-9]+}}, [{{x[0-9]+}}] ; CHECK: str {{q[0-9]+}}, [{{x[0-9]+}}]
entry: entry:
store fp128 %val, fp128* %ptr, align 16 store fp128 %val, fp128* %ptr, align 16
ret void ret void
} }
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test/CodeGen/AArch64/alloca.ll

; RUN: llc -mtriple=aarch64-linux-gnu -disable-post-ra -verify-machineinstrs -o - %s | FileCheck %s --check-prefix=CHECK ; RUN: llc -mtriple=aarch64-linux-gnu -disable-post-ra -verify-machineinstrs -o - %s | FileCheck %s
; RUN: llc -mtriple=arm64-apple-ios -disable-post-ra -verify-machineinstrs -o - %s | FileCheck %s --check-prefix=CHECK-MACHO ; RUN: llc -mtriple=arm64-apple-ios -disable-post-ra -verify-machineinstrs -o - %s | FileCheck %s --check-prefix=CHECK-MACHO
; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -mattr=-fp-armv8 -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOFP-ARM64 %s ; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -mattr=-fp-armv8 -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOFP-ARM64 %s
declare void @use_addr(i8*) declare void @use_addr(i8*)
define void @test_simple_alloca(i64 %n) { define void @test_simple_alloca(i64 %n) {
; CHECK-LABEL: test_simple_alloca: ; CHECK-LABEL: test_simple_alloca:
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test/CodeGen/AArch64/atomic-ops.ll

; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK ; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-REG ; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-REG
; Point of CHECK-REG is to make sure UNPREDICTABLE instructions aren't created ; Point of CHECK-REG is to make sure UNPREDICTABLE instructions aren't created
; (i.e. reusing a register for status & data in store exclusive). ; (i.e. reusing a register for status & data in store exclusive).
; CHECK-REG-NOT: stlxrb w[[NEW:[0-9]+]], w[[NEW]], [x{{[0-9]+}}] ; CHECK-REG-NOT: stlxrb w[[NEW:[0-9]+]], w[[NEW]], [x{{[0-9]+}}]
; CHECK-REG-NOT: stlxrb w[[NEW:[0-9]+]], x[[NEW]], [x{{[0-9]+}}] ; CHECK-REG-NOT: stlxrb w[[NEW:[0-9]+]], x[[NEW]], [x{{[0-9]+}}]
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test/CodeGen/AArch64/bitfield-insert.ll

; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s --check-prefix=CHECK ; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
; First, a simple example from Clang. The registers could plausibly be ; First, a simple example from Clang. The registers could plausibly be
; different, but probably won't be. ; different, but probably won't be.
%struct.foo = type { i8, [2 x i8], i8 } %struct.foo = type { i8, [2 x i8], i8 }
define [1 x i64] @from_clang([1 x i64] %f.coerce, i32 %n) nounwind readnone { define [1 x i64] @from_clang([1 x i64] %f.coerce, i32 %n) nounwind readnone {
; CHECK-LABEL: from_clang: ; CHECK-LABEL: from_clang:
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test/CodeGen/AArch64/bitfield.ll

; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
@var32 = global i32 0 @var32 = global i32 0
@var64 = global i64 0 @var64 = global i64 0
define void @test_extendb32(i8 %var) { define void @test_extendb32(i8 %var) {
; CHECK-LABEL: test_extendb32: ; CHECK-LABEL: test_extendb32:
%sxt32 = sext i8 %var to i32 %sxt32 = sext i8 %var to i32
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test/CodeGen/AArch64/cond-sel.ll

; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mcpu=cyclone | FileCheck %s --check-prefix=CHECK ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mcpu=cyclone | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
@var32 = global i32 0 @var32 = global i32 0
@var64 = global i64 0 @var64 = global i64 0
define void @test_csel(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize { define void @test_csel(i32 %lhs32, i32 %rhs32, i64 %lhs64) minsize {
; CHECK-LABEL: test_csel: ; CHECK-LABEL: test_csel:
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test/CodeGen/AArch64/cxx-tlscc.ll

; RUN: llc < %s -mtriple=aarch64-apple-ios | FileCheck %s ; RUN: llc < %s -mtriple=aarch64-apple-ios | FileCheck %s
; RUN: llc < %s -mtriple=aarch64-apple-ios -enable-shrink-wrap=true | FileCheck --check-prefix=CHECK %s ; RUN: llc < %s -mtriple=aarch64-apple-ios -enable-shrink-wrap=true | FileCheck %s
; Shrink wrapping currently does not kick in because we have a TLS CALL ; Shrink wrapping currently does not kick in because we have a TLS CALL
; in the entry block and it will clobber the link register. ; in the entry block and it will clobber the link register.
; RUN: llc < %s -mtriple=aarch64-apple-ios -O0 | FileCheck --check-prefix=CHECK-O0 %s ; RUN: llc < %s -mtriple=aarch64-apple-ios -O0 | FileCheck --check-prefix=CHECK-O0 %s
%struct.S = type { i8 } %struct.S = type { i8 }
@sg = internal thread_local global %struct.S zeroinitializer, align 1 @sg = internal thread_local global %struct.S zeroinitializer, align 1
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test/CodeGen/AArch64/directcond.ll

; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 -aarch64-atomic-cfg-tidy=0 | FileCheck %s --check-prefix=CHECK ; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 -aarch64-atomic-cfg-tidy=0 | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 -aarch64-atomic-cfg-tidy=0 | FileCheck --check-prefix=CHECK-NOFP %s ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 -aarch64-atomic-cfg-tidy=0 | FileCheck --check-prefix=CHECK-NOFP %s
define i32 @test_select_i32(i1 %bit, i32 %a, i32 %b) { define i32 @test_select_i32(i1 %bit, i32 %a, i32 %b) {
; CHECK-LABEL: test_select_i32: ; CHECK-LABEL: test_select_i32:
%val = select i1 %bit, i32 %a, i32 %b %val = select i1 %bit, i32 %a, i32 %b
; CHECK: tst w0, #0x1 ; CHECK: tst w0, #0x1
; CHECK-NEXT: csel w0, w1, w2, ne ; CHECK-NEXT: csel w0, w1, w2, ne
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test/CodeGen/AArch64/fast-isel-tbz.ll

; RUN: llc -disable-peephole -aarch64-atomic-cfg-tidy=0 -verify-machineinstrs -mtriple=aarch64-apple-darwin < %s | FileCheck --check-prefix=CHECK %s ; RUN: llc -disable-peephole -aarch64-atomic-cfg-tidy=0 -verify-machineinstrs -mtriple=aarch64-apple-darwin < %s | FileCheck %s
; RUN: llc -disable-peephole -fast-isel -fast-isel-abort=1 -aarch64-atomic-cfg-tidy=0 -verify-machineinstrs -mtriple=aarch64-apple-darwin < %s | FileCheck --check-prefix=CHECK --check-prefix=FAST %s ; RUN: llc -disable-peephole -fast-isel -fast-isel-abort=1 -aarch64-atomic-cfg-tidy=0 -verify-machineinstrs -mtriple=aarch64-apple-darwin < %s | FileCheck --check-prefix=CHECK --check-prefix=FAST %s
define i32 @icmp_eq_i8(i8 zeroext %a) { define i32 @icmp_eq_i8(i8 zeroext %a) {
; CHECK-LABEL: icmp_eq_i8 ; CHECK-LABEL: icmp_eq_i8
; CHECK: tbz {{w[0-9]+}}, #0, {{LBB.+_2}} ; CHECK: tbz {{w[0-9]+}}, #0, {{LBB.+_2}}
%1 = and i8 %a, 1 %1 = and i8 %a, 1
%2 = icmp eq i8 %1, 0 %2 = icmp eq i8 %1, 0
br i1 %2, label %bb1, label %bb2, !prof !0 br i1 %2, label %bb1, label %bb2, !prof !0
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test/CodeGen/AArch64/fp-cond-sel.ll

; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu -mcpu=cyclone | FileCheck %s --check-prefix=CHECK ; RUN: llc -verify-machineinstrs -o - %s -mtriple=aarch64-none-linux-gnu -mcpu=cyclone | FileCheck %s
@varfloat = global float 0.0 @varfloat = global float 0.0
@vardouble = global double 0.0 @vardouble = global double 0.0
declare void @use_float(float) declare void @use_float(float)
declare void @use_double(double) declare void @use_double(double)
define void @test_csel(i32 %lhs32, i32 %rhs32, i64 %lhs64) { define void @test_csel(i32 %lhs32, i32 %rhs32, i64 %lhs64) {
Show All 26 Lines

test/CodeGen/AArch64/func-argpassing.ll

; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -disable-post-ra | FileCheck --check-prefix=CHECK %s ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -disable-post-ra | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 -disable-post-ra | FileCheck --check-prefix=CHECK-NOFP %s ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 -disable-post-ra | FileCheck --check-prefix=CHECK-NOFP %s
%myStruct = type { i64 , i8, i32 } %myStruct = type { i64 , i8, i32 }
@var8 = global i8 0 @var8 = global i8 0
@var32 = global i32 0 @var32 = global i32 0
@var64 = global i64 0 @var64 = global i64 0
@var128 = global i128 0 @var128 = global i128 0
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test/CodeGen/AArch64/func-calls.ll

; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s --check-prefix=CHECK ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-neon | FileCheck --check-prefix=CHECK-NONEON %s ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-neon | FileCheck --check-prefix=CHECK-NONEON %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 | FileCheck --check-prefix=CHECK-NOFP %s
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu | FileCheck --check-prefix=CHECK-BE %s ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64_be-none-linux-gnu | FileCheck --check-prefix=CHECK-BE %s
%myStruct = type { i64 , i8, i32 } %myStruct = type { i64 , i8, i32 }
@var8 = global i8 0 @var8 = global i8 0
@var8_2 = global i8 0 @var8_2 = global i8 0
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test/CodeGen/AArch64/movw-consts.ll

; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s --check-prefix=CHECK ; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 | FileCheck %s
define i64 @test0() { define i64 @test0() {
; CHECK-LABEL: test0: ; CHECK-LABEL: test0:
; Not produced by move wide instructions, but good to make sure we can return 0 anyway: ; Not produced by move wide instructions, but good to make sure we can return 0 anyway:
; CHECK: mov x0, xzr ; CHECK: mov x0, xzr
ret i64 0 ret i64 0
} }
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test/CodeGen/AArch64/neon-mov.ll

; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
define <8 x i8> @movi8b() { define <8 x i8> @movi8b() {
; CHECK-LABEL: movi8b: ; CHECK-LABEL: movi8b:
; CHECK: movi {{v[0-9]+}}.8b, #{{0x8|8}} ; CHECK: movi {{v[0-9]+}}.8b, #{{0x8|8}}
ret <8 x i8> < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 > ret <8 x i8> < i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8 >
} }
define <16 x i8> @movi16b() { define <16 x i8> @movi16b() {
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test/CodeGen/AArch64/neon-perm.ll

; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
%struct.int8x8x2_t = type { [2 x <8 x i8>] } %struct.int8x8x2_t = type { [2 x <8 x i8>] }
%struct.int16x4x2_t = type { [2 x <4 x i16>] } %struct.int16x4x2_t = type { [2 x <4 x i16>] }
%struct.int32x2x2_t = type { [2 x <2 x i32>] } %struct.int32x2x2_t = type { [2 x <2 x i32>] }
%struct.uint8x8x2_t = type { [2 x <8 x i8>] } %struct.uint8x8x2_t = type { [2 x <8 x i8>] }
%struct.uint16x4x2_t = type { [2 x <4 x i16>] } %struct.uint16x4x2_t = type { [2 x <4 x i16>] }
%struct.uint32x2x2_t = type { [2 x <2 x i32>] } %struct.uint32x2x2_t = type { [2 x <2 x i32>] }
%struct.float32x2x2_t = type { [2 x <2 x float>] } %struct.float32x2x2_t = type { [2 x <2 x float>] }
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test/CodeGen/AMDGPU/store-barrier.ll

; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck --check-prefix=CHECK %s ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck %s
; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck --check-prefix=CHECK %s ; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs -mattr=+load-store-opt -enable-misched < %s | FileCheck %s
; This test is for a bug in the machine scheduler where stores without ; This test is for a bug in the machine scheduler where stores without
; an underlying object would be moved across the barrier. In this ; an underlying object would be moved across the barrier. In this
; test, the <2 x i8> store will be split into two i8 stores, so they ; test, the <2 x i8> store will be split into two i8 stores, so they
; won't have an underlying object. ; won't have an underlying object.
; CHECK-LABEL: {{^}}test: ; CHECK-LABEL: {{^}}test:
; CHECK: ds_write_b8 ; CHECK: ds_write_b8
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test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll

;RUN: llc -march=amdgcn -mcpu=verde < %s | FileCheck %s --check-prefix=CHECK ;RUN: llc -march=amdgcn -mcpu=verde < %s | FileCheck %s
; Test a simple uniform loop that lives inside non-uniform control flow. ; Test a simple uniform loop that lives inside non-uniform control flow.
;CHECK-LABEL: {{^}}test1: ;CHECK-LABEL: {{^}}test1:
;CHECK: s_cbranch_execz ;CHECK: s_cbranch_execz
;CHECK: %loop_body ;CHECK: %loop_body
define amdgpu_ps void @test1(<8 x i32> inreg %rsrc, <2 x i32> %addr.base, i32 %y, i32 %p) { define amdgpu_ps void @test1(<8 x i32> inreg %rsrc, <2 x i32> %addr.base, i32 %y, i32 %p) {
main_body: main_body:
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test/CodeGen/ARM/cxx-tlscc.ll

; RUN: llc < %s -mtriple=armv7k-apple-watchos2.0 | FileCheck %s ; RUN: llc < %s -mtriple=armv7k-apple-watchos2.0 | FileCheck %s
; RUN: llc < %s -mtriple=armv7k-apple-watchos2.0 -enable-shrink-wrap=true | FileCheck --check-prefix=CHECK %s ; RUN: llc < %s -mtriple=armv7k-apple-watchos2.0 -enable-shrink-wrap=true | FileCheck %s
; RUN: llc < %s -mtriple=armv7-apple-ios8.0 | FileCheck %s ; RUN: llc < %s -mtriple=armv7-apple-ios8.0 | FileCheck %s
; RUN: llc < %s -mtriple=armv7-apple-ios8.0 -enable-shrink-wrap=true | FileCheck --check-prefix=CHECK %s ; RUN: llc < %s -mtriple=armv7-apple-ios8.0 -enable-shrink-wrap=true | FileCheck %s
; RUN: llc < %s -mtriple=armv7k-apple-watchos2.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix=WATCH-O0 %s ; RUN: llc < %s -mtriple=armv7k-apple-watchos2.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix=WATCH-O0 %s
; RUN: llc < %s -mtriple=armv7-apple-ios8.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix=IOS-O0 %s ; RUN: llc < %s -mtriple=armv7-apple-ios8.0 -O0 | FileCheck --check-prefix=CHECK-O0 --check-prefix=IOS-O0 %s
; RUN: llc < %s -mtriple=thumbv7-apple-ios8.0 | FileCheck --check-prefix=THUMB %s ; RUN: llc < %s -mtriple=thumbv7-apple-ios8.0 | FileCheck --check-prefix=THUMB %s
%struct.S = type { i8 } %struct.S = type { i8 }
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test/CodeGen/ARM/fp16-v3.ll

; RUN: llc -mattr=+fp16 < %s | FileCheck %s --check-prefix=CHECK ; RUN: llc -mattr=+fp16 < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "armv7a--none-eabi" target triple = "armv7a--none-eabi"
; CHECK-LABEL: test_vec3: ; CHECK-LABEL: test_vec3:
; CHECK: vcvtb.f32.f16 ; CHECK: vcvtb.f32.f16
; CHECK: vcvt.f32.s32 ; CHECK: vcvt.f32.s32
; CHECK: vadd.f32 ; CHECK: vadd.f32
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test/CodeGen/ARM/zero-cycle-zero.ll

; RUN: llc -mtriple=armv8 -mcpu=cyclone < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOTSWIFT ; RUN: llc -mtriple=armv8 -mcpu=cyclone < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOTSWIFT
; RUN: llc -mtriple=armv8 -mcpu=swift < %s | FileCheck %s --check-prefix=CHECK ; RUN: llc -mtriple=armv8 -mcpu=swift < %s | FileCheck %s
; RUN: llc -mtriple=armv8 -mcpu=cortex-a57 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOTSWIFT ; RUN: llc -mtriple=armv8 -mcpu=cortex-a57 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOTSWIFT
declare arm_aapcs_vfpcc void @take_vec64(<2 x i32>) declare arm_aapcs_vfpcc void @take_vec64(<2 x i32>)
define void @test_vec64() { define void @test_vec64() {
; CHECK-LABEL: test_vec64: ; CHECK-LABEL: test_vec64:
call arm_aapcs_vfpcc void @take_vec64(<2 x i32> <i32 0, i32 0>) call arm_aapcs_vfpcc void @take_vec64(<2 x i32> <i32 0, i32 0>)
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test/CodeGen/Mips/const-mult.ll

; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=CHECK ; RUN: llc -march=mipsel < %s | FileCheck %s
; RUN: llc -march=mips64el < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK64 ; RUN: llc -march=mips64el < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK64
; CHECK-LABEL: mul5_32: ; CHECK-LABEL: mul5_32:
; CHECK: sll $[[R0:[0-9]+]], $4, 2 ; CHECK: sll $[[R0:[0-9]+]], $4, 2
; CHECK: addu ${{[0-9]+}}, $[[R0]], $4 ; CHECK: addu ${{[0-9]+}}, $[[R0]], $4
define i32 @mul5_32(i32 signext %a) { define i32 @mul5_32(i32 signext %a) {
entry: entry:
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test/CodeGen/PowerPC/BreakableToken-reduced.ll

; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -enable-shrink-wrap=true %s -o - | FileCheck %s --check-prefix=CHECK ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -enable-shrink-wrap=true %s -o - | FileCheck %s
; ;
; Test the use of a non-R0 register to save/restore the LR in function ; Test the use of a non-R0 register to save/restore the LR in function
; prologue/epilogue. ; prologue/epilogue.
; This problem can occur as a result of shrink wrapping, where the function ; This problem can occur as a result of shrink wrapping, where the function
; prologue and epilogue are moved from the beginning/ending of the function. If ; prologue and epilogue are moved from the beginning/ending of the function. If
; register R0 is used before the prologue/epilogue blocks, then it cannot be ; register R0 is used before the prologue/epilogue blocks, then it cannot be
; used to save/restore the LR. ; used to save/restore the LR.
; ;
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test/CodeGen/PowerPC/atomics-fences.ll

; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc32 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK ; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc32 -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc64 -verify-machineinstrs | FileCheck %s --check-prefix=CHECK ; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc64 -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc-apple-darwin -mcpu=440 | FileCheck %s --check-prefix=PPC440 ; RUN: llc < %s -mtriple=powerpc-apple-darwin -mcpu=440 | FileCheck %s --check-prefix=PPC440
; Fences ; Fences
define void @fence_acquire() { define void @fence_acquire() {
; CHECK-LABEL: fence_acquire ; CHECK-LABEL: fence_acquire
; CHECK: lwsync ; CHECK: lwsync
; PPC440-NOT: lwsync ; PPC440-NOT: lwsync
; PPC440: msync ; PPC440: msync
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test/CodeGen/SystemZ/alloca-01.ll

; Test variable-sized allocas and addresses based on them in cases where ; Test variable-sized allocas and addresses based on them in cases where
; stack arguments are needed. ; stack arguments are needed.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-A ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-A
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-B ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-B
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-C ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-C
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-D ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-D
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-FP
declare i64 @bar(i8 *%a, i8 *%b, i8 *%c, i8 *%d, i8 *%e, i64 %f, i64 %g) declare i64 @bar(i8 *%a, i8 *%b, i8 *%c, i8 *%d, i8 *%e, i64 %f, i64 %g)
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test/CodeGen/SystemZ/atomicrmw-add-01.ll

; Test 8-bit atomic additions. ; Test 8-bit atomic additions.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check addition of a variable. ; Check addition of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-add-02.ll

; Test 16-bit atomic additions. ; Test 16-bit atomic additions.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check addition of a variable. ; Check addition of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-and-01.ll

; Test 8-bit atomic ANDs. ; Test 8-bit atomic ANDs.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check AND of a variable. ; Check AND of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-and-02.ll

; Test 16-bit atomic ANDs. ; Test 16-bit atomic ANDs.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check AND of a variable. ; Check AND of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-minmax-01.ll

; Test 8-bit atomic min/max operations. ; Test 8-bit atomic min/max operations.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check signed minimum. ; Check signed minimum.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-minmax-02.ll

; Test 8-bit atomic min/max operations. ; Test 8-bit atomic min/max operations.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check signed minimum. ; Check signed minimum.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-nand-01.ll

; Test 8-bit atomic NANDs. ; Test 8-bit atomic NANDs.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check NAND of a variable. ; Check NAND of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-nand-02.ll

; Test 16-bit atomic NANDs. ; Test 16-bit atomic NANDs.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check NAND of a variable. ; Check NAND of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-or-01.ll

; Test 8-bit atomic ORs. ; Test 8-bit atomic ORs.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check OR of a variable. ; Check OR of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-or-02.ll

; Test 16-bit atomic ORs. ; Test 16-bit atomic ORs.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check OR of a variable. ; Check OR of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-sub-01.ll

; Test 8-bit atomic subtractions. ; Test 8-bit atomic subtractions.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check subtraction of a variable. ; Check subtraction of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-sub-02.ll

; Test 16-bit atomic subtractions. ; Test 16-bit atomic subtractions.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check subtraction of a variable. ; Check subtraction of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-xchg-01.ll

; Test 8-bit atomic exchange. ; Test 8-bit atomic exchange.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
; Check exchange with a variable. ; Check exchange with a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT makes sure that the negated shift count used by the second ; - CHECK-SHIFT makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before ; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
; being used in the RISBG (in contrast to things like atomic addition, ; being used in the RISBG (in contrast to things like atomic addition,
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test/CodeGen/SystemZ/atomicrmw-xchg-02.ll

; Test 16-bit atomic exchange. ; Test 16-bit atomic exchange.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT
; Check exchange with a variable. ; Check exchange with a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT makes sure that the negated shift count used by the second ; - CHECK-SHIFT makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before ; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
; being used in the RISBG (in contrast to things like atomic addition, ; being used in the RISBG (in contrast to things like atomic addition,
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test/CodeGen/SystemZ/atomicrmw-xor-01.ll

; Test 8-bit atomic XORs. ; Test 8-bit atomic XORs.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check XOR of a variable. ; Check XOR of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/SystemZ/atomicrmw-xor-02.ll

; Test 16-bit atomic XORs. ; Test 16-bit atomic XORs.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT1
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT2
; Check XOR of a variable. ; Check XOR of a variable.
; - CHECK is for the main loop. ; - CHECK is for the main loop.
; - CHECK-SHIFT1 makes sure that the negated shift count used by the second ; - CHECK-SHIFT1 makes sure that the negated shift count used by the second
; RLL is set up correctly. The negation is independent of the NILL and L ; RLL is set up correctly. The negation is independent of the NILL and L
; tested in CHECK. ; tested in CHECK.
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test/CodeGen/X86/code_placement_cold_loop_blocks.ll

; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s -check-prefix=CHECK ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
define void @foo() !prof !1 { define void @foo() !prof !1 {
; Test if a cold block in a loop will be placed at the end of the function ; Test if a cold block in a loop will be placed at the end of the function
; chain. ; chain.
; ;
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: callq b ; CHECK: callq b
; CHECK: callq c ; CHECK: callq c
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test/CodeGen/X86/code_placement_ignore_succ_in_inner_loop.ll

; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s -check-prefix=CHECK ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
define void @foo() { define void @foo() {
; Test that when determining the edge probability from a node in an inner loop ; Test that when determining the edge probability from a node in an inner loop
; to a node in an outer loop, the weights on edges in the inner loop should be ; to a node in an outer loop, the weights on edges in the inner loop should be
; ignored if we are building the chain for the outer loop. ; ignored if we are building the chain for the outer loop.
; ;
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: callq c ; CHECK: callq c
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test/CodeGen/X86/code_placement_loop_rotation.ll

; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s -check-prefix=CHECK ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK-PROFILE ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK-PROFILE
define void @foo() { define void @foo() {
; Test that not all edges in the loop chain are fall through without profile ; Test that not all edges in the loop chain are fall through without profile
; data. ; data.
; ;
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: callq e ; CHECK: callq e
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test/CodeGen/X86/code_placement_loop_rotation2.ll

; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s -check-prefix=CHECK ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK-PROFILE ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK-PROFILE
define void @foo() { define void @foo() {
; Test a nested loop case when profile data is not available. ; Test a nested loop case when profile data is not available.
; ;
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: callq b ; CHECK: callq b
; CHECK: callq c ; CHECK: callq c
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test/CodeGen/X86/code_placement_outline_optional_branches.ll

; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s -check-prefix=CHECK ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -outline-optional-branches < %s | FileCheck %s -check-prefix=CHECK-OUTLINE ; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -outline-optional-branches < %s | FileCheck %s -check-prefix=CHECK-OUTLINE
define void @foo(i32 %t1, i32 %t2, i32 %t3) { define void @foo(i32 %t1, i32 %t2, i32 %t3) {
; Test that we lift the call to 'c' up to immediately follow the call to 'b' ; Test that we lift the call to 'c' up to immediately follow the call to 'b'
; when we disable the cfg conflict check. ; when we disable the cfg conflict check.
; ;
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: callq a ; CHECK: callq a
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test/CodeGen/X86/pop-stack-cleanup.ll

; RUN: llc < %s -mtriple=i686-windows | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=i686-windows | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=LINUX64 ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=LINUX64
declare void @param1(i32 %a) declare void @param1(i32 %a)
declare i32 @param2_ret(i32 %a, i32 %b) declare i32 @param2_ret(i32 %a, i32 %b)
declare i64 @param2_ret64(i32 %a, i32 %b) declare i64 @param2_ret64(i32 %a, i32 %b)
declare void @param2(i32 %a, i32 %b) declare void @param2(i32 %a, i32 %b)
declare void @param3(i32 %a, i32 %b, i32 %c) declare void @param3(i32 %a, i32 %b, i32 %c)
declare void @param8(i64, i64, i64, i64, i64, i64, i64, i64) declare void @param8(i64, i64, i64, i64, i64, i64, i64, i64)
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test/CodeGen/X86/sink-cheap-instructions.ll

; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-linux -sink-insts-to-avoid-spills | FileCheck %s -check-prefix=SINK ; RUN: llc < %s -mtriple=x86_64-linux -sink-insts-to-avoid-spills | FileCheck %s -check-prefix=SINK
; Ensure that we sink copy-like instructions into loops to avoid register ; Ensure that we sink copy-like instructions into loops to avoid register
; spills. ; spills.
; CHECK: Spill ; CHECK: Spill
; SINK-NOT: Spill ; SINK-NOT: Spill
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test/CodeGen/X86/stack_guard_remat.ll

; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s -check-prefix=CHECK ; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
;CHECK: foo2 ;CHECK: foo2
;CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), [[R0:%[a-z0-9]+]] ;CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), [[R0:%[a-z0-9]+]]
;CHECK: movq ([[R0]]), {{%[a-z0-9]+}} ;CHECK: movq ([[R0]]), {{%[a-z0-9]+}}
; Function Attrs: nounwind ssp uwtable ; Function Attrs: nounwind ssp uwtable
define i32 @test_stack_guard_remat() #0 { define i32 @test_stack_guard_remat() #0 {
entry: entry:
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test/CodeGen/X86/switch-jump-table.ll

; RUN: llc -mtriple=i686-pc-gnu-linux < %s | FileCheck %s -check-prefix=CHECK ; RUN: llc -mtriple=i686-pc-gnu-linux < %s | FileCheck %s
; RUN: llc -mtriple=i686-pc-gnu-linux -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s -check-prefix=CHECK-JT-PROB ; RUN: llc -mtriple=i686-pc-gnu-linux -print-machineinstrs=expand-isel-pseudos %s -o /dev/null 2>&1 | FileCheck %s -check-prefix=CHECK-JT-PROB
; An unreachable default destination is replaced with the most popular case label. ; An unreachable default destination is replaced with the most popular case label.
define void @foo(i32 %x, i32* %to) { define void @foo(i32 %x, i32* %to) {
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: movl 4(%esp), [[REG:%e[a-z]{2}]] ; CHECK: movl 4(%esp), [[REG:%e[a-z]{2}]]
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test/CodeGen/X86/x86-shrink-wrap-unwind.ll

; RUN: llc %s -o - | FileCheck %s --check-prefix=CHECK ; RUN: llc %s -o - | FileCheck %s
; ;
; Note: This test cannot be merged with the shrink-wrapping tests ; Note: This test cannot be merged with the shrink-wrapping tests
; because the booleans set on the command line take precedence on ; because the booleans set on the command line take precedence on
; the target logic that disable shrink-wrapping. ; the target logic that disable shrink-wrapping.
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "x86_64-apple-macosx" target triple = "x86_64-apple-macosx"
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test/DebugInfo/ARM/tls.ll

; RUN: llc -O0 -filetype=asm -mtriple=armv7-linux-gnuehabi < %s \ ; RUN: llc -O0 -filetype=asm -mtriple=armv7-linux-gnuehabi < %s \
; RUN: | FileCheck %s --check-prefix=CHECK ; RUN: | FileCheck %s
; RUN: llc -O0 -filetype=asm -mtriple=armv7-linux-gnuehabi -emulated-tls < %s \ ; RUN: llc -O0 -filetype=asm -mtriple=armv7-linux-gnuehabi -emulated-tls < %s \
; RUN: | FileCheck %s --check-prefix=EMU ; RUN: | FileCheck %s --check-prefix=EMU
; Generated with clang with source ; Generated with clang with source
; __thread int x; ; __thread int x;
@x = thread_local global i32 0, align 4 @x = thread_local global i32 0, align 4
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test/Instrumentation/AddressSanitizer/do-not-instrument-promotable-allocas.ll

; RUN: opt < %s -asan -asan-module -asan-instrument-allocas=1 -S | FileCheck %s --check-prefix=CHECK ; RUN: opt < %s -asan -asan-module -asan-instrument-allocas=1 -S | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.10.0" target triple = "x86_64-apple-macosx10.10.0"
define i32 @test_promotable_allocas() sanitize_address { define i32 @test_promotable_allocas() sanitize_address {
entry: entry:
; CHECK: %0 = alloca i32, align 4 ; CHECK: %0 = alloca i32, align 4
; CHECK: store i32 0, i32* %0, align 4 ; CHECK: store i32 0, i32* %0, align 4
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test/Instrumentation/SanitizerCoverage/cmp-tracing.ll

; Test -sanitizer-coverage-experimental-trace-compares=1 ; Test -sanitizer-coverage-experimental-trace-compares=1
; RUN: opt < %s -sancov -sanitizer-coverage-level=1 -sanitizer-coverage-experimental-trace-compares=1 -S | FileCheck %s --check-prefix=CHECK ; RUN: opt < %s -sancov -sanitizer-coverage-level=1 -sanitizer-coverage-experimental-trace-compares=1 -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
define i32 @foo(i32 %a, i32 %b) #0 { define i32 @foo(i32 %a, i32 %b) #0 {
entry: entry:
%cmp = icmp slt i32 %a, %b %cmp = icmp slt i32 %a, %b
; CHECK: call void @__sanitizer_cov_trace_cmp ; CHECK: call void @__sanitizer_cov_trace_cmp
; CHECK-NEXT: icmp slt i32 %a, %b ; CHECK-NEXT: icmp slt i32 %a, %b
%conv = zext i1 %cmp to i32 %conv = zext i1 %cmp to i32
ret i32 %conv ret i32 %conv
} }

test/Instrumentation/SanitizerCoverage/switch-tracing.ll

; Test -sanitizer-coverage-experimental-trace-compares=1 (instrumenting a switch) ; Test -sanitizer-coverage-experimental-trace-compares=1 (instrumenting a switch)
; RUN: opt < %s -sancov -sanitizer-coverage-level=1 -sanitizer-coverage-experimental-trace-compares=1 -S | FileCheck %s --check-prefix=CHECK ; RUN: opt < %s -sancov -sanitizer-coverage-level=1 -sanitizer-coverage-experimental-trace-compares=1 -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
declare void @_Z3bari(i32) declare void @_Z3bari(i32)
define void @foo(i32 %x) { define void @foo(i32 %x) {
entry: entry:
; CHECK: __sancov_gen_cov_switch_values = internal global [5 x i64] [i64 3, i64 32, i64 1, i64 101, i64 1001] ; CHECK: __sancov_gen_cov_switch_values = internal global [5 x i64] [i64 3, i64 32, i64 1, i64 101, i64 1001]
; CHECK: [[TMP:%[0-9]*]] = zext i32 %x to i64 ; CHECK: [[TMP:%[0-9]*]] = zext i32 %x to i64
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test/MC/ARM/eh-directive-pad-diagnostics.s

@ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t @ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK < %t %s @ RUN: FileCheck < %t %s
@ Check the diagnostics for .pad directive. @ Check the diagnostics for .pad directive.
.syntax unified .syntax unified
.text .text
@------------------------------------------------------------------------------- @-------------------------------------------------------------------------------
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test/MC/ARM/eh-directive-personality-diagnostics.s

@ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t @ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK < %t %s @ RUN: FileCheck < %t %s
@ Check the diagnostics for .personality directive. @ Check the diagnostics for .personality directive.
.syntax unified .syntax unified
.text .text
@------------------------------------------------------------------------------- @-------------------------------------------------------------------------------
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test/MC/ARM/eh-directive-save-diagnostics.s

@ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t @ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK < %t %s @ RUN: FileCheck < %t %s
@ Check the diagnostics for .save directive @ Check the diagnostics for .save directive
@ .save directive should always come after .fnstart directive and @ .save directive should always come after .fnstart directive and
@ before .handlerdata directive. @ before .handlerdata directive.
.syntax unified .syntax unified
.text .text
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test/MC/ARM/eh-directive-setfp-diagnostics.s

@ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t @ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK < %t %s @ RUN: FileCheck < %t %s
@ Check the diagnostics for .setfp directive. @ Check the diagnostics for .setfp directive.
.syntax unified .syntax unified
.text .text
@------------------------------------------------------------------------------- @-------------------------------------------------------------------------------
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test/MC/ARM/eh-directive-vsave-diagnostics.s

@ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t @ RUN: not llvm-mc -triple=armv7-unknown-linux-gnueabi < %s 2> %t
@ RUN: FileCheck --check-prefix=CHECK < %t %s @ RUN: FileCheck < %t %s
@ Check the diagnostics for .vsave directive @ Check the diagnostics for .vsave directive
@ .vsave directive should always come after .fnstart directive @ .vsave directive should always come after .fnstart directive
@ and before .handlerdata directive. @ and before .handlerdata directive.
.syntax unified .syntax unified
.text .text
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test/MC/ARM/thumb2-ldrb-ldrh.s

@ RUN: not llvm-mc -triple thumbv7a-none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK @ RUN: not llvm-mc -triple thumbv7a-none-eabi -show-encoding < %s 2>&1 | FileCheck %s
@ RUN: not llvm-mc -triple thumbv7m-none-eabi -show-encoding < %s 2>&1 | FileCheck %s --check-prefix=CHECK @ RUN: not llvm-mc -triple thumbv7m-none-eabi -show-encoding < %s 2>&1 | FileCheck %s
@ Thumb2 LDRS?[BH] are not valid when Rt == PC (these encodings are used for @ Thumb2 LDRS?[BH] are not valid when Rt == PC (these encodings are used for
@ preload hints). @ preload hints).
@ We don't check the actual error messages here as they are currently not very @ We don't check the actual error messages here as they are currently not very
@ helpful, see http://llvm.org/bugs/show_bug.cgi?id=21066. @ helpful, see http://llvm.org/bugs/show_bug.cgi?id=21066.
@ CHECK: error: @ CHECK: error:
@ CHECK: error: @ CHECK: error:
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test/MC/AsmParser/expr-shr.s

// RUN: llvm-mc -triple x86_64-unknown-unknown-elf %s | FileCheck %s --check-prefix=CHECK // RUN: llvm-mc -triple x86_64-unknown-unknown-elf %s | FileCheck %s
// RUN: llvm-mc -triple x86_64-unknown-darwin %s | FileCheck %s --check-prefix=CHECK // RUN: llvm-mc -triple x86_64-unknown-darwin %s | FileCheck %s
// RUN: llvm-mc -triple x86_64-pc-windows-msvc %s | FileCheck %s --check-prefix=MSVC // RUN: llvm-mc -triple x86_64-pc-windows-msvc %s | FileCheck %s --check-prefix=MSVC
.data .data
// CHECK: .quad 3 // CHECK: .quad 3
// MSVC does AShr. // MSVC does AShr.
// MSVC: .quad -1 // MSVC: .quad -1
.quad (~0 >> 62) .quad (~0 >> 62)

test/MC/Disassembler/ARM/invalid-thumb-MSR-MClass.txt

# RUN: not llvm-mc -disassemble %s -triple=thumbv7em 2>&1 | FileCheck --check-prefix=CHECK %s # RUN: not llvm-mc -disassemble %s -triple=thumbv7em 2>&1 | FileCheck %s
# RUN: not llvm-mc -disassemble %s -triple=thumbv7m 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7M %s # RUN: not llvm-mc -disassemble %s -triple=thumbv7m 2>&1 | FileCheck --check-prefix=CHECK --check-prefix=CHECK-V7M %s
#------------------------------------------------------------------------------ #------------------------------------------------------------------------------
# Undefined encodings for mrs # Undefined encodings for mrs
#------------------------------------------------------------------------------ #------------------------------------------------------------------------------
# invalid SYSm # invalid SYSm
# CHECK: warning: invalid instruction encoding # CHECK: warning: invalid instruction encoding
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test/MC/Mips/micromips-func-addr.s

# RUN: llvm-mc %s -filetype=obj -triple=mipsel-unknown-linux \ # RUN: llvm-mc %s -filetype=obj -triple=mipsel-unknown-linux \
# RUN: -mattr=micromips | llvm-readobj -r \ # RUN: -mattr=micromips | llvm-readobj -r \
# RUN: | FileCheck %s -check-prefix=CHECK # RUN: | FileCheck %s
# CHECK: Relocations [ # CHECK: Relocations [
# CHECK: 0x0 R_MIPS_32 bar 0x0 # CHECK: 0x0 R_MIPS_32 bar 0x0
# CHECK: 0x4 R_MIPS_32 L1 0x0 # CHECK: 0x4 R_MIPS_32 L1 0x0
.set micromips .set micromips
.type bar,@function .type bar,@function
bar: bar:
L1: L1:
nop nop
.data .data
.4byte bar .4byte bar
.4byte L1 .4byte L1

test/MC/Mips/mips-cop0-reginfo.s

# RUN: llvm-mc -arch=mips -mcpu=mips32r2 -filetype=obj %s -o - | \ # RUN: llvm-mc -arch=mips -mcpu=mips32r2 -filetype=obj %s -o - | \
# RUN: llvm-readobj -sections -section-data - | \ # RUN: llvm-readobj -sections -section-data - | \
# RUN: FileCheck %s -check-prefix=CHECK # RUN: FileCheck %s
mfc0 $16, $15, 1 mfc0 $16, $15, 1
mfc0 $16, $16, 1 mfc0 $16, $16, 1
# Checking for the coprocessor 0's register usage was recorded # Checking for the coprocessor 0's register usage was recorded
# and emitted. # and emitted.
# CHECK: Section { # CHECK: Section {
# CHECK: Index: 5 # CHECK: Index: 5
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test/Transforms/IndVarSimplify/sink-trapping.ll

; RUN: opt < %s -indvars -S | FileCheck %s --check-prefix=CHECK ; RUN: opt < %s -indvars -S | FileCheck %s
declare i1 @b() declare i1 @b()
define i32 @a(i32 %x) nounwind { define i32 @a(i32 %x) nounwind {
for.body.preheader: for.body.preheader:
%y = sdiv i32 10, %x %y = sdiv i32 10, %x
br label %for.body br label %for.body
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test/Transforms/SimplifyCFG/switch_create.ll

; RUN: opt -S -simplifycfg < %s | FileCheck -check-prefix=CHECK %s ; RUN: opt -S -simplifycfg < %s | FileCheck %s
; RUN: opt -S -default-data-layout="p:32:32-p1:16:16" -simplifycfg < %s | FileCheck -check-prefix=CHECK -check-prefix=DL %s ; RUN: opt -S -default-data-layout="p:32:32-p1:16:16" -simplifycfg < %s | FileCheck -check-prefix=CHECK -check-prefix=DL %s
declare void @foo1() declare void @foo1()
declare void @foo2() declare void @foo2()
define void @test1(i32 %V) { define void @test1(i32 %V) {
%C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1] %C1 = icmp eq i32 %V, 4 ; <i1> [#uses=1]
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test/tools/llvm-profdata/c-general.test

REGENERATE: You need a checkout of clang with compiler-rt to generate the REGENERATE: You need a checkout of clang with compiler-rt to generate the
REGENERATE: binary file here. These shell commands can be used to regenerate REGENERATE: binary file here. These shell commands can be used to regenerate
REGENERATE: it. REGENERATE: it.
REGENERATE: REGENERATE:
REGENERATE: $ SRC=path/to/llvm REGENERATE: $ SRC=path/to/llvm
REGENERATE: $ CFE=$SRC/tools/clang REGENERATE: $ CFE=$SRC/tools/clang
REGENERATE: $ TESTDIR=$SRC/test/tools/llvm-profdata REGENERATE: $ TESTDIR=$SRC/test/tools/llvm-profdata
REGENERATE: $ CFE_TESTDIR=$CFE/test/Profile REGENERATE: $ CFE_TESTDIR=$CFE/test/Profile
REGENERATE: $ clang -o a.out -fprofile-instr-generate $CFE_TESTDIR/c-general.c REGENERATE: $ clang -o a.out -fprofile-instr-generate $CFE_TESTDIR/c-general.c
REGENERATE: $ LLVM_PROFILE_FILE=$TESTDIR/Inputs/c-general.profraw ./a.out REGENERATE: $ LLVM_PROFILE_FILE=$TESTDIR/Inputs/c-general.profraw ./a.out
RUN: llvm-profdata show %p/Inputs/c-general.profraw -o - | FileCheck %s -check-prefix=CHECK RUN: llvm-profdata show %p/Inputs/c-general.profraw -o - | FileCheck %s
RUN: llvm-profdata show %p/Inputs/c-general.profraw -o - --function=switches | FileCheck %s -check-prefix=SWITCHES -check-prefix=CHECK RUN: llvm-profdata show %p/Inputs/c-general.profraw -o - --function=switches | FileCheck %s -check-prefix=SWITCHES -check-prefix=CHECK
SWITCHES-LABEL: Counters: SWITCHES-LABEL: Counters:
SWITCHES-NEXT: switches: SWITCHES-NEXT: switches:
SWITCHES-NEXT: Hash: 0x2618e4f23f2e8daa SWITCHES-NEXT: Hash: 0x2618e4f23f2e8daa
SWITCHES-NEXT: Counters: 19 SWITCHES-NEXT: Counters: 19
SWITCHES-NEXT: Function count: 1 SWITCHES-NEXT: Function count: 1
SWITCHES-LABEL: Functions shown: 1 SWITCHES-LABEL: Functions shown: 1
CHECK-LABEL: Total functions: 12 CHECK-LABEL: Total functions: 12
CHECK-NEXT: Maximum function count: 1 CHECK-NEXT: Maximum function count: 1
CHECK-NEXT: Maximum internal block count: 100 CHECK-NEXT: Maximum internal block count: 100

test/tools/llvm-symbolizer/pdb/pdb.test

RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \
RUN: | llvm-symbolizer -obj="%p/Inputs/test.exe" \ RUN: | llvm-symbolizer -obj="%p/Inputs/test.exe" \
RUN: | FileCheck %s --check-prefix=CHECK RUN: | FileCheck %s
RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \
RUN: | llvm-symbolizer -obj="%p/Inputs/test.exe" -demangle=false \ RUN: | llvm-symbolizer -obj="%p/Inputs/test.exe" -demangle=false \
RUN: | FileCheck %s --check-prefix=CHECK-NO-DEMANGLE RUN: | FileCheck %s --check-prefix=CHECK-NO-DEMANGLE
Subtract ImageBase from all the offsets and run the test again with Subtract ImageBase from all the offsets and run the test again with
--relative-address. --relative-address.
RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \ RUN: grep '^ADDR:' %s | sed -s 's/ADDR: //' \
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test/tools/llvm-symbolizer/print_context.c

// REQUIRES: x86_64-linux // REQUIRES: x86_64-linux
// RUN: %host_cc -O0 -g %s -o %t 2>&1 // RUN: %host_cc -O0 -g %s -o %t 2>&1
// RUN: %t 2>&1 | llvm-symbolizer -print-source-context-lines=5 -obj=%t | FileCheck %s --check-prefix=CHECK // RUN: %t 2>&1 | llvm-symbolizer -print-source-context-lines=5 -obj=%t | FileCheck %s
#include <stdio.h> #include <stdio.h>
int inc(int a) { int inc(int a) {
return a + 1; return a + 1;
} }
int main() { int main() {
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