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[mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions
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Authored by zbuljan on Apr 7 2016, 6:23 AM.

Details

Summary

The patch implements microMIPSr6 TLBP, TLBR, TLBWI and TLBWR instructions.

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Event Timeline

zbuljan updated this revision to Diff 52907.Apr 7 2016, 6:23 AM
zbuljan retitled this revision from to [mips][microMIPS] Implement TLBP, TLBR, TLBWI and TLBWR instructions.
zbuljan updated this object.
zbuljan added subscribers: petarj, llvm-commits.

Can you add corresponding invalid tests for these instructions in test/MC/Mips/micromips{32r6, 64r6}/invalid.s ? They do not take an immediate or registers.

zbuljan updated this revision to Diff 53198.Apr 11 2016, 12:36 AM
zbuljan edited edge metadata.

Added invalid tests for TLBP, TLBR, TLBWI and TLBWR instructions.

sdardis accepted this revision.Apr 12 2016, 2:25 AM
sdardis edited edge metadata.

LGTM.

This revision is now accepted and ready to land.Apr 12 2016, 2:25 AM
This revision was automatically updated to reflect the committed changes.