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[AMDGPU] Disassembler: Support for all VOP1 instructions.
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Authored by SamWot on Feb 12 2016, 4:39 AM.

Details

Summary

Support all instructions with VOP1 encoding with 32 or 64-bit operands for VI subtarget:

  • VGPR_32 and VReg_64 operand register classes
  • VS_32 and VS_64 operand register classes with inline and literal constants
  • Tests for VOP1 instructions.

This change contains changes from reviews D16723 and D16920 because it is dependent on them.

Diff Detail

Event Timeline

SamWot updated this revision to Diff 47790.Feb 12 2016, 4:39 AM
SamWot retitled this revision from to [AMDGPU] Disassembler: Support for all VOP1 instructions..
SamWot updated this object.
SamWot added reviewers: arsenm, tstellarAMD.
SamWot added a project: Restricted Project.Feb 12 2016, 6:28 AM
SamWot updated this revision to Diff 48171.Feb 17 2016, 3:52 AM

Updated review with latests LLVM master

SamWot updated this revision to Diff 48193.Feb 17 2016, 8:20 AM

Fix dmask encoding

Did you upload the wrong patch? This seems to be a combination of the original disassembler patch and also the one that adds VOP1 support.

Did you upload the wrong patch? This seems to be a combination of the original disassembler patch and also the one that adds VOP1 support.

This patch contain changes from original disassembler patch. This was made intentionally, because review was created before original disassembler was submitted to master and without it this patch doesn't work and doesn't apply to LLVM master. Now this is not needed and I will update review.

SamWot updated this revision to Diff 48582.Feb 20 2016, 2:01 AM
SamWot edited edge metadata.

Updated patch

tstellarAMD accepted this revision.Feb 24 2016, 7:32 PM
tstellarAMD edited edge metadata.

LGTM, but there are 3 warnings which need to be fixed before committing.

This revision is now accepted and ready to land.Feb 24 2016, 7:32 PM
SamWot updated this revision to Diff 49040.Feb 25 2016, 4:40 AM
SamWot edited edge metadata.

Fix warnings

SamWot set the repository for this revision to rL LLVM.Feb 25 2016, 5:03 AM
SamWot closed this revision.Feb 26 2016, 12:59 AM

Submitted by nhaustov