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[AArch64] Simplify prolog/epilog callee save/restore. NFC.
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Authored by gberry on Jan 29 2016, 12:51 PM.

Details

Summary

Factor out common code for callee-save register pair calculation. This
is intended to simplify follow-on changes that reduce the number of
registers saved/restored.

Depends on D16732

Diff Detail

Repository
rL LLVM

Event Timeline

gberry updated this revision to Diff 46414.Jan 29 2016, 12:51 PM
gberry retitled this revision from to [AArch64] Simplify prolog/epilog callee save/restore. NFC..
gberry updated this object.
gberry added reviewers: mcrosier, jmolloy, t.p.northover.
gberry added a subscriber: llvm-commits.

Thanks for doing this!

I just have two tiny nits for you. :)

lib/Target/AArch64/AArch64FrameLowering.cpp
682 ↗(On Diff #46414)

Can this take a SmallVectorImpl<RegPairInfo> & instead?

687 ↗(On Diff #46414)

It seems that you always add Count/2 elements to RegPairs. Is there any harm in reserving this amount of space in RegPairs ahead of time?

gberry marked an inline comment as done.Feb 1 2016, 9:22 AM
gberry added inline comments.
lib/Target/AArch64/AArch64FrameLowering.cpp
682 ↗(On Diff #46414)

Thanks, I hadn't learned that trick yet.

687 ↗(On Diff #46414)

The number of RegPairs added is going to change in my next patch (and be less predictable up front), so I'm not sure this makes sense. It will still be possible to reserve an upper bound in the next change (with the possibility of not using all of the reserved space). Do you still think this is worth doing in light of that?

lib/Target/AArch64/AArch64FrameLowering.cpp
687 ↗(On Diff #46414)

Ah, if the result size isn't going to be basically handed to us for free, then I agree with you that it's probably better to not resize upfront. :)

This revision was automatically updated to reflect the committed changes.
gberry marked an inline comment as done.