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Differential D16516

[opaque pointer types] Add an explicit value type to the byval attribute.
Needs ReviewPublic

Authored by mjacob on Jan 23 2016, 7:05 PM.
This revision needs review, but all specified reviewers are disabled or inactive.

Details

Reviewers
• tstellarAMD
Summary

The semantics of a pointer parameter with the byval attribute depend on
the pointee type. In a world with opaque pointer types we need to
record this type (or, at least its size and alignment) explicitly.

It is yet to be decided whether this is the right approach. Discussion
will be continued on llvm-dev in parallel.

Depends on D16515.

Diff Detail

Event Timeline

mjacob updated this revision to Diff 45816.Jan 23 2016, 7:05 PM
mjacob retitled this revision from to [opaque pointer types] Add an explicit value type to the byval attribute..
mjacob updated this object.
mjacob added a parent revision: D16515: [Attributes] Implement type attributes..
mjacob added subscribers: dblaikie, eddyb, llvm-commits.
Herald added a reviewer: • tstellarAMD. · View Herald TranscriptJan 23 2016, 7:05 PM
Herald added subscribers: dsanders, jyknight, qcolombet and 2 others. · View Herald Transcript
mjacob mentioned this in D16515: [Attributes] Implement type attributes..Apr 26 2017, 6:34 AM

Revision Contents

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Diff 45816

include/llvm/IR/Attributes.h

Show First 20 Lines • Show All 89 Lines • ▼ Show 20 Linespublic:
/// \brief Return a uniquified Attribute object that has the specific /// \brief Return a uniquified Attribute object that has the specific
/// alignment set. /// alignment set.
static Attribute getWithAlignment(LLVMContext &Context, uint64_t Align); static Attribute getWithAlignment(LLVMContext &Context, uint64_t Align);
static Attribute getWithStackAlignment(LLVMContext &Context, uint64_t Align); static Attribute getWithStackAlignment(LLVMContext &Context, uint64_t Align);
static Attribute getWithDereferenceableBytes(LLVMContext &Context, static Attribute getWithDereferenceableBytes(LLVMContext &Context,
uint64_t Bytes); uint64_t Bytes);
static Attribute getWithDereferenceableOrNullBytes(LLVMContext &Context, static Attribute getWithDereferenceableOrNullBytes(LLVMContext &Context,
uint64_t Bytes); uint64_t Bytes);
static Attribute getWithByValTy(LLVMContext &Context, Type *Ty);
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Attribute Accessors // Attribute Accessors
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
/// \brief Return true if the attribute is an Attribute::AttrKind type. /// \brief Return true if the attribute is an Attribute::AttrKind type.
bool isEnumAttribute() const; bool isEnumAttribute() const;
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Linespublic:
/// \brief Returns the number of dereferenceable bytes from the /// \brief Returns the number of dereferenceable bytes from the
/// dereferenceable attribute. /// dereferenceable attribute.
uint64_t getDereferenceableBytes() const; uint64_t getDereferenceableBytes() const;
/// \brief Returns the number of dereferenceable_or_null bytes from the /// \brief Returns the number of dereferenceable_or_null bytes from the
/// dereferenceable_or_null attribute. /// dereferenceable_or_null attribute.
uint64_t getDereferenceableOrNullBytes() const; uint64_t getDereferenceableOrNullBytes() const;
/// \brief Returns the type from the byval attribute.
Type *getByValTy() const;
/// \brief The Attribute is converted to a string of equivalent mnemonic. This /// \brief The Attribute is converted to a string of equivalent mnemonic. This
/// is, presumably, for writing out the mnemonics for the assembly writer. /// is, presumably, for writing out the mnemonics for the assembly writer.
std::string getAsString(bool InAttrGrp = false) const; std::string getAsString(bool InAttrGrp = false) const;
/// \brief Equality and non-equality operators. /// \brief Equality and non-equality operators.
bool operator==(Attribute A) const { return pImpl == A.pImpl; } bool operator==(Attribute A) const { return pImpl == A.pImpl; }
bool operator!=(Attribute A) const { return pImpl != A.pImpl; } bool operator!=(Attribute A) const { return pImpl != A.pImpl; }
▲ Show 20 Lines • Show All 104 Lines • ▼ Show 20 Lines AttributeSet addDereferenceableAttr(LLVMContext &C, unsigned Index,
uint64_t Bytes) const; uint64_t Bytes) const;
/// \brief Add the dereferenceable_or_null attribute to the attribute set at /// \brief Add the dereferenceable_or_null attribute to the attribute set at
/// the given index. Because attribute sets are immutable, this returns a new /// the given index. Because attribute sets are immutable, this returns a new
/// set. /// set.
AttributeSet addDereferenceableOrNullAttr(LLVMContext &C, unsigned Index, AttributeSet addDereferenceableOrNullAttr(LLVMContext &C, unsigned Index,
uint64_t Bytes) const; uint64_t Bytes) const;
/// \brief Add the byval attribute to the attribute set at the given index.
/// Because attribute sets are immutable, this returns a new set.
AttributeSet addByValAttr(LLVMContext &C, unsigned Index, Type *Ty) const;
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// AttributeSet Accessors // AttributeSet Accessors
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
/// \brief Retrieve the LLVM context. /// \brief Retrieve the LLVM context.
LLVMContext &getContext() const; LLVMContext &getContext() const;
/// \brief The attributes for the specified index are returned. /// \brief The attributes for the specified index are returned.
Show All 32 Linespublic:
/// \brief Get the number of dereferenceable bytes (or zero if unknown). /// \brief Get the number of dereferenceable bytes (or zero if unknown).
uint64_t getDereferenceableBytes(unsigned Index) const; uint64_t getDereferenceableBytes(unsigned Index) const;
/// \brief Get the number of dereferenceable_or_null bytes (or zero if /// \brief Get the number of dereferenceable_or_null bytes (or zero if
/// unknown). /// unknown).
uint64_t getDereferenceableOrNullBytes(unsigned Index) const; uint64_t getDereferenceableOrNullBytes(unsigned Index) const;
/// \brief Get the type from the byval attribute.
Type *getByValTy(unsigned Index) const;
/// \brief Return the attributes at the index as a string. /// \brief Return the attributes at the index as a string.
std::string getAsString(unsigned Index, bool InAttrGrp = false) const; std::string getAsString(unsigned Index, bool InAttrGrp = false) const;
typedef ArrayRef<Attribute>::iterator iterator; typedef ArrayRef<Attribute>::iterator iterator;
iterator begin(unsigned Slot) const; iterator begin(unsigned Slot) const;
iterator end(unsigned Slot) const; iterator end(unsigned Slot) const;
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
/// equality, presence of attributes, etc. /// equality, presence of attributes, etc.
class AttrBuilder { class AttrBuilder {
std::bitset<Attribute::EndAttrKinds> Attrs; std::bitset<Attribute::EndAttrKinds> Attrs;
std::map<std::string, std::string> TargetDepAttrs; std::map<std::string, std::string> TargetDepAttrs;
uint64_t Alignment; uint64_t Alignment;
uint64_t StackAlignment; uint64_t StackAlignment;
uint64_t DerefBytes; uint64_t DerefBytes;
uint64_t DerefOrNullBytes; uint64_t DerefOrNullBytes;
Type *ByValTy;
public: public:
AttrBuilder() AttrBuilder()
: Attrs(0), Alignment(0), StackAlignment(0), DerefBytes(0), : Attrs(0), Alignment(0), StackAlignment(0), DerefBytes(0),
DerefOrNullBytes(0) {} DerefOrNullBytes(0), ByValTy(nullptr) {}
explicit AttrBuilder(uint64_t Val) explicit AttrBuilder(uint64_t Val)
: Attrs(0), Alignment(0), StackAlignment(0), DerefBytes(0), : Attrs(0), Alignment(0), StackAlignment(0), DerefBytes(0),
DerefOrNullBytes(0) { DerefOrNullBytes(0), ByValTy(nullptr) {
addRawValue(Val); addRawValue(Val);
} }
AttrBuilder(const Attribute &A) AttrBuilder(const Attribute &A)
: Attrs(0), Alignment(0), StackAlignment(0), DerefBytes(0), : Attrs(0), Alignment(0), StackAlignment(0), DerefBytes(0),
DerefOrNullBytes(0) { DerefOrNullBytes(0), ByValTy(nullptr) {
addAttribute(A); addAttribute(A);
} }
AttrBuilder(AttributeSet AS, unsigned Idx); AttrBuilder(AttributeSet AS, unsigned Idx);
void clear(); void clear();
/// \brief Add an attribute to the builder. /// \brief Add an attribute to the builder.
AttrBuilder &addAttribute(Attribute::AttrKind Val); AttrBuilder &addAttribute(Attribute::AttrKind Val);
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Linespublic:
/// \brief Retrieve the number of dereferenceable bytes, if the /// \brief Retrieve the number of dereferenceable bytes, if the
/// dereferenceable attribute exists (zero is returned otherwise). /// dereferenceable attribute exists (zero is returned otherwise).
uint64_t getDereferenceableBytes() const { return DerefBytes; } uint64_t getDereferenceableBytes() const { return DerefBytes; }
/// \brief Retrieve the number of dereferenceable_or_null bytes, if the /// \brief Retrieve the number of dereferenceable_or_null bytes, if the
/// dereferenceable_or_null attribute exists (zero is returned otherwise). /// dereferenceable_or_null attribute exists (zero is returned otherwise).
uint64_t getDereferenceableOrNullBytes() const { return DerefOrNullBytes; } uint64_t getDereferenceableOrNullBytes() const { return DerefOrNullBytes; }
/// \brief Retrieve the type from the byval attribute, if the byval attribute
/// exists (nullptr is returned otherwise).
Type *getByValTy() const { return ByValTy; }
/// \brief This turns an int alignment (which must be a power of 2) into the /// \brief This turns an int alignment (which must be a power of 2) into the
/// form used internally in Attribute. /// form used internally in Attribute.
AttrBuilder &addAlignmentAttr(unsigned Align); AttrBuilder &addAlignmentAttr(unsigned Align);
/// \brief This turns an int stack alignment (which must be a power of 2) into /// \brief This turns an int stack alignment (which must be a power of 2) into
/// the form used internally in Attribute. /// the form used internally in Attribute.
AttrBuilder &addStackAlignmentAttr(unsigned Align); AttrBuilder &addStackAlignmentAttr(unsigned Align);
/// \brief This turns the number of dereferenceable bytes into the form used /// \brief This turns the number of dereferenceable bytes into the form used
/// internally in Attribute. /// internally in Attribute.
AttrBuilder &addDereferenceableAttr(uint64_t Bytes); AttrBuilder &addDereferenceableAttr(uint64_t Bytes);
/// \brief This turns the number of dereferenceable_or_null bytes into the /// \brief This turns the number of dereferenceable_or_null bytes into the
/// form used internally in Attribute. /// form used internally in Attribute.
AttrBuilder &addDereferenceableOrNullAttr(uint64_t Bytes); AttrBuilder &addDereferenceableOrNullAttr(uint64_t Bytes);
/// \brief This turns a type for the byval attribute into the form used
/// internally in Attribute.
AttrBuilder &addByValAttr(Type *Ty);
/// \brief Return true if the builder contains no target-independent /// \brief Return true if the builder contains no target-independent
/// attributes. /// attributes.
bool empty() const { return Attrs.none(); } bool empty() const { return Attrs.none(); }
// Iterators for target-dependent attributes. // Iterators for target-dependent attributes.
typedef std::pair<std::string, std::string> td_type; typedef std::pair<std::string, std::string> td_type;
typedef std::map<std::string, std::string>::iterator td_iterator; typedef std::map<std::string, std::string>::iterator td_iterator;
typedef std::map<std::string, std::string>::const_iterator td_const_iterator; typedef std::map<std::string, std::string>::const_iterator td_const_iterator;
▲ Show 20 Lines • Show All 44 Lines • Show Last 20 Lines

include/llvm/IR/Type.h

Show First 20 Lines • Show All 103 Lines • ▼ Show 20 Linesprotected:
/// For example, this includes the arguments of a function type, the elements /// For example, this includes the arguments of a function type, the elements
/// of a structure, the pointee of a pointer, the element type of an array, /// of a structure, the pointee of a pointer, the element type of an array,
/// etc. This pointer may be 0 for types that don't contain other types /// etc. This pointer may be 0 for types that don't contain other types
/// (Integer, Double, Float). /// (Integer, Double, Float).
Type * const *ContainedTys; Type * const *ContainedTys;
public: public:
void print(raw_ostream &O, bool IsForDebug = false) const; void print(raw_ostream &O, bool IsForDebug = false) const;
void printWithoutBody(raw_ostream &O) const;
void dump() const; void dump() const;
/// getContext - Return the LLVMContext in which this type was uniqued. /// getContext - Return the LLVMContext in which this type was uniqued.
LLVMContext &getContext() const { return Context; } LLVMContext &getContext() const { return Context; }
//===--------------------------------------------------------------------===// //===--------------------------------------------------------------------===//
// Accessors for working with types. // Accessors for working with types.
// //
▲ Show 20 Lines • Show All 361 Lines • Show Last 20 Lines

lib/AsmParser/LLParser.cpp

Show First 20 Lines • Show All 1,291 Lines • ▼ Show 20 Lines while (1) {
} }
case lltok::kw_align: { case lltok::kw_align: {
unsigned Alignment; unsigned Alignment;
if (ParseOptionalAlignment(Alignment)) if (ParseOptionalAlignment(Alignment))
return true; return true;
B.addAlignmentAttr(Alignment); B.addAlignmentAttr(Alignment);
continue; continue;
} }
case lltok::kw_byval: B.addAttribute(Attribute::ByVal); break; case lltok::kw_byval: {
Lex.Lex();
LocTy ParenLoc = Lex.getLoc();
if (!EatIfPresent(lltok::lparen))
return Error(ParenLoc, "expected '('");
Type *Ty;
if (ParseType(Ty))
return true;
ParenLoc = Lex.getLoc();
if (!EatIfPresent(lltok::rparen))
return Error(ParenLoc, "expected ')'");
B.addByValAttr(Ty);
continue;
}
case lltok::kw_dereferenceable: { case lltok::kw_dereferenceable: {
uint64_t Bytes; uint64_t Bytes;
if (ParseOptionalDerefAttrBytes(lltok::kw_dereferenceable, Bytes)) if (ParseOptionalDerefAttrBytes(lltok::kw_dereferenceable, Bytes))
return true; return true;
B.addDereferenceableAttr(Bytes); B.addDereferenceableAttr(Bytes);
continue; continue;
} }
case lltok::kw_dereferenceable_or_null: { case lltok::kw_dereferenceable_or_null: {
▲ Show 20 Lines • Show All 4,956 Lines • Show Last 20 Lines

lib/Bitcode/Reader/BitcodeReader.cpp

Show First 20 Lines • Show All 842 Lines • ▼ Show 20 Lines
static void upgradeDLLImportExportLinkage(llvm::GlobalValue *GV, unsigned Val) { static void upgradeDLLImportExportLinkage(llvm::GlobalValue *GV, unsigned Val) {
switch (Val) { switch (Val) {
case 5: GV->setDLLStorageClass(GlobalValue::DLLImportStorageClass); break; case 5: GV->setDLLStorageClass(GlobalValue::DLLImportStorageClass); break;
case 6: GV->setDLLStorageClass(GlobalValue::DLLExportStorageClass); break; case 6: GV->setDLLStorageClass(GlobalValue::DLLExportStorageClass); break;
} }
} }
static AttributeSet fixByValAttr(AttributeSet Attributes, FunctionType &FTy) {
for (size_t i = 0; i < FTy.getNumParams(); ++i) {
if (!Attributes.hasAttribute(i + 1, Attribute::ByVal))
continue;
Type *ByValTy = Attributes.getByValTy(i + 1);
Type *ParamPointeeTy = FTy.getParamType(i)->getPointerElementType();
if (ByValTy == (Type *) -1) {
Attributes =
Attributes.addByValAttr(FTy.getContext(), i + 1, ParamPointeeTy);
} else {
assert(ByValTy == ParamPointeeTy);
}
}
return Attributes;
}
namespace llvm { namespace llvm {
namespace { namespace {
/// \brief A class for maintaining the slot number definition /// \brief A class for maintaining the slot number definition
/// as a placeholder for the actual definition for forward constants defs. /// as a placeholder for the actual definition for forward constants defs.
class ConstantPlaceHolder : public ConstantExpr { class ConstantPlaceHolder : public ConstantExpr {
void operator=(const ConstantPlaceHolder &) = delete; void operator=(const ConstantPlaceHolder &) = delete;
public: public:
▲ Show 20 Lines • Show All 514 Lines • ▼ Show 20 Lines case bitc::PARAMATTR_GRP_CODE_ENTRY: { // ENTRY: [grpid, idx, a0, a1, ...]
AttrBuilder B; AttrBuilder B;
for (unsigned i = 2, e = Record.size(); i != e; ++i) { for (unsigned i = 2, e = Record.size(); i != e; ++i) {
if (Record[i] == 0) { // Enum attribute if (Record[i] == 0) { // Enum attribute
Attribute::AttrKind Kind; Attribute::AttrKind Kind;
if (std::error_code EC = parseAttrKind(Record[++i], &Kind)) if (std::error_code EC = parseAttrKind(Record[++i], &Kind))
return EC; return EC;
if (Kind == Attribute::ByVal)
B.addByValAttr((Type *) -1);
else
B.addAttribute(Kind); B.addAttribute(Kind);
} else if (Record[i] == 1) { // Integer attribute } else if (Record[i] == 1) { // Integer attribute
Attribute::AttrKind Kind; Attribute::AttrKind Kind;
if (std::error_code EC = parseAttrKind(Record[++i], &Kind)) if (std::error_code EC = parseAttrKind(Record[++i], &Kind))
return EC; return EC;
if (Kind == Attribute::Alignment) if (Kind == Attribute::Alignment)
B.addAlignmentAttr(Record[++i]); B.addAlignmentAttr(Record[++i]);
else if (Kind == Attribute::StackAlignment) else if (Kind == Attribute::StackAlignment)
B.addStackAlignmentAttr(Record[++i]); B.addStackAlignmentAttr(Record[++i]);
else if (Kind == Attribute::Dereferenceable) else if (Kind == Attribute::Dereferenceable)
B.addDereferenceableAttr(Record[++i]); B.addDereferenceableAttr(Record[++i]);
else if (Kind == Attribute::DereferenceableOrNull) else if (Kind == Attribute::DereferenceableOrNull)
B.addDereferenceableOrNullAttr(Record[++i]); B.addDereferenceableOrNullAttr(Record[++i]);
} else if (Record[i] == 5) { // Type attribute } else if (Record[i] == 5) { // Type attribute
Attribute::AttrKind Kind; Attribute::AttrKind Kind;
if (std::error_code EC = parseAttrKind(Record[++i], &Kind)) if (std::error_code EC = parseAttrKind(Record[++i], &Kind))
return EC; return EC;
if (Kind == Attribute::ByVal)
B.addByValAttr(getTypeByID(Record[++i]));
} else { // String attribute } else { // String attribute
assert((Record[i] == 3 || Record[i] == 4) && assert((Record[i] == 3 || Record[i] == 4) &&
"Invalid attribute group entry"); "Invalid attribute group entry");
bool HasValue = (Record[i++] == 4); bool HasValue = (Record[i++] == 4);
SmallString<64> KindStr; SmallString<64> KindStr;
SmallString<64> ValStr; SmallString<64> ValStr;
while (Record[i] != 0 && i != e) while (Record[i] != 0 && i != e)
▲ Show 20 Lines • Show All 2,154 Lines • ▼ Show 20 Lines case bitc::MODULE_CODE_FUNCTION: {
Function *Func = Function::Create(FTy, GlobalValue::ExternalLinkage, Function *Func = Function::Create(FTy, GlobalValue::ExternalLinkage,
"", TheModule); "", TheModule);
Func->setCallingConv(CC); Func->setCallingConv(CC);
bool isProto = Record[2]; bool isProto = Record[2];
uint64_t RawLinkage = Record[3]; uint64_t RawLinkage = Record[3];
Func->setLinkage(getDecodedLinkage(RawLinkage)); Func->setLinkage(getDecodedLinkage(RawLinkage));
Func->setAttributes(getAttributes(Record[4])); Func->setAttributes(fixByValAttr(getAttributes(Record[4]), *FTy));
unsigned Alignment; unsigned Alignment;
if (std::error_code EC = parseAlignmentValue(Record[5], Alignment)) if (std::error_code EC = parseAlignmentValue(Record[5], Alignment))
return EC; return EC;
Func->setAlignment(Alignment); Func->setAlignment(Alignment);
if (Record[6]) { if (Record[6]) {
if (Record[6]-1 >= SectionTable.size()) if (Record[6]-1 >= SectionTable.size())
return error("Invalid ID"); return error("Invalid ID");
▲ Show 20 Lines • Show All 2,432 Lines • Show Last 20 Lines

lib/IR/AsmWriter.cpp

Show First 20 Lines • Show All 3,262 Lines • ▼ Show 20 Linesvoid Type::print(raw_ostream &OS, bool /*IsForDebug*/) const {
// If the type is a named struct type, print the body as well. // If the type is a named struct type, print the body as well.
if (StructType *STy = dyn_cast<StructType>(const_cast<Type*>(this))) if (StructType *STy = dyn_cast<StructType>(const_cast<Type*>(this)))
if (!STy->isLiteral()) { if (!STy->isLiteral()) {
OS << " = type "; OS << " = type ";
TP.printStructBody(STy, OS); TP.printStructBody(STy, OS);
} }
} }
void Type::printWithoutBody(raw_ostream &OS) const {
TypePrinting TP;
TP.print(const_cast<Type*>(this), OS);
}
static bool isReferencingMDNode(const Instruction &I) { static bool isReferencingMDNode(const Instruction &I) {
if (const auto *CI = dyn_cast<CallInst>(&I)) if (const auto *CI = dyn_cast<CallInst>(&I))
if (Function *F = CI->getCalledFunction()) if (Function *F = CI->getCalledFunction())
if (F->isIntrinsic()) if (F->isIntrinsic())
for (auto &Op : I.operands()) for (auto &Op : I.operands())
if (auto *V = dyn_cast_or_null<MetadataAsValue>(Op)) if (auto *V = dyn_cast_or_null<MetadataAsValue>(Op))
if (isa<MDNode>(V->getMetadata())) if (isa<MDNode>(V->getMetadata()))
return true; return true;
▲ Show 20 Lines • Show All 178 Lines • Show Last 20 Lines

lib/IR/AttributeImpl.h

Show First 20 Lines • Show All 188 Lines • ▼ Show 20 Linespublic:
Attribute getAttribute(Attribute::AttrKind Kind) const; Attribute getAttribute(Attribute::AttrKind Kind) const;
Attribute getAttribute(StringRef Kind) const; Attribute getAttribute(StringRef Kind) const;
unsigned getAlignment() const; unsigned getAlignment() const;
unsigned getStackAlignment() const; unsigned getStackAlignment() const;
uint64_t getDereferenceableBytes() const; uint64_t getDereferenceableBytes() const;
uint64_t getDereferenceableOrNullBytes() const; uint64_t getDereferenceableOrNullBytes() const;
Type *getByValTy() const;
std::string getAsString(bool InAttrGrp) const; std::string getAsString(bool InAttrGrp) const;
typedef const Attribute *iterator; typedef const Attribute *iterator;
iterator begin() const { return getTrailingObjects<Attribute>(); } iterator begin() const { return getTrailingObjects<Attribute>(); }
iterator end() const { return begin() + NumAttrs; } iterator end() const { return begin() + NumAttrs; }
void Profile(FoldingSetNodeID &ID) const { void Profile(FoldingSetNodeID &ID) const {
Profile(ID, makeArrayRef(begin(), end())); Profile(ID, makeArrayRef(begin(), end()));
▲ Show 20 Lines • Show All 103 Lines • Show Last 20 Lines

lib/IR/Attributes.cpp

Show First 20 Lines • Show All 119 Lines • ▼ Show 20 Lines
} }
Attribute Attribute::getWithDereferenceableOrNullBytes(LLVMContext &Context, Attribute Attribute::getWithDereferenceableOrNullBytes(LLVMContext &Context,
uint64_t Bytes) { uint64_t Bytes) {
assert(Bytes && "Bytes must be non-zero."); assert(Bytes && "Bytes must be non-zero.");
return get(Context, DereferenceableOrNull, Bytes); return get(Context, DereferenceableOrNull, Bytes);
} }
Attribute Attribute::getWithByValTy(LLVMContext &Context, Type *Ty) {
assert(Ty && "Ty must be non-nullptr.");
return get(Context, ByVal, Ty);
}
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Attribute Accessor Methods // Attribute Accessor Methods
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
bool Attribute::isEnumAttribute() const { bool Attribute::isEnumAttribute() const {
return pImpl && pImpl->isEnumAttribute(); return pImpl && pImpl->isEnumAttribute();
} }
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
uint64_t Attribute::getDereferenceableOrNullBytes() const { uint64_t Attribute::getDereferenceableOrNullBytes() const {
assert(hasAttribute(Attribute::DereferenceableOrNull) && assert(hasAttribute(Attribute::DereferenceableOrNull) &&
"Trying to get dereferenceable bytes from " "Trying to get dereferenceable bytes from "
"non-dereferenceable attribute!"); "non-dereferenceable attribute!");
return pImpl->getValueAsInt(); return pImpl->getValueAsInt();
} }
Type *Attribute::getByValTy() const {
assert(hasAttribute(Attribute::ByVal) &&
"Trying to get type from non-byval attribute!");
return pImpl->getValueAsType();
}
std::string Attribute::getAsString(bool InAttrGrp) const { std::string Attribute::getAsString(bool InAttrGrp) const {
if (!pImpl) return ""; if (!pImpl) return "";
if (hasAttribute(Attribute::SanitizeAddress)) if (hasAttribute(Attribute::SanitizeAddress))
return "sanitize_address"; return "sanitize_address";
if (hasAttribute(Attribute::AlwaysInline)) if (hasAttribute(Attribute::AlwaysInline))
return "alwaysinline"; return "alwaysinline";
if (hasAttribute(Attribute::ArgMemOnly)) if (hasAttribute(Attribute::ArgMemOnly))
return "argmemonly"; return "argmemonly";
if (hasAttribute(Attribute::Builtin)) if (hasAttribute(Attribute::Builtin))
return "builtin"; return "builtin";
if (hasAttribute(Attribute::ByVal)) if (hasAttribute(Attribute::ByVal)) {
return "byval"; std::string Result = "byval(";
raw_string_ostream Tmp(Result);
getValueAsType()->printWithoutBody(Tmp);
Tmp.flush();
Result += ")";
return Result;
}
if (hasAttribute(Attribute::Convergent)) if (hasAttribute(Attribute::Convergent))
return "convergent"; return "convergent";
if (hasAttribute(Attribute::InaccessibleMemOnly)) if (hasAttribute(Attribute::InaccessibleMemOnly))
return "inaccessiblememonly"; return "inaccessiblememonly";
if (hasAttribute(Attribute::InaccessibleMemOrArgMemOnly)) if (hasAttribute(Attribute::InaccessibleMemOrArgMemOnly))
return "inaccessiblemem_or_argmemonly"; return "inaccessiblemem_or_argmemonly";
if (hasAttribute(Attribute::InAlloca)) if (hasAttribute(Attribute::InAlloca))
return "inalloca"; return "inalloca";
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uint64_t AttributeSetNode::getDereferenceableOrNullBytes() const { uint64_t AttributeSetNode::getDereferenceableOrNullBytes() const {
for (iterator I = begin(), E = end(); I != E; ++I) for (iterator I = begin(), E = end(); I != E; ++I)
if (I->hasAttribute(Attribute::DereferenceableOrNull)) if (I->hasAttribute(Attribute::DereferenceableOrNull))
return I->getDereferenceableOrNullBytes(); return I->getDereferenceableOrNullBytes();
return 0; return 0;
} }
Type *AttributeSetNode::getByValTy() const {
for (iterator I = begin(), E = end(); I != E; ++I)
if (I->hasAttribute(Attribute::ByVal))
return I->getByValTy();
return nullptr;
}
std::string AttributeSetNode::getAsString(bool InAttrGrp) const { std::string AttributeSetNode::getAsString(bool InAttrGrp) const {
std::string Str; std::string Str;
for (iterator I = begin(), E = end(); I != E; ++I) { for (iterator I = begin(), E = end(); I != E; ++I) {
if (I != begin()) if (I != begin())
Str += ' '; Str += ' ';
Str += I->getAsString(InAttrGrp); Str += I->getAsString(InAttrGrp);
} }
return Str; return Str;
▲ Show 20 Lines • Show All 134 Lines • ▼ Show 20 Lines for (Attribute::AttrKind Kind = Attribute::None;
case Attribute::Dereferenceable: case Attribute::Dereferenceable:
Attr = Attribute::getWithDereferenceableBytes( Attr = Attribute::getWithDereferenceableBytes(
C, B.getDereferenceableBytes()); C, B.getDereferenceableBytes());
break; break;
case Attribute::DereferenceableOrNull: case Attribute::DereferenceableOrNull:
Attr = Attribute::getWithDereferenceableOrNullBytes( Attr = Attribute::getWithDereferenceableOrNullBytes(
C, B.getDereferenceableOrNullBytes()); C, B.getDereferenceableOrNullBytes());
break; break;
case Attribute::ByVal:
Attr = Attribute::getWithByValTy(C, B.getByValTy());
break;
default: default:
Attr = Attribute::get(C, Kind); Attr = Attribute::get(C, Kind);
} }
Attrs.push_back(std::make_pair(Index, Attr)); Attrs.push_back(std::make_pair(Index, Attr));
} }
// Add target-dependent (string) attributes. // Add target-dependent (string) attributes.
for (const AttrBuilder::td_type &TDA : B.td_attrs()) for (const AttrBuilder::td_type &TDA : B.td_attrs())
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AttributeSet AttributeSet::addDereferenceableOrNullAttr(LLVMContext &C, AttributeSet AttributeSet::addDereferenceableOrNullAttr(LLVMContext &C,
unsigned Index, unsigned Index,
uint64_t Bytes) const { uint64_t Bytes) const {
llvm::AttrBuilder B; llvm::AttrBuilder B;
B.addDereferenceableOrNullAttr(Bytes); B.addDereferenceableOrNullAttr(Bytes);
return addAttributes(C, Index, AttributeSet::get(C, Index, B)); return addAttributes(C, Index, AttributeSet::get(C, Index, B));
} }
AttributeSet AttributeSet::addByValAttr(LLVMContext &C, unsigned Index,
Type *Ty) const {
llvm::AttrBuilder B;
B.addByValAttr(Ty);
return addAttributes(C, Index, AttributeSet::get(C, Index, B));
}
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// AttributeSet Accessor Methods // AttributeSet Accessor Methods
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
LLVMContext &AttributeSet::getContext() const { LLVMContext &AttributeSet::getContext() const {
return pImpl->getContext(); return pImpl->getContext();
} }
▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Linesuint64_t AttributeSet::getDereferenceableBytes(unsigned Index) const {
return ASN ? ASN->getDereferenceableBytes() : 0; return ASN ? ASN->getDereferenceableBytes() : 0;
} }
uint64_t AttributeSet::getDereferenceableOrNullBytes(unsigned Index) const { uint64_t AttributeSet::getDereferenceableOrNullBytes(unsigned Index) const {
AttributeSetNode *ASN = getAttributes(Index); AttributeSetNode *ASN = getAttributes(Index);
return ASN ? ASN->getDereferenceableOrNullBytes() : 0; return ASN ? ASN->getDereferenceableOrNullBytes() : 0;
} }
Type *AttributeSet::getByValTy(unsigned Index) const {
AttributeSetNode *ASN = getAttributes(Index);
return ASN ? ASN->getByValTy() : nullptr;
}
std::string AttributeSet::getAsString(unsigned Index, std::string AttributeSet::getAsString(unsigned Index,
bool InAttrGrp) const { bool InAttrGrp) const {
AttributeSetNode *ASN = getAttributes(Index); AttributeSetNode *ASN = getAttributes(Index);
return ASN ? ASN->getAsString(InAttrGrp) : std::string(""); return ASN ? ASN->getAsString(InAttrGrp) : std::string("");
} }
AttributeSetNode *AttributeSet::getAttributes(unsigned Index) const { AttributeSetNode *AttributeSet::getAttributes(unsigned Index) const {
if (!pImpl) return nullptr; if (!pImpl) return nullptr;
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} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// AttrBuilder Method Implementations // AttrBuilder Method Implementations
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
AttrBuilder::AttrBuilder(AttributeSet AS, unsigned Index) AttrBuilder::AttrBuilder(AttributeSet AS, unsigned Index)
: Attrs(0), Alignment(0), StackAlignment(0), DerefBytes(0), : Attrs(0), Alignment(0), StackAlignment(0), DerefBytes(0),
DerefOrNullBytes(0) { DerefOrNullBytes(0), ByValTy(nullptr) {
AttributeSetImpl *pImpl = AS.pImpl; AttributeSetImpl *pImpl = AS.pImpl;
if (!pImpl) return; if (!pImpl) return;
for (unsigned I = 0, E = pImpl->getNumAttributes(); I != E; ++I) { for (unsigned I = 0, E = pImpl->getNumAttributes(); I != E; ++I) {
if (pImpl->getSlotIndex(I) != Index) continue; if (pImpl->getSlotIndex(I) != Index) continue;
for (AttributeSetImpl::iterator II = pImpl->begin(I), for (AttributeSetImpl::iterator II = pImpl->begin(I),
IE = pImpl->end(I); II != IE; ++II) IE = pImpl->end(I); II != IE; ++II)
addAttribute(*II); addAttribute(*II);
break; break;
} }
} }
void AttrBuilder::clear() { void AttrBuilder::clear() {
Attrs.reset(); Attrs.reset();
TargetDepAttrs.clear(); TargetDepAttrs.clear();
Alignment = StackAlignment = DerefBytes = DerefOrNullBytes = 0; Alignment = StackAlignment = DerefBytes = DerefOrNullBytes = 0;
ByValTy = nullptr;
} }
AttrBuilder &AttrBuilder::addAttribute(Attribute::AttrKind Val) { AttrBuilder &AttrBuilder::addAttribute(Attribute::AttrKind Val) {
assert((unsigned)Val < Attribute::EndAttrKinds && "Attribute out of range!"); assert((unsigned)Val < Attribute::EndAttrKinds && "Attribute out of range!");
assert(Val != Attribute::Alignment && Val != Attribute::StackAlignment && assert(Val != Attribute::Alignment && Val != Attribute::StackAlignment &&
Val != Attribute::Dereferenceable && Val != Attribute::Dereferenceable &&
"Adding integer attribute without adding a value!"); "Adding integer attribute without adding a value!");
Attrs[Val] = true; Attrs[Val] = true;
Show All 12 LinesAttrBuilder &AttrBuilder::addAttribute(Attribute Attr) {
if (Kind == Attribute::Alignment) if (Kind == Attribute::Alignment)
Alignment = Attr.getAlignment(); Alignment = Attr.getAlignment();
else if (Kind == Attribute::StackAlignment) else if (Kind == Attribute::StackAlignment)
StackAlignment = Attr.getStackAlignment(); StackAlignment = Attr.getStackAlignment();
else if (Kind == Attribute::Dereferenceable) else if (Kind == Attribute::Dereferenceable)
DerefBytes = Attr.getDereferenceableBytes(); DerefBytes = Attr.getDereferenceableBytes();
else if (Kind == Attribute::DereferenceableOrNull) else if (Kind == Attribute::DereferenceableOrNull)
DerefOrNullBytes = Attr.getDereferenceableOrNullBytes(); DerefOrNullBytes = Attr.getDereferenceableOrNullBytes();
else if (Kind == Attribute::ByVal)
ByValTy = Attr.getByValTy();
return *this; return *this;
} }
AttrBuilder &AttrBuilder::addAttribute(StringRef A, StringRef V) { AttrBuilder &AttrBuilder::addAttribute(StringRef A, StringRef V) {
TargetDepAttrs[A] = V; TargetDepAttrs[A] = V;
return *this; return *this;
} }
AttrBuilder &AttrBuilder::removeAttribute(Attribute::AttrKind Val) { AttrBuilder &AttrBuilder::removeAttribute(Attribute::AttrKind Val) {
assert((unsigned)Val < Attribute::EndAttrKinds && "Attribute out of range!"); assert((unsigned)Val < Attribute::EndAttrKinds && "Attribute out of range!");
Attrs[Val] = false; Attrs[Val] = false;
if (Val == Attribute::Alignment) if (Val == Attribute::Alignment)
Alignment = 0; Alignment = 0;
else if (Val == Attribute::StackAlignment) else if (Val == Attribute::StackAlignment)
StackAlignment = 0; StackAlignment = 0;
else if (Val == Attribute::Dereferenceable) else if (Val == Attribute::Dereferenceable)
DerefBytes = 0; DerefBytes = 0;
else if (Val == Attribute::DereferenceableOrNull) else if (Val == Attribute::DereferenceableOrNull)
DerefOrNullBytes = 0; DerefOrNullBytes = 0;
else if (Val == Attribute::ByVal)
ByValTy = 0;
return *this; return *this;
} }
AttrBuilder &AttrBuilder::removeAttributes(AttributeSet A, uint64_t Index) { AttrBuilder &AttrBuilder::removeAttributes(AttributeSet A, uint64_t Index) {
unsigned Slot = ~0U; unsigned Slot = ~0U;
for (unsigned I = 0, E = A.getNumSlots(); I != E; ++I) for (unsigned I = 0, E = A.getNumSlots(); I != E; ++I)
if (A.getSlotIndex(I) == Index) { if (A.getSlotIndex(I) == Index) {
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 LinesAttrBuilder &AttrBuilder::addDereferenceableOrNullAttr(uint64_t Bytes) {
if (Bytes == 0) if (Bytes == 0)
return *this; return *this;
Attrs[Attribute::DereferenceableOrNull] = true; Attrs[Attribute::DereferenceableOrNull] = true;
DerefOrNullBytes = Bytes; DerefOrNullBytes = Bytes;
return *this; return *this;
} }
AttrBuilder &AttrBuilder::addByValAttr(Type *Ty) {
Attrs[Attribute::ByVal] = true;
ByValTy = Ty;
return *this;
}
AttrBuilder &AttrBuilder::merge(const AttrBuilder &B) { AttrBuilder &AttrBuilder::merge(const AttrBuilder &B) {
// FIXME: What if both have alignments, but they don't match?! // FIXME: What if both have alignments, but they don't match?!
if (!Alignment) if (!Alignment)
Alignment = B.Alignment; Alignment = B.Alignment;
if (!StackAlignment) if (!StackAlignment)
StackAlignment = B.StackAlignment; StackAlignment = B.StackAlignment;
if (!DerefBytes) if (!DerefBytes)
DerefBytes = B.DerefBytes; DerefBytes = B.DerefBytes;
if (!DerefOrNullBytes) if (!DerefOrNullBytes)
DerefOrNullBytes = B.DerefOrNullBytes; DerefOrNullBytes = B.DerefOrNullBytes;
if (!ByValTy)
ByValTy = B.ByValTy;
Attrs |= B.Attrs; Attrs |= B.Attrs;
for (auto I : B.td_attrs()) for (auto I : B.td_attrs())
TargetDepAttrs[I.first] = I.second; TargetDepAttrs[I.first] = I.second;
return *this; return *this;
} }
AttrBuilder &AttrBuilder::remove(const AttrBuilder &B) { AttrBuilder &AttrBuilder::remove(const AttrBuilder &B) {
// FIXME: What if both have alignments, but they don't match?! // FIXME: What if both have alignments, but they don't match?!
if (B.Alignment) if (B.Alignment)
Alignment = 0; Alignment = 0;
if (B.StackAlignment) if (B.StackAlignment)
StackAlignment = 0; StackAlignment = 0;
if (B.DerefBytes) if (B.DerefBytes)
DerefBytes = 0; DerefBytes = 0;
if (B.DerefOrNullBytes) if (B.DerefOrNullBytes)
DerefOrNullBytes = 0; DerefOrNullBytes = 0;
if (B.ByValTy)
ByValTy = nullptr;
Attrs &= ~B.Attrs; Attrs &= ~B.Attrs;
for (auto I : B.td_attrs()) for (auto I : B.td_attrs())
TargetDepAttrs.erase(I.first); TargetDepAttrs.erase(I.first);
return *this; return *this;
} }
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continue; continue;
if (uint64_t A = (Val & AttributeImpl::getAttrMask(I))) { if (uint64_t A = (Val & AttributeImpl::getAttrMask(I))) {
Attrs[I] = true; Attrs[I] = true;
if (I == Attribute::Alignment) if (I == Attribute::Alignment)
Alignment = 1ULL << ((A >> 16) - 1); Alignment = 1ULL << ((A >> 16) - 1);
else if (I == Attribute::StackAlignment) else if (I == Attribute::StackAlignment)
StackAlignment = 1ULL << ((A >> 26)-1); StackAlignment = 1ULL << ((A >> 26)-1);
else if (I == Attribute::ByVal)
ByValTy = (Type *) -1;
} }
} }
return *this; return *this;
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// AttributeFuncs Function Defintions // AttributeFuncs Function Defintions
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
/// \brief Which attributes cannot be applied to a type. /// \brief Which attributes cannot be applied to a type.
AttrBuilder AttributeFuncs::typeIncompatible(Type *Ty) { AttrBuilder AttributeFuncs::typeIncompatible(Type *Ty) {
AttrBuilder Incompatible; AttrBuilder Incompatible;
if (!Ty->isIntegerTy()) if (!Ty->isIntegerTy())
// Attribute that only apply to integers. // Attribute that only apply to integers.
Incompatible.addAttribute(Attribute::SExt) Incompatible.addAttribute(Attribute::SExt)
.addAttribute(Attribute::ZExt); .addAttribute(Attribute::ZExt);
if (!Ty->isPointerTy()) if (!Ty->isPointerTy())
// Attribute that only apply to pointers. // Attribute that only apply to pointers.
Incompatible.addAttribute(Attribute::ByVal) Incompatible.addByValAttr((Type *) -1) // the pointer here is ignored
.addAttribute(Attribute::Nest) .addAttribute(Attribute::Nest)
.addAttribute(Attribute::NoAlias) .addAttribute(Attribute::NoAlias)
.addAttribute(Attribute::NoCapture) .addAttribute(Attribute::NoCapture)
.addAttribute(Attribute::NonNull) .addAttribute(Attribute::NonNull)
.addDereferenceableAttr(1) // the int here is ignored .addDereferenceableAttr(1) // the int here is ignored
.addDereferenceableOrNullAttr(1) // the int here is ignored .addDereferenceableOrNullAttr(1) // the int here is ignored
.addAttribute(Attribute::ReadNone) .addAttribute(Attribute::ReadNone)
.addAttribute(Attribute::ReadOnly) .addAttribute(Attribute::ReadOnly)
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test/Analysis/BasicAA/2008-04-15-Byval.ll

; RUN: opt < %s -O3 -S | FileCheck %s ; RUN: opt < %s -O3 -S | FileCheck %s
; ModuleID = 'small2.c' ; ModuleID = 'small2.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8" target triple = "i386-apple-darwin8"
%struct.x = type { [4 x i32] } %struct.x = type { [4 x i32] }
define void @foo(%struct.x* byval align 4 %X) nounwind { define void @foo(%struct.x* align 4 byval(%struct.x) %X) nounwind {
; CHECK: store i32 2, i32* %tmp1 ; CHECK: store i32 2, i32* %tmp1
entry: entry:
%tmp = getelementptr %struct.x, %struct.x* %X, i32 0, i32 0 ; <[4 x i32]*> [#uses=1] %tmp = getelementptr %struct.x, %struct.x* %X, i32 0, i32 0 ; <[4 x i32]*> [#uses=1]
%tmp1 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 3 ; <i32*> [#uses=1] %tmp1 = getelementptr [4 x i32], [4 x i32]* %tmp, i32 0, i32 3 ; <i32*> [#uses=1]
store i32 2, i32* %tmp1, align 4 store i32 2, i32* %tmp1, align 4
%tmp2 = call i32 (...) @bar( %struct.x* byval align 4 %X ) nounwind ; <i32> [#uses=0] %tmp2 = call i32 (...) @bar( %struct.x* align 4 byval(%struct.x) %X ) nounwind ; <i32> [#uses=0]
br label %return br label %return
return: ; preds = %entry return: ; preds = %entry
ret void ret void
} }
declare i32 @bar(...) declare i32 @bar(...)

test/Analysis/BasicAA/byval.ll

; RUN: opt < %s -basicaa -gvn -S | FileCheck %s ; RUN: opt < %s -basicaa -gvn -S | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8" target triple = "i686-apple-darwin8"
%struct.x = type { i32, i32, i32, i32 } %struct.x = type { i32, i32, i32, i32 }
@g = weak global i32 0 ; <i32*> [#uses=1] @g = weak global i32 0 ; <i32*> [#uses=1]
define i32 @foo(%struct.x* byval %a) nounwind { define i32 @foo(%struct.x* byval(%struct.x) %a) nounwind {
; CHECK: ret i32 1 ; CHECK: ret i32 1
%tmp1 = tail call i32 (...) @bar( %struct.x* %a ) nounwind ; <i32> [#uses=0] %tmp1 = tail call i32 (...) @bar( %struct.x* %a ) nounwind ; <i32> [#uses=0]
%tmp2 = getelementptr %struct.x, %struct.x* %a, i32 0, i32 0 ; <i32*> [#uses=2] %tmp2 = getelementptr %struct.x, %struct.x* %a, i32 0, i32 0 ; <i32*> [#uses=2]
store i32 1, i32* %tmp2, align 4 store i32 1, i32* %tmp2, align 4
store i32 2, i32* @g, align 4 store i32 2, i32* @g, align 4
%tmp4 = load i32, i32* %tmp2, align 4 ; <i32> [#uses=1] %tmp4 = load i32, i32* %tmp2, align 4 ; <i32> [#uses=1]
ret i32 %tmp4 ret i32 %tmp4
} }
declare i32 @bar(...) declare i32 @bar(...)

test/Analysis/DivergenceAnalysis/AMDGPU/kernel-args.ll

; RUN: opt %s -mtriple amdgcn-- -analyze -divergence | FileCheck %s ; RUN: opt %s -mtriple amdgcn-- -analyze -divergence | FileCheck %s
; CHECK: DIVERGENT: ; CHECK: DIVERGENT:
; CHECK-NOT: %arg0 ; CHECK-NOT: %arg0
; CHECK-NOT: %arg1 ; CHECK-NOT: %arg1
; CHECK-NOT; %arg2 ; CHECK-NOT; %arg2
; CHECK: <2 x i32> %arg3 ; CHECK: <2 x i32> %arg3
; CHECK: DIVERGENT: <3 x i32> %arg4 ; CHECK: DIVERGENT: <3 x i32> %arg4
; CHECK: DIVERGENT: float %arg5 ; CHECK: DIVERGENT: float %arg5
; CHECK: DIVERGENT: i32 %arg6 ; CHECK: DIVERGENT: i32 %arg6
define void @main([4 x <16 x i8>] addrspace(2)* byval %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 { define void @main([4 x <16 x i8>] addrspace(2)* byval([4 x <16 x i8>]) %arg0, float inreg %arg1, i32 inreg %arg2, <2 x i32> %arg3, <3 x i32> %arg4, float %arg5, i32 %arg6) #0 {
ret void ret void
} }
attributes #0 = { "ShaderType"="0" } attributes #0 = { "ShaderType"="0" }

test/Assembler/2008-01-11-VarargAttrs.ll

; RUN: llvm-as < %s | llvm-dis | grep byval ; RUN: llvm-as < %s | llvm-dis | grep byval
; RUN: verify-uselistorder %s ; RUN: verify-uselistorder %s
%struct = type { } %struct = type { }
declare void @foo(...) declare void @foo(...)
define void @bar() { define void @bar() {
call void (...) @foo(%struct* byval null ) call void (...) @foo(%struct* byval(%struct) null )
ret void ret void
} }

test/Bitcode/attributes-3.3.ll

Show First 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
} }
define void @f7(i8* noalias) define void @f7(i8* noalias)
; CHECK: define void @f7(i8* noalias) ; CHECK: define void @f7(i8* noalias)
{ {
ret void; ret void;
} }
define void @f8(i8* byval) define void @f8(i8* byval(i8))
; CHECK: define void @f8(i8* byval) ; CHECK: define void @f8(i8* byval(i8))
{ {
ret void; ret void;
} }
define void @f9(i8* nest) define void @f9(i8* nest)
; CHECK: define void @f9(i8* nest) ; CHECK: define void @f9(i8* nest)
{ {
ret void; ret void;
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test/Bitcode/attributes.ll

Show All 38 Lines
} }
define void @f7(i8* noalias) define void @f7(i8* noalias)
; CHECK: define void @f7(i8* noalias) ; CHECK: define void @f7(i8* noalias)
{ {
ret void; ret void;
} }
define void @f8(i8* byval) define void @f8(i8* byval(i8))
; CHECK: define void @f8(i8* byval) ; CHECK: define void @f8(i8* byval(i8))
{ {
ret void; ret void;
} }
define void @f9(i8* nest) define void @f9(i8* nest)
; CHECK: define void @f9(i8* nest) ; CHECK: define void @f9(i8* nest)
{ {
ret void; ret void;
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test/Bitcode/compatibility-3.6.ll

Show First 20 Lines • Show All 397 Lines • ▼ Show 20 Lines
; Functions -- Parameter attributes ; Functions -- Parameter attributes
declare void @f.param.zeroext(i8 zeroext) declare void @f.param.zeroext(i8 zeroext)
; CHECK: declare void @f.param.zeroext(i8 zeroext) ; CHECK: declare void @f.param.zeroext(i8 zeroext)
declare void @f.param.signext(i8 signext) declare void @f.param.signext(i8 signext)
; CHECK: declare void @f.param.signext(i8 signext) ; CHECK: declare void @f.param.signext(i8 signext)
declare void @f.param.inreg(i8 inreg) declare void @f.param.inreg(i8 inreg)
; CHECK: declare void @f.param.inreg(i8 inreg) ; CHECK: declare void @f.param.inreg(i8 inreg)
declare void @f.param.byval({ i8, i8 }* byval) declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval) ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca) declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca) ; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret) declare void @f.param.sret(i8* sret)
; CHECK: declare void @f.param.sret(i8* sret) ; CHECK: declare void @f.param.sret(i8* sret)
declare void @f.param.noalias(i8* noalias) declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias) ; CHECK: declare void @f.param.noalias(i8* noalias)
declare void @f.param.nocapture(i8* nocapture) declare void @f.param.nocapture(i8* nocapture)
; CHECK: declare void @f.param.nocapture(i8* nocapture) ; CHECK: declare void @f.param.nocapture(i8* nocapture)
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test/Bitcode/compatibility-3.7.ll

Show First 20 Lines • Show All 403 Lines • ▼ Show 20 Lines
; Functions -- Parameter attributes ; Functions -- Parameter attributes
declare void @f.param.zeroext(i8 zeroext) declare void @f.param.zeroext(i8 zeroext)
; CHECK: declare void @f.param.zeroext(i8 zeroext) ; CHECK: declare void @f.param.zeroext(i8 zeroext)
declare void @f.param.signext(i8 signext) declare void @f.param.signext(i8 signext)
; CHECK: declare void @f.param.signext(i8 signext) ; CHECK: declare void @f.param.signext(i8 signext)
declare void @f.param.inreg(i8 inreg) declare void @f.param.inreg(i8 inreg)
; CHECK: declare void @f.param.inreg(i8 inreg) ; CHECK: declare void @f.param.inreg(i8 inreg)
declare void @f.param.byval({ i8, i8 }* byval) declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval) ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca) declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca) ; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret) declare void @f.param.sret(i8* sret)
; CHECK: declare void @f.param.sret(i8* sret) ; CHECK: declare void @f.param.sret(i8* sret)
declare void @f.param.noalias(i8* noalias) declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias) ; CHECK: declare void @f.param.noalias(i8* noalias)
declare void @f.param.nocapture(i8* nocapture) declare void @f.param.nocapture(i8* nocapture)
; CHECK: declare void @f.param.nocapture(i8* nocapture) ; CHECK: declare void @f.param.nocapture(i8* nocapture)
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test/Bitcode/compatibility.ll

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; Functions -- Parameter attributes ; Functions -- Parameter attributes
declare void @f.param.zeroext(i8 zeroext) declare void @f.param.zeroext(i8 zeroext)
; CHECK: declare void @f.param.zeroext(i8 zeroext) ; CHECK: declare void @f.param.zeroext(i8 zeroext)
declare void @f.param.signext(i8 signext) declare void @f.param.signext(i8 signext)
; CHECK: declare void @f.param.signext(i8 signext) ; CHECK: declare void @f.param.signext(i8 signext)
declare void @f.param.inreg(i8 inreg) declare void @f.param.inreg(i8 inreg)
; CHECK: declare void @f.param.inreg(i8 inreg) ; CHECK: declare void @f.param.inreg(i8 inreg)
declare void @f.param.byval({ i8, i8 }* byval) declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
; CHECK: declare void @f.param.byval({ i8, i8 }* byval) ; CHECK: declare void @f.param.byval({ i8, i8 }* byval({ i8, i8 }))
declare void @f.param.inalloca(i8* inalloca) declare void @f.param.inalloca(i8* inalloca)
; CHECK: declare void @f.param.inalloca(i8* inalloca) ; CHECK: declare void @f.param.inalloca(i8* inalloca)
declare void @f.param.sret(i8* sret) declare void @f.param.sret(i8* sret)
; CHECK: declare void @f.param.sret(i8* sret) ; CHECK: declare void @f.param.sret(i8* sret)
declare void @f.param.noalias(i8* noalias) declare void @f.param.noalias(i8* noalias)
; CHECK: declare void @f.param.noalias(i8* noalias) ; CHECK: declare void @f.param.noalias(i8* noalias)
declare void @f.param.nocapture(i8* nocapture) declare void @f.param.nocapture(i8* nocapture)
; CHECK: declare void @f.param.nocapture(i8* nocapture) ; CHECK: declare void @f.param.nocapture(i8* nocapture)
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test/Bitcode/highLevelStructure.3.2.ll

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; CHECK: declare void @ParamAttr2(i8* nest) ; CHECK: declare void @ParamAttr2(i8* nest)
declare void @ParamAttr2(i8* nest) declare void @ParamAttr2(i8* nest)
; CHECK: declare void @ParamAttr3(i8* sret) ; CHECK: declare void @ParamAttr3(i8* sret)
declare void @ParamAttr3(i8* sret) declare void @ParamAttr3(i8* sret)
; CHECK: declare void @ParamAttr4(i8 signext) ; CHECK: declare void @ParamAttr4(i8 signext)
declare void @ParamAttr4(i8 signext) declare void @ParamAttr4(i8 signext)
; CHECK: declare void @ParamAttr5(i8* inreg) ; CHECK: declare void @ParamAttr5(i8* inreg)
declare void @ParamAttr5(i8* inreg) declare void @ParamAttr5(i8* inreg)
; CHECK: declare void @ParamAttr6(i8* byval) ; CHECK: declare void @ParamAttr6(i8* byval(i8))
declare void @ParamAttr6(i8* byval) declare void @ParamAttr6(i8* byval(i8))
; CHECK: declare void @ParamAttr7(i8* noalias) ; CHECK: declare void @ParamAttr7(i8* noalias)
declare void @ParamAttr7(i8* noalias) declare void @ParamAttr7(i8* noalias)
; CHECK: declare void @ParamAttr8(i8* nocapture) ; CHECK: declare void @ParamAttr8(i8* nocapture)
declare void @ParamAttr8(i8* nocapture) declare void @ParamAttr8(i8* nocapture)
; CHECK: declare void @ParamAttr9{{[(i8* nest noalias nocapture) | (i8* noalias nocapture nest)]}} ; CHECK: declare void @ParamAttr9{{[(i8* nest noalias nocapture) | (i8* noalias nocapture nest)]}}
declare void @ParamAttr9(i8* nest noalias nocapture) declare void @ParamAttr9(i8* nest noalias nocapture)
; CHECK: declare void @ParamAttr10{{[(i8* sret noalias nocapture) | (i8* noalias nocapture sret)]}} ; CHECK: declare void @ParamAttr10{{[(i8* sret noalias nocapture) | (i8* noalias nocapture sret)]}}
declare void @ParamAttr10(i8* sret noalias nocapture) declare void @ParamAttr10(i8* sret noalias nocapture)
;CHECK: declare void @ParamAttr11{{[(i8* byval noalias nocapture) | (i8* noalias nocapture byval)]}} ;CHECK: declare void @ParamAttr11{{[(i8* noalias nocapture byval(i8)) | (i8* noalias nocapture byval(i8))]}}
declare void @ParamAttr11(i8* byval noalias nocapture) declare void @ParamAttr11(i8* noalias nocapture byval(i8))
;CHECK: declare void @ParamAttr12{{[(i8* inreg noalias nocapture) | (i8* noalias nocapture inreg)]}} ;CHECK: declare void @ParamAttr12{{[(i8* inreg noalias nocapture) | (i8* noalias nocapture inreg)]}}
declare void @ParamAttr12(i8* inreg noalias nocapture) declare void @ParamAttr12(i8* inreg noalias nocapture)
; NamedTypesTest ; NamedTypesTest
define void @NamedTypes() { define void @NamedTypes() {
entry: entry:
; CHECK: %res = alloca %mytype ; CHECK: %res = alloca %mytype
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test/CodeGen/AArch64/func-argpassing.ll

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; CHECK-NOFP-NOT: fadd ; CHECK-NOFP-NOT: fadd
store float %newval, float* @varfloat store float %newval, float* @varfloat
; CHECK: str [[ADDRES]], [{{x[0-9]+}}, {{#?}}:lo12:varfloat] ; CHECK: str [[ADDRES]], [{{x[0-9]+}}, {{#?}}:lo12:varfloat]
ret void ret void
} }
; byval pointers should be allocated to the stack and copied as if ; byval pointers should be allocated to the stack and copied as if
; with memcpy. ; with memcpy.
define void @take_struct(%myStruct* byval %structval) { define void @take_struct(%myStruct* byval(%myStruct) %structval) {
; CHECK-LABEL: take_struct: ; CHECK-LABEL: take_struct:
%addr0 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 2 %addr0 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 2
%addr1 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 0 %addr1 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 0
%val0 = load volatile i32, i32* %addr0 %val0 = load volatile i32, i32* %addr0
; Some weird move means x0 is used for one access ; Some weird move means x0 is used for one access
; CHECK: ldr [[REG32:w[0-9]+]], [{{x[0-9]+|sp}}, #12] ; CHECK: ldr [[REG32:w[0-9]+]], [{{x[0-9]+|sp}}, #12]
store volatile i32 %val0, i32* @var32 store volatile i32 %val0, i32* @var32
; CHECK: str [[REG32]], [{{x[0-9]+}}, {{#?}}:lo12:var32] ; CHECK: str [[REG32]], [{{x[0-9]+}}, {{#?}}:lo12:var32]
%val1 = load volatile i64, i64* %addr1 %val1 = load volatile i64, i64* %addr1
; CHECK: ldr [[REG64:x[0-9]+]], [{{x[0-9]+|sp}}] ; CHECK: ldr [[REG64:x[0-9]+]], [{{x[0-9]+|sp}}]
store volatile i64 %val1, i64* @var64 store volatile i64 %val1, i64* @var64
; CHECK: str [[REG64]], [{{x[0-9]+}}, {{#?}}:lo12:var64] ; CHECK: str [[REG64]], [{{x[0-9]+}}, {{#?}}:lo12:var64]
ret void ret void
} }
; %structval should be at sp + 16 ; %structval should be at sp + 16
define void @check_byval_align(i32* byval %ignore, %myStruct* byval align 16 %structval) { define void @check_byval_align(i32* byval(i32) %ignore, %myStruct* align 16 byval(%myStruct) %structval) {
; CHECK-LABEL: check_byval_align: ; CHECK-LABEL: check_byval_align:
%addr0 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 2 %addr0 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 2
%addr1 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 0 %addr1 = getelementptr %myStruct, %myStruct* %structval, i64 0, i32 0
%val0 = load volatile i32, i32* %addr0 %val0 = load volatile i32, i32* %addr0
; Some weird move means x0 is used for one access ; Some weird move means x0 is used for one access
; CHECK: ldr [[REG32:w[0-9]+]], [sp, #28] ; CHECK: ldr [[REG32:w[0-9]+]], [sp, #28]
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines; CHECK: str {{w[0-9]+}}, [x8, #12]
ret void ret void
} }
; This struct is just too far along to go into registers: (only x7 is ; This struct is just too far along to go into registers: (only x7 is
; available, but it needs two). Also make sure that %stacked doesn't ; available, but it needs two). Also make sure that %stacked doesn't
; sneak into x7 behind. ; sneak into x7 behind.
define i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var45, define i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var45,
i32* %var6, %myStruct* byval %struct, i32* byval %stacked, i32* %var6, %myStruct* byval(%myStruct) %struct, i32* byval(i32) %stacked,
double %notstacked) { double %notstacked) {
; CHECK-LABEL: struct_on_stack: ; CHECK-LABEL: struct_on_stack:
%addr = getelementptr %myStruct, %myStruct* %struct, i64 0, i32 0 %addr = getelementptr %myStruct, %myStruct* %struct, i64 0, i32 0
%val64 = load volatile i64, i64* %addr %val64 = load volatile i64, i64* %addr
store volatile i64 %val64, i64* @var64 store volatile i64 %val64, i64* @var64
; Currently nothing on local stack, so struct should be at sp ; Currently nothing on local stack, so struct should be at sp
; CHECK: ldr [[VAL64:x[0-9]+]], [sp] ; CHECK: ldr [[VAL64:x[0-9]+]], [sp]
; CHECK: str [[VAL64]], [{{x[0-9]+}}, {{#?}}:lo12:var64] ; CHECK: str [[VAL64]], [{{x[0-9]+}}, {{#?}}:lo12:var64]
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test/CodeGen/AArch64/func-calls.ll

Show First 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; CHECK: add x8, {{x[0-9]+}}, {{#?}}:lo12:varstruct ; CHECK: add x8, {{x[0-9]+}}, {{#?}}:lo12:varstruct
; CHECK: bl return_large_struct ; CHECK: bl return_large_struct
ret void ret void
} }
declare i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var45, declare i32 @struct_on_stack(i8 %var0, i16 %var1, i32 %var2, i64 %var3, i128 %var45,
i32* %var6, %myStruct* byval %struct, i32 %stacked, i32* %var6, %myStruct* byval(%myStruct) %struct, i32 %stacked,
double %notstacked) double %notstacked)
declare void @stacked_fpu(float %var0, double %var1, float %var2, float %var3, declare void @stacked_fpu(float %var0, double %var1, float %var2, float %var3,
float %var4, float %var5, float %var6, float %var7, float %var4, float %var5, float %var6, float %var7,
float %var8) float %var8)
define void @check_stack_args() { define void @check_stack_args() {
; CHECK-LABEL: check_stack_args: ; CHECK-LABEL: check_stack_args:
call i32 @struct_on_stack(i8 0, i16 12, i32 42, i64 99, i128 1, call i32 @struct_on_stack(i8 0, i16 12, i32 42, i64 99, i128 1,
i32* @var32, %myStruct* byval @varstruct, i32* @var32, %myStruct* byval(%myStruct) @varstruct,
i32 999, double 1.0) i32 999, double 1.0)
; Want to check that the final double is passed in registers and ; Want to check that the final double is passed in registers and
; that varstruct is passed on the stack. Rather dependent on how a ; that varstruct is passed on the stack. Rather dependent on how a
; memcpy gets created, but the following works for now. ; memcpy gets created, but the following works for now.
; CHECK-DAG: str {{q[0-9]+}}, [sp, #-16] ; CHECK-DAG: str {{q[0-9]+}}, [sp, #-16]
; CHECK-DAG: fmov d[[FINAL_DOUBLE:[0-9]+]], #1.0 ; CHECK-DAG: fmov d[[FINAL_DOUBLE:[0-9]+]], #1.0
; CHECK: mov v0.16b, v[[FINAL_DOUBLE]].16b ; CHECK: mov v0.16b, v[[FINAL_DOUBLE]].16b
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test/CodeGen/AMDGPU/llvm.AMDGPU.kill.ll

Show All 15 Linesmain_body:
ret void ret void
} }
; SI-LABEL: {{^}}kill_vcc_implicit_def: ; SI-LABEL: {{^}}kill_vcc_implicit_def:
; SI-NOT: v_cmp_gt_f32_e32 vcc, ; SI-NOT: v_cmp_gt_f32_e32 vcc,
; SI: v_cmp_gt_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], 0, v{{[0-9]+}} ; SI: v_cmp_gt_f32_e64 [[CMP:s\[[0-9]+:[0-9]+\]]], 0, v{{[0-9]+}}
; SI: v_cmpx_le_f32_e32 vcc, 0, v{{[0-9]+}} ; SI: v_cmpx_le_f32_e32 vcc, 0, v{{[0-9]+}}
; SI: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 1.0, [[CMP]] ; SI: v_cndmask_b32_e64 v{{[0-9]+}}, 0, 1.0, [[CMP]]
define void @kill_vcc_implicit_def([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <4 x i32>] addrspace(2)* byval, [34 x <8 x i32>] addrspace(2)* byval, float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, i32, float, float) #1 { define void @kill_vcc_implicit_def([6 x <16 x i8>] addrspace(2)* byval([6 x <16 x i8>]), [17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]), [17 x <4 x i32>] addrspace(2)* byval([17 x <4 x i32>]), [34 x <8 x i32>] addrspace(2)* byval([34 x <8 x i32>]), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, i32, float, float) #1 {
entry: entry:
%tmp0 = fcmp olt float %13, 0.0 %tmp0 = fcmp olt float %13, 0.0
call void @llvm.AMDGPU.kill(float %14) call void @llvm.AMDGPU.kill(float %14)
%tmp1 = select i1 %tmp0, float 1.0, float 0.0 %tmp1 = select i1 %tmp0, float 1.0, float 0.0
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 1, i32 1, float %tmp1, float %tmp1, float %tmp1, float %tmp1) call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 1, i32 1, float %tmp1, float %tmp1, float %tmp1, float %tmp1)
ret void ret void
} }
declare void @llvm.AMDGPU.kill(float) declare void @llvm.AMDGPU.kill(float)
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
attributes #0 = { "ShaderType"="2" } attributes #0 = { "ShaderType"="2" }
attributes #1 = { "ShaderType"="0" } attributes #1 = { "ShaderType"="0" }
!0 = !{!"const", null, i32 1} !0 = !{!"const", null, i32 1}

test/CodeGen/AMDGPU/llvm.SI.fs.interp.ll

Show All 18 Lines
} }
; Thest that v_interp_p1 uses different source and destination registers ; Thest that v_interp_p1 uses different source and destination registers
; on 16 bank LDS chips. ; on 16 bank LDS chips.
; 16BANK-LABEL: {{^}}v_interp_p1_bank16_bug: ; 16BANK-LABEL: {{^}}v_interp_p1_bank16_bug:
; 16BANK-NOT: v_interp_p1_f32 [[DST:v[0-9]+]], [[DST]] ; 16BANK-NOT: v_interp_p1_f32 [[DST:v[0-9]+]], [[DST]]
define void @v_interp_p1_bank16_bug([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <4 x i32>] addrspace(2)* byval, [34 x <8 x i32>] addrspace(2)* byval, float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, i32, float, float) #0 { define void @v_interp_p1_bank16_bug([6 x <16 x i8>] addrspace(2)* byval([6 x <16 x i8>]), [17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]), [17 x <4 x i32>] addrspace(2)* byval([17 x <4 x i32>]), [34 x <8 x i32>] addrspace(2)* byval([34 x <8 x i32>]), float inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, i32, float, float) #0 {
main_body: main_body:
%22 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %5, <2 x i32> %7) %22 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %5, <2 x i32> %7)
%23 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %5, <2 x i32> %7) %23 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %5, <2 x i32> %7)
%24 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %5, <2 x i32> %7) %24 = call float @llvm.SI.fs.interp(i32 2, i32 0, i32 %5, <2 x i32> %7)
%25 = call float @fabs(float %22) %25 = call float @fabs(float %22)
%26 = call float @fabs(float %23) %26 = call float @fabs(float %23)
%27 = call float @fabs(float %24) %27 = call float @fabs(float %24)
%28 = call i32 @llvm.SI.packf16(float %25, float %26) %28 = call i32 @llvm.SI.packf16(float %25, float %26)
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test/CodeGen/AMDGPU/llvm.SI.load.dword.ll

; RUN: llc -march=amdgcn -mcpu=verde -show-mc-encoding -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -march=amdgcn -mcpu=verde -show-mc-encoding -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -march=amdgcn -mcpu=tonga -show-mc-encoding -verify-machineinstrs < %s | FileCheck %s ; RUN: llc -march=amdgcn -mcpu=tonga -show-mc-encoding -verify-machineinstrs < %s | FileCheck %s
; Example of a simple geometry shader loading vertex attributes from the ; Example of a simple geometry shader loading vertex attributes from the
; ESGS ring buffer ; ESGS ring buffer
; FIXME: Out of bounds immediate offset crashes ; FIXME: Out of bounds immediate offset crashes
; CHECK-LABEL: {{^}}main: ; CHECK-LABEL: {{^}}main:
; CHECK: buffer_load_dword {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 glc slc ; CHECK: buffer_load_dword {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 glc slc
; CHECK: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 offen glc slc ; CHECK: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 offen glc slc
; CHECK: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen glc slc ; CHECK: buffer_load_dword {{v[0-9]+}}, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen glc slc
; CHECK: buffer_load_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen offen glc slc ; CHECK: buffer_load_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen offen glc slc
; CHECK: s_movk_i32 [[K:s[0-9]+]], 0x4d2 ; encoding ; CHECK: s_movk_i32 [[K:s[0-9]+]], 0x4d2 ; encoding
; CHECK: buffer_load_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, [[K]] idxen offen offset:65535 glc slc ; CHECK: buffer_load_dword {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, [[K]] idxen offen offset:65535 glc slc
define void @main([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <32 x i8>] addrspace(2)* byval %arg2, [2 x <16 x i8>] addrspace(2)* byval %arg3, [17 x <16 x i8>] addrspace(2)* inreg %arg4, [17 x <16 x i8>] addrspace(2)* inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9) #0 { define void @main([17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]) %arg, [32 x <16 x i8>] addrspace(2)* byval([32 x <16 x i8>]) %arg1, [16 x <32 x i8>] addrspace(2)* byval([16 x <32 x i8>]) %arg2, [2 x <16 x i8>] addrspace(2)* byval([2 x <16 x i8>]) %arg3, [17 x <16 x i8>] addrspace(2)* inreg %arg4, [17 x <16 x i8>] addrspace(2)* inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9) #0 {
main_body: main_body:
%tmp = getelementptr [2 x <16 x i8>], [2 x <16 x i8>] addrspace(2)* %arg3, i64 0, i32 1 %tmp = getelementptr [2 x <16 x i8>], [2 x <16 x i8>] addrspace(2)* %arg3, i64 0, i32 1
%tmp10 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0 %tmp10 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0
%tmp11 = shl i32 %arg6, 2 %tmp11 = shl i32 %arg6, 2
%tmp12 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0) %tmp12 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1, i32 0)
%tmp13 = bitcast i32 %tmp12 to float %tmp13 = bitcast i32 %tmp12 to float
%tmp14 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 %tmp11, i32 0, i32 0, i32 1, i32 0, i32 1, i32 1, i32 0) %tmp14 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp10, i32 %tmp11, i32 0, i32 0, i32 1, i32 0, i32 1, i32 1, i32 0)
%tmp15 = bitcast i32 %tmp14 to float %tmp15 = bitcast i32 %tmp14 to float
Show All 28 Lines

test/CodeGen/AMDGPU/mubuf.ll

Show First 20 Lines • Show All 49 Lines • ▼ Show 20 Linesentry:
%1 = getelementptr i32, i32 addrspace(1)* %0, i64 1 %1 = getelementptr i32, i32 addrspace(1)* %0, i64 1
%2 = load i32, i32 addrspace(1)* %1 %2 = load i32, i32 addrspace(1)* %1
store i32 %2, i32 addrspace(1)* %out store i32 %2, i32 addrspace(1)* %out
ret void ret void
} }
; CHECK-LABEL: {{^}}soffset_max_imm: ; CHECK-LABEL: {{^}}soffset_max_imm:
; CHECK: buffer_load_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 64 offen glc ; CHECK: buffer_load_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+}}:{{[0-9]+}}], 64 offen glc
define void @soffset_max_imm([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) #1 { define void @soffset_max_imm([6 x <16 x i8>] addrspace(2)* byval([6 x <16 x i8>]), [17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]), [16 x <4 x i32>] addrspace(2)* byval([16 x <4 x i32>]), [32 x <8 x i32>] addrspace(2)* byval([32 x <8 x i32>]), i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) #1 {
main_body: main_body:
%tmp0 = getelementptr [6 x <16 x i8>], [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0 %tmp0 = getelementptr [6 x <16 x i8>], [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0
%tmp1 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp0 %tmp1 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp0
%tmp2 = shl i32 %6, 2 %tmp2 = shl i32 %6, 2
%tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 64, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0) %tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 64, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0)
%tmp4 = add i32 %6, 16 %tmp4 = add i32 %6, 16
%tmp5 = bitcast float 0.0 to i32 %tmp5 = bitcast float 0.0 to i32
call void @llvm.SI.tbuffer.store.i32(<16 x i8> %tmp1, i32 %tmp5, i32 1, i32 %tmp4, i32 %4, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0) call void @llvm.SI.tbuffer.store.i32(<16 x i8> %tmp1, i32 %tmp5, i32 1, i32 %tmp4, i32 %4, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
ret void ret void
} }
; Make sure immediates that aren't inline constants don't get folded into ; Make sure immediates that aren't inline constants don't get folded into
; the soffset operand. ; the soffset operand.
; FIXME: for this test we should be smart enough to shift the immediate into ; FIXME: for this test we should be smart enough to shift the immediate into
; the offset field. ; the offset field.
; CHECK-LABEL: {{^}}soffset_no_fold: ; CHECK-LABEL: {{^}}soffset_no_fold:
; CHECK: s_movk_i32 [[SOFFSET:s[0-9]+]], 0x41 ; CHECK: s_movk_i32 [[SOFFSET:s[0-9]+]], 0x41
; CHECK: buffer_load_dword v{{[0-9+]}}, v{{[0-9+]}}, s[{{[0-9]+}}:{{[0-9]+}}], [[SOFFSET]] offen glc ; CHECK: buffer_load_dword v{{[0-9+]}}, v{{[0-9+]}}, s[{{[0-9]+}}:{{[0-9]+}}], [[SOFFSET]] offen glc
define void @soffset_no_fold([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [16 x <4 x i32>] addrspace(2)* byval, [32 x <8 x i32>] addrspace(2)* byval, i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) #1 { define void @soffset_no_fold([6 x <16 x i8>] addrspace(2)* byval([6 x <16 x i8>]), [17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]), [16 x <4 x i32>] addrspace(2)* byval([16 x <4 x i32>]), [32 x <8 x i32>] addrspace(2)* byval([32 x <8 x i32>]), i32 inreg, i32 inreg, i32, i32, i32, i32, i32, i32, i32, i32) #1 {
main_body: main_body:
%tmp0 = getelementptr [6 x <16 x i8>], [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0 %tmp0 = getelementptr [6 x <16 x i8>], [6 x <16 x i8>] addrspace(2)* %0, i32 0, i32 0
%tmp1 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp0 %tmp1 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp0
%tmp2 = shl i32 %6, 2 %tmp2 = shl i32 %6, 2
%tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 65, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0) %tmp3 = call i32 @llvm.SI.buffer.load.dword.i32.i32(<16 x i8> %tmp1, i32 %tmp2, i32 65, i32 0, i32 1, i32 0, i32 1, i32 0, i32 0)
%tmp4 = add i32 %6, 16 %tmp4 = add i32 %6, 16
%tmp5 = bitcast float 0.0 to i32 %tmp5 = bitcast float 0.0 to i32
call void @llvm.SI.tbuffer.store.i32(<16 x i8> %tmp1, i32 %tmp5, i32 1, i32 %tmp4, i32 %4, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0) call void @llvm.SI.tbuffer.store.i32(<16 x i8> %tmp1, i32 %tmp5, i32 1, i32 %tmp4, i32 %4, i32 0, i32 4, i32 4, i32 1, i32 0, i32 1, i32 1, i32 0)
▲ Show 20 Lines • Show All 98 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/ret.ll

; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
attributes #0 = { "ShaderType"="1" } attributes #0 = { "ShaderType"="1" }
declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
; GCN-LABEL: {{^}}vgpr: ; GCN-LABEL: {{^}}vgpr:
; GCN: v_mov_b32_e32 v1, v0 ; GCN: v_mov_b32_e32 v1, v0
; GCN-DAG: v_add_f32_e32 v0, 1.0, v1 ; GCN-DAG: v_add_f32_e32 v0, 1.0, v1
; GCN-DAG: exp 15, 0, 1, 1, 1, v1, v1, v1, v1 ; GCN-DAG: exp 15, 0, 1, 1, 1, v1, v1, v1, v1
; GCN: s_waitcnt expcnt(0) ; GCN: s_waitcnt expcnt(0)
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
define {float, float} @vgpr([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, float) #0 { define {float, float} @vgpr([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, float) #0 {
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3) call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3)
%x = fadd float %3, 1.0 %x = fadd float %3, 1.0
%a = insertvalue {float, float} undef, float %x, 0 %a = insertvalue {float, float} undef, float %x, 0
%b = insertvalue {float, float} %a, float %3, 1 %b = insertvalue {float, float} %a, float %3, 1
ret {float, float} %b ret {float, float} %b
} }
; GCN-LABEL: {{^}}vgpr_literal: ; GCN-LABEL: {{^}}vgpr_literal:
; GCN: v_mov_b32_e32 v4, v0 ; GCN: v_mov_b32_e32 v4, v0
; GCN-DAG: v_mov_b32_e32 v0, 1.0 ; GCN-DAG: v_mov_b32_e32 v0, 1.0
; GCN-DAG: v_mov_b32_e32 v1, 2.0 ; GCN-DAG: v_mov_b32_e32 v1, 2.0
; GCN-DAG: v_mov_b32_e32 v2, 4.0 ; GCN-DAG: v_mov_b32_e32 v2, 4.0
; GCN-DAG: v_mov_b32_e32 v3, -1.0 ; GCN-DAG: v_mov_b32_e32 v3, -1.0
; GCN: exp 15, 0, 1, 1, 1, v4, v4, v4, v4 ; GCN: exp 15, 0, 1, 1, 1, v4, v4, v4, v4
; GCN: s_waitcnt expcnt(0) ; GCN: s_waitcnt expcnt(0)
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
define {float, float, float, float} @vgpr_literal([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, float) #0 { define {float, float, float, float} @vgpr_literal([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, float) #0 {
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3) call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3)
ret {float, float, float, float} {float 1.0, float 2.0, float 4.0, float -1.0} ret {float, float, float, float} {float 1.0, float 2.0, float 4.0, float -1.0}
} }
; GCN: .long 165580 ; GCN: .long 165580
; GCN-NEXT: .long 562 ; GCN-NEXT: .long 562
; GCN-NEXT: .long 165584 ; GCN-NEXT: .long 165584
; GCN-NEXT: .long 562 ; GCN-NEXT: .long 562
; GCN-LABEL: {{^}}vgpr_ps_addr0: ; GCN-LABEL: {{^}}vgpr_ps_addr0:
; GCN-NOT: v_mov_b32_e32 v0 ; GCN-NOT: v_mov_b32_e32 v0
; GCN-NOT: v_mov_b32_e32 v1 ; GCN-NOT: v_mov_b32_e32 v1
; GCN-NOT: v_mov_b32_e32 v2 ; GCN-NOT: v_mov_b32_e32 v2
; GCN: v_mov_b32_e32 v3, v4 ; GCN: v_mov_b32_e32 v3, v4
; GCN: v_mov_b32_e32 v4, v6 ; GCN: v_mov_b32_e32 v4, v6
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
attributes #1 = { "ShaderType"="0" "InitialPSInputAddr"="0" } attributes #1 = { "ShaderType"="0" "InitialPSInputAddr"="0" }
define {float, float, float, float, float} @vgpr_ps_addr0([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #1 { define {float, float, float, float, float} @vgpr_ps_addr0([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #1 {
%i0 = extractelement <2 x i32> %4, i32 0 %i0 = extractelement <2 x i32> %4, i32 0
%i1 = extractelement <2 x i32> %4, i32 1 %i1 = extractelement <2 x i32> %4, i32 1
%i2 = extractelement <2 x i32> %7, i32 0 %i2 = extractelement <2 x i32> %7, i32 0
%i3 = extractelement <2 x i32> %8, i32 0 %i3 = extractelement <2 x i32> %8, i32 0
%f0 = bitcast i32 %i0 to float %f0 = bitcast i32 %i0 to float
%f1 = bitcast i32 %i1 to float %f1 = bitcast i32 %i1 to float
%f2 = bitcast i32 %i2 to float %f2 = bitcast i32 %i2 to float
%f3 = bitcast i32 %i3 to float %f3 = bitcast i32 %i3 to float
%r0 = insertvalue {float, float, float, float, float} undef, float %f0, 0 %r0 = insertvalue {float, float, float, float, float} undef, float %f0, 0
%r1 = insertvalue {float, float, float, float, float} %r0, float %f1, 1 %r1 = insertvalue {float, float, float, float, float} %r0, float %f1, 1
%r2 = insertvalue {float, float, float, float, float} %r1, float %f2, 2 %r2 = insertvalue {float, float, float, float, float} %r1, float %f2, 2
%r3 = insertvalue {float, float, float, float, float} %r2, float %f3, 3 %r3 = insertvalue {float, float, float, float, float} %r2, float %f3, 3
%r4 = insertvalue {float, float, float, float, float} %r3, float %12, 4 %r4 = insertvalue {float, float, float, float, float} %r3, float %12, 4
ret {float, float, float, float, float} %r4 ret {float, float, float, float, float} %r4
} }
; GCN: .long 165580 ; GCN: .long 165580
; GCN-NEXT: .long 1 ; GCN-NEXT: .long 1
; GCN-NEXT: .long 165584 ; GCN-NEXT: .long 165584
; GCN-NEXT: .long 1 ; GCN-NEXT: .long 1
; GCN-LABEL: {{^}}ps_input_ena_no_inputs: ; GCN-LABEL: {{^}}ps_input_ena_no_inputs:
; GCN: v_mov_b32_e32 v0, 1.0 ; GCN: v_mov_b32_e32 v0, 1.0
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
define float @ps_input_ena_no_inputs([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #1 { define float @ps_input_ena_no_inputs([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #1 {
ret float 1.0 ret float 1.0
} }
; GCN: .long 165580 ; GCN: .long 165580
; GCN-NEXT: .long 2081 ; GCN-NEXT: .long 2081
; GCN-NEXT: .long 165584 ; GCN-NEXT: .long 165584
; GCN-NEXT: .long 2081 ; GCN-NEXT: .long 2081
; GCN-LABEL: {{^}}ps_input_ena_pos_w: ; GCN-LABEL: {{^}}ps_input_ena_pos_w:
; GCN-DAG: v_mov_b32_e32 v0, v4 ; GCN-DAG: v_mov_b32_e32 v0, v4
; GCN-DAG: v_mov_b32_e32 v1, v2 ; GCN-DAG: v_mov_b32_e32 v1, v2
; GCN: v_mov_b32_e32 v2, v3 ; GCN: v_mov_b32_e32 v2, v3
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
define {float, <2 x float>} @ps_input_ena_pos_w([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #1 { define {float, <2 x float>} @ps_input_ena_pos_w([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #1 {
%f = bitcast <2 x i32> %8 to <2 x float> %f = bitcast <2 x i32> %8 to <2 x float>
%s = insertvalue {float, <2 x float>} undef, float %14, 0 %s = insertvalue {float, <2 x float>} undef, float %14, 0
%s1 = insertvalue {float, <2 x float>} %s, <2 x float> %f, 1 %s1 = insertvalue {float, <2 x float>} %s, <2 x float> %f, 1
ret {float, <2 x float>} %s1 ret {float, <2 x float>} %s1
} }
; GCN: .long 165580 ; GCN: .long 165580
; GCN-NEXT: .long 562 ; GCN-NEXT: .long 562
; GCN-NEXT: .long 165584 ; GCN-NEXT: .long 165584
; GCN-NEXT: .long 563 ; GCN-NEXT: .long 563
; GCN-LABEL: {{^}}vgpr_ps_addr1: ; GCN-LABEL: {{^}}vgpr_ps_addr1:
; GCN-DAG: v_mov_b32_e32 v0, v2 ; GCN-DAG: v_mov_b32_e32 v0, v2
; GCN-DAG: v_mov_b32_e32 v1, v3 ; GCN-DAG: v_mov_b32_e32 v1, v3
; GCN: v_mov_b32_e32 v2, v4 ; GCN: v_mov_b32_e32 v2, v4
; GCN-DAG: v_mov_b32_e32 v3, v6 ; GCN-DAG: v_mov_b32_e32 v3, v6
; GCN-DAG: v_mov_b32_e32 v4, v8 ; GCN-DAG: v_mov_b32_e32 v4, v8
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
attributes #2 = { "ShaderType"="0" "InitialPSInputAddr"="1" } attributes #2 = { "ShaderType"="0" "InitialPSInputAddr"="1" }
define {float, float, float, float, float} @vgpr_ps_addr1([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #2 { define {float, float, float, float, float} @vgpr_ps_addr1([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #2 {
%i0 = extractelement <2 x i32> %4, i32 0 %i0 = extractelement <2 x i32> %4, i32 0
%i1 = extractelement <2 x i32> %4, i32 1 %i1 = extractelement <2 x i32> %4, i32 1
%i2 = extractelement <2 x i32> %7, i32 0 %i2 = extractelement <2 x i32> %7, i32 0
%i3 = extractelement <2 x i32> %8, i32 0 %i3 = extractelement <2 x i32> %8, i32 0
%f0 = bitcast i32 %i0 to float %f0 = bitcast i32 %i0 to float
%f1 = bitcast i32 %i1 to float %f1 = bitcast i32 %i1 to float
%f2 = bitcast i32 %i2 to float %f2 = bitcast i32 %i2 to float
%f3 = bitcast i32 %i3 to float %f3 = bitcast i32 %i3 to float
Show All 13 Lines
; GCN-LABEL: {{^}}vgpr_ps_addr119: ; GCN-LABEL: {{^}}vgpr_ps_addr119:
; GCN-DAG: v_mov_b32_e32 v0, v2 ; GCN-DAG: v_mov_b32_e32 v0, v2
; GCN-DAG: v_mov_b32_e32 v1, v3 ; GCN-DAG: v_mov_b32_e32 v1, v3
; GCN: v_mov_b32_e32 v2, v6 ; GCN: v_mov_b32_e32 v2, v6
; GCN: v_mov_b32_e32 v3, v8 ; GCN: v_mov_b32_e32 v3, v8
; GCN: v_mov_b32_e32 v4, v12 ; GCN: v_mov_b32_e32 v4, v12
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
attributes #3 = { "ShaderType"="0" "InitialPSInputAddr"="119" } attributes #3 = { "ShaderType"="0" "InitialPSInputAddr"="119" }
define {float, float, float, float, float} @vgpr_ps_addr119([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #3 { define {float, float, float, float, float} @vgpr_ps_addr119([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #3 {
%i0 = extractelement <2 x i32> %4, i32 0 %i0 = extractelement <2 x i32> %4, i32 0
%i1 = extractelement <2 x i32> %4, i32 1 %i1 = extractelement <2 x i32> %4, i32 1
%i2 = extractelement <2 x i32> %7, i32 0 %i2 = extractelement <2 x i32> %7, i32 0
%i3 = extractelement <2 x i32> %8, i32 0 %i3 = extractelement <2 x i32> %8, i32 0
%f0 = bitcast i32 %i0 to float %f0 = bitcast i32 %i0 to float
%f1 = bitcast i32 %i1 to float %f1 = bitcast i32 %i1 to float
%f2 = bitcast i32 %i2 to float %f2 = bitcast i32 %i2 to float
%f3 = bitcast i32 %i3 to float %f3 = bitcast i32 %i3 to float
Show All 13 Lines
; GCN-LABEL: {{^}}vgpr_ps_addr418: ; GCN-LABEL: {{^}}vgpr_ps_addr418:
; GCN-NOT: v_mov_b32_e32 v0 ; GCN-NOT: v_mov_b32_e32 v0
; GCN-NOT: v_mov_b32_e32 v1 ; GCN-NOT: v_mov_b32_e32 v1
; GCN-NOT: v_mov_b32_e32 v2 ; GCN-NOT: v_mov_b32_e32 v2
; GCN: v_mov_b32_e32 v3, v4 ; GCN: v_mov_b32_e32 v3, v4
; GCN: v_mov_b32_e32 v4, v8 ; GCN: v_mov_b32_e32 v4, v8
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
attributes #4 = { "ShaderType"="0" "InitialPSInputAddr"="418" } attributes #4 = { "ShaderType"="0" "InitialPSInputAddr"="418" }
define {float, float, float, float, float} @vgpr_ps_addr418([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #4 { define {float, float, float, float, float} @vgpr_ps_addr418([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #4 {
%i0 = extractelement <2 x i32> %4, i32 0 %i0 = extractelement <2 x i32> %4, i32 0
%i1 = extractelement <2 x i32> %4, i32 1 %i1 = extractelement <2 x i32> %4, i32 1
%i2 = extractelement <2 x i32> %7, i32 0 %i2 = extractelement <2 x i32> %7, i32 0
%i3 = extractelement <2 x i32> %8, i32 0 %i3 = extractelement <2 x i32> %8, i32 0
%f0 = bitcast i32 %i0 to float %f0 = bitcast i32 %i0 to float
%f1 = bitcast i32 %i1 to float %f1 = bitcast i32 %i1 to float
%f2 = bitcast i32 %i2 to float %f2 = bitcast i32 %i2 to float
%f3 = bitcast i32 %i3 to float %f3 = bitcast i32 %i3 to float
%r0 = insertvalue {float, float, float, float, float} undef, float %f0, 0 %r0 = insertvalue {float, float, float, float, float} undef, float %f0, 0
%r1 = insertvalue {float, float, float, float, float} %r0, float %f1, 1 %r1 = insertvalue {float, float, float, float, float} %r0, float %f1, 1
%r2 = insertvalue {float, float, float, float, float} %r1, float %f2, 2 %r2 = insertvalue {float, float, float, float, float} %r1, float %f2, 2
%r3 = insertvalue {float, float, float, float, float} %r2, float %f3, 3 %r3 = insertvalue {float, float, float, float, float} %r2, float %f3, 3
%r4 = insertvalue {float, float, float, float, float} %r3, float %12, 4 %r4 = insertvalue {float, float, float, float, float} %r3, float %12, 4
ret {float, float, float, float, float} %r4 ret {float, float, float, float, float} %r4
} }
; GCN-LABEL: {{^}}sgpr: ; GCN-LABEL: {{^}}sgpr:
; GCN: s_add_i32 s0, s3, 2 ; GCN: s_add_i32 s0, s3, 2
; GCN: s_mov_b32 s2, s3 ; GCN: s_mov_b32 s2, s3
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
define {i32, i32, i32} @sgpr([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, float) #0 { define {i32, i32, i32} @sgpr([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, float) #0 {
%x = add i32 %2, 2 %x = add i32 %2, 2
%a = insertvalue {i32, i32, i32} undef, i32 %x, 0 %a = insertvalue {i32, i32, i32} undef, i32 %x, 0
%b = insertvalue {i32, i32, i32} %a, i32 %1, 1 %b = insertvalue {i32, i32, i32} %a, i32 %1, 1
%c = insertvalue {i32, i32, i32} %a, i32 %2, 2 %c = insertvalue {i32, i32, i32} %a, i32 %2, 2
ret {i32, i32, i32} %c ret {i32, i32, i32} %c
} }
; GCN-LABEL: {{^}}sgpr_literal: ; GCN-LABEL: {{^}}sgpr_literal:
; GCN: s_mov_b32 s0, 5 ; GCN: s_mov_b32 s0, 5
; GCN-NOT: s_mov_b32 s0, s0 ; GCN-NOT: s_mov_b32 s0, s0
; GCN-DAG: s_mov_b32 s1, 6 ; GCN-DAG: s_mov_b32 s1, 6
; GCN-DAG: s_mov_b32 s2, 7 ; GCN-DAG: s_mov_b32 s2, 7
; GCN-DAG: s_mov_b32 s3, 8 ; GCN-DAG: s_mov_b32 s3, 8
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
define {i32, i32, i32, i32} @sgpr_literal([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, float) #0 { define {i32, i32, i32, i32} @sgpr_literal([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, float) #0 {
%x = add i32 %2, 2 %x = add i32 %2, 2
ret {i32, i32, i32, i32} {i32 5, i32 6, i32 7, i32 8} ret {i32, i32, i32, i32} {i32 5, i32 6, i32 7, i32 8}
} }
; GCN-LABEL: {{^}}both: ; GCN-LABEL: {{^}}both:
; GCN: v_mov_b32_e32 v1, v0 ; GCN: v_mov_b32_e32 v1, v0
; GCN-DAG: exp 15, 0, 1, 1, 1, v1, v1, v1, v1 ; GCN-DAG: exp 15, 0, 1, 1, 1, v1, v1, v1, v1
; GCN-DAG: v_add_f32_e32 v0, 1.0, v1 ; GCN-DAG: v_add_f32_e32 v0, 1.0, v1
; GCN-DAG: s_add_i32 s0, s3, 2 ; GCN-DAG: s_add_i32 s0, s3, 2
; GCN-DAG: s_mov_b32 s1, s2 ; GCN-DAG: s_mov_b32 s1, s2
; GCN: s_mov_b32 s2, s3 ; GCN: s_mov_b32 s2, s3
; GCN: s_waitcnt expcnt(0) ; GCN: s_waitcnt expcnt(0)
; GCN-NOT: s_endpgm ; GCN-NOT: s_endpgm
define {float, i32, float, i32, i32} @both([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, float) #0 { define {float, i32, float, i32, i32} @both([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, float) #0 {
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3) call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3)
%v = fadd float %3, 1.0 %v = fadd float %3, 1.0
%s = add i32 %2, 2 %s = add i32 %2, 2
%a0 = insertvalue {float, i32, float, i32, i32} undef, float %v, 0 %a0 = insertvalue {float, i32, float, i32, i32} undef, float %v, 0
%a1 = insertvalue {float, i32, float, i32, i32} %a0, i32 %s, 1 %a1 = insertvalue {float, i32, float, i32, i32} %a0, i32 %s, 1
%a2 = insertvalue {float, i32, float, i32, i32} %a1, float %3, 2 %a2 = insertvalue {float, i32, float, i32, i32} %a1, float %3, 2
%a3 = insertvalue {float, i32, float, i32, i32} %a2, i32 %1, 3 %a3 = insertvalue {float, i32, float, i32, i32} %a2, i32 %1, 3
%a4 = insertvalue {float, i32, float, i32, i32} %a3, i32 %2, 4 %a4 = insertvalue {float, i32, float, i32, i32} %a3, i32 %2, 4
ret {float, i32, float, i32, i32} %a4 ret {float, i32, float, i32, i32} %a4
} }
; GCN-LABEL: {{^}}structure_literal: ; GCN-LABEL: {{^}}structure_literal:
; GCN: v_mov_b32_e32 v3, v0 ; GCN: v_mov_b32_e32 v3, v0
; GCN-DAG: v_mov_b32_e32 v0, 1.0 ; GCN-DAG: v_mov_b32_e32 v0, 1.0
; GCN-DAG: s_mov_b32 s0, 2 ; GCN-DAG: s_mov_b32 s0, 2
; GCN-DAG: s_mov_b32 s1, 3 ; GCN-DAG: s_mov_b32 s1, 3
; GCN-DAG: v_mov_b32_e32 v1, 2.0 ; GCN-DAG: v_mov_b32_e32 v1, 2.0
; GCN-DAG: v_mov_b32_e32 v2, 4.0 ; GCN-DAG: v_mov_b32_e32 v2, 4.0
; GCN-DAG: exp 15, 0, 1, 1, 1, v3, v3, v3, v3 ; GCN-DAG: exp 15, 0, 1, 1, 1, v3, v3, v3, v3
define {{float, i32}, {i32, <2 x float>}} @structure_literal([9 x <16 x i8>] addrspace(2)* byval, i32 inreg, i32 inreg, float) #0 { define {{float, i32}, {i32, <2 x float>}} @structure_literal([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]), i32 inreg, i32 inreg, float) #0 {
call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3) call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %3, float %3, float %3, float %3)
ret {{float, i32}, {i32, <2 x float>}} {{float, i32} {float 1.0, i32 2}, {i32, <2 x float>} {i32 3, <2 x float> <float 2.0, float 4.0>}} ret {{float, i32}, {i32, <2 x float>}} {{float, i32} {float 1.0, i32 2}, {i32, <2 x float>} {i32 3, <2 x float> <float 2.0, float 4.0>}}
} }

test/CodeGen/AMDGPU/sgpr-copy.ll

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; registers were being identified as an SGPR regclass which was causing ; registers were being identified as an SGPR regclass which was causing
; an assertion failure. ; an assertion failure.
; CHECK-LABEL: {{^}}sample_v3: ; CHECK-LABEL: {{^}}sample_v3:
; CHECK: image_sample ; CHECK: image_sample
; CHECK: image_sample ; CHECK: image_sample
; CHECK: exp ; CHECK: exp
; CHECK: s_endpgm ; CHECK: s_endpgm
define void @sample_v3([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <32 x i8>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 { define void @sample_v3([17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]) %arg, [32 x <16 x i8>] addrspace(2)* byval([32 x <16 x i8>]) %arg1, [16 x <32 x i8>] addrspace(2)* byval([16 x <32 x i8>]) %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 {
entry: entry:
%tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg, i64 0, i32 0 %tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg, i64 0, i32 0
%tmp21 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0 %tmp21 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0
%tmp22 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 16) %tmp22 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 16)
%tmp23 = getelementptr [16 x <32 x i8>], [16 x <32 x i8>] addrspace(2)* %arg2, i64 0, i32 0 %tmp23 = getelementptr [16 x <32 x i8>], [16 x <32 x i8>] addrspace(2)* %arg2, i64 0, i32 0
%tmp24 = load <32 x i8>, <32 x i8> addrspace(2)* %tmp23, !tbaa !0 %tmp24 = load <32 x i8>, <32 x i8> addrspace(2)* %tmp23, !tbaa !0
%tmp25 = getelementptr [32 x <16 x i8>], [32 x <16 x i8>] addrspace(2)* %arg1, i64 0, i32 0 %tmp25 = getelementptr [32 x <16 x i8>], [32 x <16 x i8>] addrspace(2)* %arg1, i64 0, i32 0
%tmp26 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp25, !tbaa !0 %tmp26 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp25, !tbaa !0
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Linesendif: ; preds = %if1, %if0, %entry
%tmp6 = bitcast i32 %tmp5 to float %tmp6 = bitcast i32 %tmp5 to float
store float %tmp6, float addrspace(1)* %out store float %tmp6, float addrspace(1)* %out
ret void ret void
} }
; This test is just checking that we don't crash / assertion fail. ; This test is just checking that we don't crash / assertion fail.
; CHECK-LABEL: {{^}}copy2: ; CHECK-LABEL: {{^}}copy2:
; CHECK: s_endpgm ; CHECK: s_endpgm
define void @copy2([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <32 x i8>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 { define void @copy2([17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]) %arg, [32 x <16 x i8>] addrspace(2)* byval([32 x <16 x i8>]) %arg1, [16 x <32 x i8>] addrspace(2)* byval([16 x <32 x i8>]) %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 {
entry: entry:
br label %LOOP68 br label %LOOP68
LOOP68: ; preds = %ENDIF69, %entry LOOP68: ; preds = %ENDIF69, %entry
%temp4.7 = phi float [ 0.000000e+00, %entry ], [ %v, %ENDIF69 ] %temp4.7 = phi float [ 0.000000e+00, %entry ], [ %v, %ENDIF69 ]
%t = phi i32 [ 20, %entry ], [ %x, %ENDIF69 ] %t = phi i32 [ 20, %entry ], [ %x, %ENDIF69 ]
%g = icmp eq i32 0, %t %g = icmp eq i32 0, %t
%l = bitcast float %temp4.7 to i32 %l = bitcast float %temp4.7 to i32
Show All 13 Lines
} }
; This test checks that image_sample resource descriptors aren't loaded into ; This test checks that image_sample resource descriptors aren't loaded into
; vgprs. The verifier will fail if this happens. ; vgprs. The verifier will fail if this happens.
; CHECK-LABEL:{{^}}sample_rsrc: ; CHECK-LABEL:{{^}}sample_rsrc:
; CHECK: image_sample ; CHECK: image_sample
; CHECK: image_sample ; CHECK: image_sample
; CHECK: s_endpgm ; CHECK: s_endpgm
define void @sample_rsrc([6 x <16 x i8>] addrspace(2)* byval %arg, [17 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <4 x i32>] addrspace(2)* byval %arg2, [32 x <8 x i32>] addrspace(2)* byval %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, float %arg20, float %arg21) #0 { define void @sample_rsrc([6 x <16 x i8>] addrspace(2)* byval([6 x <16 x i8>]) %arg, [17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]) %arg1, [16 x <4 x i32>] addrspace(2)* byval([16 x <4 x i32>]) %arg2, [32 x <8 x i32>] addrspace(2)* byval([32 x <8 x i32>]) %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, float %arg20, float %arg21) #0 {
bb: bb:
%tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg1, i32 0, i32 0 %tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg1, i32 0, i32 0
%tmp22 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !2 %tmp22 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !2
%tmp23 = call float @llvm.SI.load.const(<16 x i8> %tmp22, i32 16) %tmp23 = call float @llvm.SI.load.const(<16 x i8> %tmp22, i32 16)
%tmp25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %arg3, i32 0, i32 0 %tmp25 = getelementptr [32 x <8 x i32>], [32 x <8 x i32>] addrspace(2)* %arg3, i32 0, i32 0
%tmp26 = load <8 x i32>, <8 x i32> addrspace(2)* %tmp25, !tbaa !2 %tmp26 = load <8 x i32>, <8 x i32> addrspace(2)* %tmp25, !tbaa !2
%tmp27 = getelementptr [16 x <4 x i32>], [16 x <4 x i32>] addrspace(2)* %arg2, i32 0, i32 0 %tmp27 = getelementptr [16 x <4 x i32>], [16 x <4 x i32>] addrspace(2)* %arg2, i32 0, i32 0
%tmp28 = load <4 x i32>, <4 x i32> addrspace(2)* %tmp27, !tbaa !2 %tmp28 = load <4 x i32>, <4 x i32> addrspace(2)* %tmp27, !tbaa !2
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test/CodeGen/AMDGPU/si-scheduler.ll

; RUN: llc -march=amdgcn -mcpu=SI --misched=si < %s | FileCheck %s ; RUN: llc -march=amdgcn -mcpu=SI --misched=si < %s | FileCheck %s
; The test checks the "si" machine scheduler pass works correctly. ; The test checks the "si" machine scheduler pass works correctly.
; CHECK-LABEL: {{^}}main: ; CHECK-LABEL: {{^}}main:
; CHECK: s_wqm ; CHECK: s_wqm
; CHECK: s_load_dwordx4 ; CHECK: s_load_dwordx4
; CHECK: s_load_dwordx8 ; CHECK: s_load_dwordx8
; CHECK: s_waitcnt lgkmcnt(0) ; CHECK: s_waitcnt lgkmcnt(0)
; CHECK: image_sample ; CHECK: image_sample
; CHECK: s_waitcnt vmcnt(0) ; CHECK: s_waitcnt vmcnt(0)
; CHECK: exp ; CHECK: exp
; CHECK: s_endpgm ; CHECK: s_endpgm
define void @main([6 x <16 x i8>] addrspace(2)* byval %arg, [17 x <16 x i8>] addrspace(2)* byval %arg1, [17 x <4 x i32>] addrspace(2)* byval %arg2, [34 x <8 x i32>] addrspace(2)* byval %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, float %arg20, float %arg21) #0 { define void @main([6 x <16 x i8>] addrspace(2)* byval([6 x <16 x i8>]) %arg, [17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]) %arg1, [17 x <4 x i32>] addrspace(2)* byval([17 x <4 x i32>]) %arg2, [34 x <8 x i32>] addrspace(2)* byval([34 x <8 x i32>]) %arg3, float inreg %arg4, i32 inreg %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <2 x i32> %arg8, <3 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, <2 x i32> %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, i32 %arg19, float %arg20, float %arg21) #0 {
main_body: main_body:
%tmp = bitcast [34 x <8 x i32>] addrspace(2)* %arg3 to <32 x i8> addrspace(2)* %tmp = bitcast [34 x <8 x i32>] addrspace(2)* %arg3 to <32 x i8> addrspace(2)*
%tmp22 = load <32 x i8>, <32 x i8> addrspace(2)* %tmp, align 32, !tbaa !0 %tmp22 = load <32 x i8>, <32 x i8> addrspace(2)* %tmp, align 32, !tbaa !0
%tmp23 = bitcast [17 x <4 x i32>] addrspace(2)* %arg2 to <16 x i8> addrspace(2)* %tmp23 = bitcast [17 x <4 x i32>] addrspace(2)* %arg2 to <16 x i8> addrspace(2)*
%tmp24 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp23, align 16, !tbaa !0 %tmp24 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp23, align 16, !tbaa !0
%tmp25 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %arg5, <2 x i32> %arg11) %tmp25 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %arg5, <2 x i32> %arg11)
%tmp26 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %arg5, <2 x i32> %arg11) %tmp26 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %arg5, <2 x i32> %arg11)
%tmp27 = bitcast float %tmp25 to i32 %tmp27 = bitcast float %tmp25 to i32
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test/CodeGen/AMDGPU/si-sgpr-spill.ll

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; CHECK-NOT: s_mov_b32 ; CHECK-NOT: s_mov_b32
; CHECK: s_mov_b32 m0 ; CHECK: s_mov_b32 m0
; Writing to M0 from an SMRD instruction will hang the GPU. ; Writing to M0 from an SMRD instruction will hang the GPU.
; CHECK-NOT: s_buffer_load_dword m0 ; CHECK-NOT: s_buffer_load_dword m0
; CHECK: s_endpgm ; CHECK: s_endpgm
define void @main([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <32 x i8>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 { define void @main([17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]) %arg, [32 x <16 x i8>] addrspace(2)* byval([32 x <16 x i8>]) %arg1, [16 x <32 x i8>] addrspace(2)* byval([16 x <32 x i8>]) %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 {
main_body: main_body:
%tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg, i64 0, i32 0 %tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg, i64 0, i32 0
%tmp21 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0 %tmp21 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0
%tmp22 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 96) %tmp22 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 96)
%tmp23 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 100) %tmp23 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 100)
%tmp24 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 104) %tmp24 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 104)
%tmp25 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 112) %tmp25 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 112)
%tmp26 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 116) %tmp26 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 116)
▲ Show 20 Lines • Show All 621 Lines • ▼ Show 20 LinesENDIF66: ; preds = %LOOP65
%tmp608 = fadd float %tmp607, %temp30.1 %tmp608 = fadd float %tmp607, %temp30.1
%tmp609 = fadd float %temp24.1, 1.000000e+00 %tmp609 = fadd float %temp24.1, 1.000000e+00
%tmp610 = fmul float %temp32.0, 5.000000e-01 %tmp610 = fmul float %temp32.0, 5.000000e-01
br label %LOOP65 br label %LOOP65
} }
; CHECK-LABEL: {{^}}main1: ; CHECK-LABEL: {{^}}main1:
; CHECK: s_endpgm ; CHECK: s_endpgm
define void @main1([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <32 x i8>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 { define void @main1([17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]) %arg, [32 x <16 x i8>] addrspace(2)* byval([32 x <16 x i8>]) %arg1, [16 x <32 x i8>] addrspace(2)* byval([16 x <32 x i8>]) %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 {
main_body: main_body:
%tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg, i64 0, i32 0 %tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg, i64 0, i32 0
%tmp21 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0 %tmp21 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0
%tmp22 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 0) %tmp22 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 0)
%tmp23 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 4) %tmp23 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 4)
%tmp24 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 8) %tmp24 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 8)
%tmp25 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 12) %tmp25 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 12)
%tmp26 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 28) %tmp26 = call float @llvm.SI.load.const(<16 x i8> %tmp21, i32 28)
▲ Show 20 Lines • Show All 929 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot.ll

Show All 17 Lines
; VI-NEXT: s_mov_b32 s15, 0x800000 ; VI-NEXT: s_mov_b32 s15, 0x800000
; s12 is offset user SGPR ; s12 is offset user SGPR
; GCN: buffer_store_dword {{v[0-9]+}}, s[12:15], s11 offset:{{[0-9]+}} ; 4-byte Folded Spill ; GCN: buffer_store_dword {{v[0-9]+}}, s[12:15], s11 offset:{{[0-9]+}} ; 4-byte Folded Spill
; GCN: NumVgprs: 256 ; GCN: NumVgprs: 256
; GCN: ScratchSize: 1024 ; GCN: ScratchSize: 1024
define void @main([9 x <16 x i8>] addrspace(2)* byval %arg, [17 x <16 x i8>] addrspace(2)* byval %arg1, [17 x <4 x i32>] addrspace(2)* byval %arg2, [34 x <8 x i32>] addrspace(2)* byval %arg3, [16 x <16 x i8>] addrspace(2)* byval %arg4, i32 inreg %arg5, i32 inreg %arg6, i32 %arg7, i32 %arg8, i32 %arg9, i32 %arg10) #0 { define void @main([9 x <16 x i8>] addrspace(2)* byval([9 x <16 x i8>]) %arg, [17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]) %arg1, [17 x <4 x i32>] addrspace(2)* byval([17 x <4 x i32>]) %arg2, [34 x <8 x i32>] addrspace(2)* byval([34 x <8 x i32>]) %arg3, [16 x <16 x i8>] addrspace(2)* byval([16 x <16 x i8>]) %arg4, i32 inreg %arg5, i32 inreg %arg6, i32 %arg7, i32 %arg8, i32 %arg9, i32 %arg10) #0 {
bb: bb:
%tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg1, i64 0, i64 0 %tmp = getelementptr [17 x <16 x i8>], [17 x <16 x i8>] addrspace(2)* %arg1, i64 0, i64 0
%tmp11 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, align 16, !tbaa !0 %tmp11 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, align 16, !tbaa !0
%tmp12 = call float @llvm.SI.load.const(<16 x i8> %tmp11, i32 0) %tmp12 = call float @llvm.SI.load.const(<16 x i8> %tmp11, i32 0)
%tmp13 = call float @llvm.SI.load.const(<16 x i8> %tmp11, i32 16) %tmp13 = call float @llvm.SI.load.const(<16 x i8> %tmp11, i32 16)
%tmp14 = call float @llvm.SI.load.const(<16 x i8> %tmp11, i32 32) %tmp14 = call float @llvm.SI.load.const(<16 x i8> %tmp11, i32 32)
%tmp15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %arg4, i64 0, i64 0 %tmp15 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %arg4, i64 0, i64 0
%tmp16 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp15, align 16, !tbaa !0 %tmp16 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp15, align 16, !tbaa !0
▲ Show 20 Lines • Show All 460 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/wait.ll

Show All 39 Lines
; ILPMAX: buffer_load ; ILPMAX: buffer_load
; ILPMAX: s_load_dwordx4 ; ILPMAX: s_load_dwordx4
; ILPMAX: s_waitcnt lgkmcnt(0) ; ILPMAX: s_waitcnt lgkmcnt(0)
; ILPMAX: buffer_load ; ILPMAX: buffer_load
; ILPMAX: s_waitcnt vmcnt(1) ; ILPMAX: s_waitcnt vmcnt(1)
; ILPMAX: s_waitcnt vmcnt(0) ; ILPMAX: s_waitcnt vmcnt(0)
; ILPMAX: s_endpgm ; ILPMAX: s_endpgm
define void @main2([6 x <16 x i8>] addrspace(2)* byval, [17 x <16 x i8>] addrspace(2)* byval, [17 x <4 x i32>] addrspace(2)* byval, [34 x <8 x i32>] addrspace(2)* byval, [16 x <16 x i8>] addrspace(2)* define void @main2([6 x <16 x i8>] addrspace(2)* byval([6 x <16 x i8>]), [17 x <16 x i8>] addrspace(2)* byval([17 x <16 x i8>]), [17 x <4 x i32>] addrspace(2)* byval([17 x <4 x i32>]), [34 x <8 x i32>] addrspace(2)* byval([34 x <8 x i32>]), [16 x <16 x i8>] addrspace(2)*
byval, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 { byval, i32 inreg, i32 inreg, i32, i32, i32, i32) #0 {
main_body: main_body:
%11 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %4, i64 0, i64 0 %11 = getelementptr [16 x <16 x i8>], [16 x <16 x i8>] addrspace(2)* %4, i64 0, i64 0
%12 = load <16 x i8>, <16 x i8> addrspace(2)* %11, align 16, !tbaa !0 %12 = load <16 x i8>, <16 x i8> addrspace(2)* %11, align 16, !tbaa !0
%13 = add i32 %5, %7 %13 = add i32 %5, %7
%14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13) %14 = call <4 x float> @llvm.SI.vs.load.input(<16 x i8> %12, i32 0, i32 %13)
%15 = extractelement <4 x float> %14, i32 0 %15 = extractelement <4 x float> %14, i32 0
%16 = extractelement <4 x float> %14, i32 1 %16 = extractelement <4 x float> %14, i32 1
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test/CodeGen/ARM/2009-05-05-DAGCombineBug.ll

; RUN: llc < %s -mtriple=arm-unknown-linux-gnueabi -mattr=+v6 ; RUN: llc < %s -mtriple=arm-unknown-linux-gnueabi -mattr=+v6
; PR4166 ; PR4166
%"byte[]" = type { i32, i8* } %"byte[]" = type { i32, i8* }
%tango.time.Time.Time = type { i64 } %tango.time.Time.Time = type { i64 }
define fastcc void @t() { define fastcc void @t() {
entry: entry:
%tmp28 = call fastcc i1 null(i32* null, %"byte[]" undef, %"byte[]" undef, %tango.time.Time.Time* byval null) ; <i1> [#uses=0] %tmp28 = call fastcc i1 null(i32* null, %"byte[]" undef, %"byte[]" undef, %tango.time.Time.Time* byval(%tango.time.Time.Time) null) ; <i1> [#uses=0]
ret void ret void
} }

test/CodeGen/ARM/2011-06-09-TailCallByVal.ll

Show All 27 Lines
@"\01_fnmatch.initial" = external constant %union.__mbstate_t, align 4 @"\01_fnmatch.initial" = external constant %union.__mbstate_t, align 4
; CHECK: _fnmatch ; CHECK: _fnmatch
; CHECK: blx _fnmatch1 ; CHECK: blx _fnmatch1
define i32 @"\01_fnmatch"(i8* %pattern, i8* %string, i32 %flags) nounwind optsize { define i32 @"\01_fnmatch"(i8* %pattern, i8* %string, i32 %flags) nounwind optsize {
entry: entry:
%call4 = tail call i32 @fnmatch1(i8* %pattern, i8* %string, i8* %string, i32 %flags, %union.__mbstate_t* byval @"\01_fnmatch.initial", %union.__mbstate_t* byval @"\01_fnmatch.initial", %struct._xlocale* undef, i32 64) optsize %call4 = tail call i32 @fnmatch1(i8* %pattern, i8* %string, i8* %string, i32 %flags, %union.__mbstate_t* byval(%union.__mbstate_t) @"\01_fnmatch.initial", %union.__mbstate_t* byval(%union.__mbstate_t) @"\01_fnmatch.initial", %struct._xlocale* undef, i32 64) optsize
ret i32 %call4 ret i32 %call4
} }
declare i32 @fnmatch1(i8*, i8*, i8*, i32, %union.__mbstate_t* byval, %union.__mbstate_t* byval, %struct._xlocale*, i32) nounwind optsize declare i32 @fnmatch1(i8*, i8*, i8*, i32, %union.__mbstate_t* byval(%union.__mbstate_t), %union.__mbstate_t* byval(%union.__mbstate_t), %struct._xlocale*, i32) nounwind optsize

test/CodeGen/ARM/2011-06-16-TailCallByVal.ll

Show All 10 Lines
%struct.B = type <{ i32, i16, i16 }> %struct.B = type <{ i32, i16, i16 }>
%struct.C = type { i16, i32, i16, i16 } %struct.C = type { i16, i32, i16, i16 }
; CHECK: f ; CHECK: f
; CHECK: push {r1, r2, r3} ; CHECK: push {r1, r2, r3}
; CHECK: add sp, #12 ; CHECK: add sp, #12
; CHECK: b.w _puts ; CHECK: b.w _puts
define void @f(i8* %s, %struct.A* nocapture byval %a) nounwind optsize { define void @f(i8* %s, %struct.A* nocapture byval(%struct.A) %a) nounwind optsize {
entry: entry:
%puts = tail call i32 @puts(i8* %s) %puts = tail call i32 @puts(i8* %s)
ret void ret void
} }
declare i32 @puts(i8* nocapture) nounwind declare i32 @puts(i8* nocapture) nounwind

test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll

Show All 27 Lines
; CHECK-LABEL: main: ; CHECK-LABEL: main:
; CHECK: movw [[BASE:r[0-9]+]], :lower16:static_val ; CHECK: movw [[BASE:r[0-9]+]], :lower16:static_val
; CHECK: movt [[BASE]], :upper16:static_val ; CHECK: movt [[BASE]], :upper16:static_val
; ldm is not formed when the coalescer failed to coalesce everything. ; ldm is not formed when the coalescer failed to coalesce everything.
; CHECK: ldrd r2, [[TMP:r[0-9]+]], {{\[}}[[BASE]]{{\]}} ; CHECK: ldrd r2, [[TMP:r[0-9]+]], {{\[}}[[BASE]]{{\]}}
; CHECK: movw r0, #555 ; CHECK: movw r0, #555
define i32 @main() { define i32 @main() {
entry: entry:
call void (i32, ...) @test_byval_8_bytes_alignment(i32 555, %struct_t* byval @static_val) call void (i32, ...) @test_byval_8_bytes_alignment(i32 555, %struct_t* byval(%struct_t) @static_val)
ret i32 0 ret i32 0
} }
declare void @f(double); declare void @f(double);
; CHECK-LABEL: test_byval_8_bytes_alignment_fixed_arg: ; CHECK-LABEL: test_byval_8_bytes_alignment_fixed_arg:
; CHECK-NOT: str r1 ; CHECK-NOT: str r1
; CHECK: str r3, [sp, #12] ; CHECK: str r3, [sp, #12]
; CHECK: str r2, [sp, #8] ; CHECK: str r2, [sp, #8]
; CHECK-NOT: str r1 ; CHECK-NOT: str r1
define void @test_byval_8_bytes_alignment_fixed_arg(i32 %n1, %struct_t* byval %val) nounwind { define void @test_byval_8_bytes_alignment_fixed_arg(i32 %n1, %struct_t* byval(%struct_t) %val) nounwind {
entry: entry:
%a = getelementptr inbounds %struct_t, %struct_t* %val, i32 0, i32 0 %a = getelementptr inbounds %struct_t, %struct_t* %val, i32 0, i32 0
%0 = load double, double* %a %0 = load double, double* %a
call void (double) @f(double %0) call void (double) @f(double %0)
ret void ret void
} }
; CHECK-LABEL: main_fixed_arg: ; CHECK-LABEL: main_fixed_arg:
; CHECK: movw [[BASE:r[0-9]+]], :lower16:static_val ; CHECK: movw [[BASE:r[0-9]+]], :lower16:static_val
; CHECK: movt [[BASE]], :upper16:static_val ; CHECK: movt [[BASE]], :upper16:static_val
; ldm is not formed when the coalescer failed to coalesce everything. ; ldm is not formed when the coalescer failed to coalesce everything.
; CHECK: ldrd r2, [[TMP:r[0-9]+]], {{\[}}[[BASE]]{{\]}} ; CHECK: ldrd r2, [[TMP:r[0-9]+]], {{\[}}[[BASE]]{{\]}}
; CHECK: movw r0, #555 ; CHECK: movw r0, #555
define i32 @main_fixed_arg() { define i32 @main_fixed_arg() {
entry: entry:
call void (i32, %struct_t*) @test_byval_8_bytes_alignment_fixed_arg(i32 555, %struct_t* byval @static_val) call void (i32, %struct_t*) @test_byval_8_bytes_alignment_fixed_arg(i32 555, %struct_t* byval(%struct_t) @static_val)
ret i32 0 ret i32 0
} }

test/CodeGen/ARM/2012-10-04-FixedFrame-vs-byval.ll

; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi | FileCheck %s ; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi | FileCheck %s
@.str = private unnamed_addr constant [12 x i8] c"val.a = %f\0A\00" @.str = private unnamed_addr constant [12 x i8] c"val.a = %f\0A\00"
%struct_t = type { double, double, double } %struct_t = type { double, double, double }
@static_val = constant %struct_t { double 1.0, double 2.0, double 3.0 } @static_val = constant %struct_t { double 1.0, double 2.0, double 3.0 }
declare i32 @printf(i8*, ...) declare i32 @printf(i8*, ...)
; CHECK-LABEL: test_byval_usage_scheduling: ; CHECK-LABEL: test_byval_usage_scheduling:
; CHECK: str r3, [sp, #12] ; CHECK: str r3, [sp, #12]
; CHECK: str r2, [sp, #8] ; CHECK: str r2, [sp, #8]
; CHECK: vldr d16, [sp, #8] ; CHECK: vldr d16, [sp, #8]
define void @test_byval_usage_scheduling(i32 %n1, i32 %n2, %struct_t* byval %val) nounwind { define void @test_byval_usage_scheduling(i32 %n1, i32 %n2, %struct_t* byval(%struct_t) %val) nounwind {
entry: entry:
%a = getelementptr inbounds %struct_t, %struct_t* %val, i32 0, i32 0 %a = getelementptr inbounds %struct_t, %struct_t* %val, i32 0, i32 0
%0 = load double, double* %a %0 = load double, double* %a
%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i32 0, i32 0), double %0) %call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i32 0, i32 0), double %0)
ret void ret void
} }

test/CodeGen/ARM/2012-10-04-LDRB_POST_IMM-Crash.ll

; RUN: llc < %s -mtriple=armv7-none-linux- | FileCheck %s ; RUN: llc < %s -mtriple=armv7-none-linux- | FileCheck %s
; Check that LDRB_POST_IMM instruction emitted properly. ; Check that LDRB_POST_IMM instruction emitted properly.
%my_struct_t = type { i8, i8, i8, i8, i8 } %my_struct_t = type { i8, i8, i8, i8, i8 }
@main.val = private unnamed_addr constant %my_struct_t { i8 1, i8 2, i8 3, i8 4, i8 5 } @main.val = private unnamed_addr constant %my_struct_t { i8 1, i8 2, i8 3, i8 4, i8 5 }
declare void @f(i32 %n1, i32 %n2, i32 %n3, %my_struct_t* byval %val); declare void @f(i32 %n1, i32 %n2, i32 %n3, %my_struct_t* byval(%my_struct_t) %val);
; CHECK-LABEL: main: ; CHECK-LABEL: main:
define i32 @main() nounwind { define i32 @main() nounwind {
entry: entry:
; CHECK: ldrb {{(r[0-9]+)}}, {{(\[r[0-9]+\])}}, #1 ; CHECK: ldrb {{(r[0-9]+)}}, {{(\[r[0-9]+\])}}, #1
call void @f(i32 555, i32 555, i32 555, %my_struct_t* byval @main.val) call void @f(i32 555, i32 555, i32 555, %my_struct_t* byval(%my_struct_t) @main.val)
ret i32 0 ret i32 0
} }

test/CodeGen/ARM/2012-10-18-PR14099-ByvalFrameAddress.ll

; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s ; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s
%struct.s = type { [4 x i32] } %struct.s = type { [4 x i32] }
@v = constant %struct.s zeroinitializer; @v = constant %struct.s zeroinitializer;
declare void @f(%struct.s* %p); declare void @f(%struct.s* %p);
; CHECK-LABEL: t: ; CHECK-LABEL: t:
define void @t(i32 %a, %struct.s* byval %s) nounwind { define void @t(i32 %a, %struct.s* byval(%struct.s) %s) nounwind {
entry: entry:
; Here we need to only check proper start address of restored %s argument. ; Here we need to only check proper start address of restored %s argument.
; CHECK: sub sp, sp, #12 ; CHECK: sub sp, sp, #12
; CHECK: push {r11, lr} ; CHECK: push {r11, lr}
; CHECK: sub sp, sp, #4 ; CHECK: sub sp, sp, #4
; CHECK: add r0, sp, #12 ; CHECK: add r0, sp, #12
; CHECK: stm r0, {r1, r2, r3} ; CHECK: stm r0, {r1, r2, r3}
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test/CodeGen/ARM/2013-04-05-Small-ByVal-Structs-PR15293.ll

Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
;CHECK: mov pc, lr ;CHECK: mov pc, lr
%artz = type { i32 } %artz = type { i32 }
@static_val = constant %artz { i32 777 } @static_val = constant %artz { i32 777 }
declare void @fooUseParam(%artz* ) declare void @fooUseParam(%artz* )
define void @foo(%artz* byval %s) { define void @foo(%artz* byval(%artz) %s) {
call void @fooUseParam(%artz* %s) call void @fooUseParam(%artz* %s)
ret void ret void
} }
define void @foo2(%artz* byval %s, i32 %p, %artz* byval %s2) { define void @foo2(%artz* byval(%artz) %s, i32 %p, %artz* byval(%artz) %s2) {
call void @fooUseParam(%artz* %s) call void @fooUseParam(%artz* %s)
call void @fooUseParam(%artz* %s2) call void @fooUseParam(%artz* %s2)
ret void ret void
} }
define void @doFoo() { define void @doFoo() {
call void @foo(%artz* byval @static_val) call void @foo(%artz* byval(%artz) @static_val)
ret void ret void
} }
define void @doFoo2() { define void @doFoo2() {
call void @foo2(%artz* byval @static_val, i32 0, %artz* byval @static_val) call void @foo2(%artz* byval(%artz) @static_val, i32 0, %artz* byval(%artz) @static_val)
ret void ret void
} }

test/CodeGen/ARM/2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll

Show All 36 Lines call void @foo(double 23.0,
double 23.1, double 23.1,
double 23.2, double 23.2,
double 23.3, double 23.3,
double 23.4, double 23.4,
double 23.5, double 23.5,
double 23.6, double 23.6,
double 23.7, double 23.7,
double 23.8, double 23.8,
i32 0, %st_t* byval @static_val, i32 1, i32 2) i32 0, %st_t* byval(%st_t) @static_val, i32 1, i32 2)
ret void ret void
} }

test/CodeGen/ARM/2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll

Show All 33 Lines call void @foo(double 23.0,
double 23.1, double 23.1,
double 23.2, double 23.2,
double 23.3, double 23.3,
double 23.4, double 23.4,
double 23.5, double 23.5,
double 23.6, double 23.6,
double 23.7, double 23.7,
double 23.8, double 23.8,
i32 0, %st_t* byval @static_val, i32 1) i32 0, %st_t* byval(%st_t) @static_val, i32 1)
ret void ret void
} }

test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding2.ll

;PR15293: ARM codegen ice - expected larger existing stack allocation ;PR15293: ARM codegen ice - expected larger existing stack allocation
;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s ;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
%struct4bytes = type { i32 } %struct4bytes = type { i32 }
%struct20bytes = type { i32, i32, i32, i32, i32 } %struct20bytes = type { i32, i32, i32, i32, i32 }
define void @foo(%struct4bytes* byval %p0, ; --> R0 define void @foo(%struct4bytes* byval(%struct4bytes) %p0, ; --> R0
%struct20bytes* byval %p1 ; --> R1,R2,R3, [SP+0 .. SP+8) %struct20bytes* byval %p1 ; --> R1,R2,R3, [SP+0 .. SP+8)
) { ) {
;CHECK: sub sp, sp, #16 ;CHECK: sub sp, sp, #16
;CHECK: push {r11, lr} ;CHECK: push {r11, lr}
;CHECK: add r12, sp, #8 ;CHECK: add r12, sp, #8
;CHECK: stm r12, {r0, r1, r2, r3} ;CHECK: stm r12, {r0, r1, r2, r3}
;CHECK: add r0, sp, #12 ;CHECK: add r0, sp, #12
;CHECK: bl useInt ;CHECK: bl useInt
Show All 10 Lines

test/CodeGen/ARM/2013-06-03-ByVal-2Kbytes.ll

; RUN: llc < %s -mcpu=cortex-a15 | FileCheck %s ; RUN: llc < %s -mcpu=cortex-a15 | FileCheck %s
; ModuleID = 'attri_16.c' ; ModuleID = 'attri_16.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
target triple = "armv4t--linux-gnueabihf" target triple = "armv4t--linux-gnueabihf"
%big_struct0 = type { [517 x i32] } %big_struct0 = type { [517 x i32] }
%big_struct1 = type { [516 x i32] } %big_struct1 = type { [516 x i32] }
;CHECK-LABEL: f: ;CHECK-LABEL: f:
define void @f(%big_struct0* %p0, %big_struct1* %p1) { define void @f(%big_struct0* %p0, %big_struct1* %p1) {
;CHECK: sub sp, sp, #8 ;CHECK: sub sp, sp, #8
;CHECK: sub sp, sp, #2048 ;CHECK: sub sp, sp, #2048
;CHECK: bl callme0 ;CHECK: bl callme0
call void @callme0(%big_struct0* byval %p0) call void @callme0(%big_struct0* byval(%big_struct0) %p0)
;CHECK: add sp, sp, #8 ;CHECK: add sp, sp, #8
;CHECK: add sp, sp, #2048 ;CHECK: add sp, sp, #2048
;CHECK: sub sp, sp, #2048 ;CHECK: sub sp, sp, #2048
;CHECK: bl callme1 ;CHECK: bl callme1
call void @callme1(%big_struct1* byval %p1) call void @callme1(%big_struct1* byval(%big_struct1) %p1)
;CHECK: add sp, sp, #2048 ;CHECK: add sp, sp, #2048
ret void ret void
} }
declare void @callme0(%big_struct0* byval) declare void @callme0(%big_struct0* byval(%big_struct0))
declare void @callme1(%big_struct1* byval) declare void @callme1(%big_struct1* byval(%big_struct1))

test/CodeGen/ARM/2014-02-21-byval-reg-split-alignment.ll

; RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s ; RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
%struct4bytes = type { i32 } %struct4bytes = type { i32 }
%struct8bytes8align = type { i64 } %struct8bytes8align = type { i64 }
%struct12bytes = type { i32, i32, i32 } %struct12bytes = type { i32, i32, i32 }
declare void @useIntPtr(%struct4bytes*) declare void @useIntPtr(%struct4bytes*)
declare void @useLong(i64) declare void @useLong(i64)
declare void @usePtr(%struct8bytes8align*) declare void @usePtr(%struct8bytes8align*)
; a -> r0 ; a -> r0
; b -> r1..r3 ; b -> r1..r3
; c -> sp+0..sp+7 ; c -> sp+0..sp+7
define void @foo1(i32 %a, %struct12bytes* byval %b, i64 %c) { define void @foo1(i32 %a, %struct12bytes* byval(%struct12bytes) %b, i64 %c) {
; CHECK-LABEL: foo1 ; CHECK-LABEL: foo1
; CHECK: sub sp, sp, #12 ; CHECK: sub sp, sp, #12
; CHECK: push {r11, lr} ; CHECK: push {r11, lr}
; CHECK: sub sp, sp, #4 ; CHECK: sub sp, sp, #4
; CHECK: add [[SCRATCH:r[0-9]+]], sp, #12 ; CHECK: add [[SCRATCH:r[0-9]+]], sp, #12
; CHECK: stm [[SCRATCH]], {r1, r2, r3} ; CHECK: stm [[SCRATCH]], {r1, r2, r3}
; CHECK: ldr r0, [sp, #24] ; CHECK: ldr r0, [sp, #24]
; CHECK: ldr r1, [sp, #28] ; CHECK: ldr r1, [sp, #28]
; CHECK: bl useLong ; CHECK: bl useLong
; CHECK: pop {r11, lr} ; CHECK: pop {r11, lr}
; CHECK: add sp, sp, #12 ; CHECK: add sp, sp, #12
call void @useLong(i64 %c) call void @useLong(i64 %c)
ret void ret void
} }
; a -> r0 ; a -> r0
; b -> r2..r3 ; b -> r2..r3
define void @foo2(i32 %a, %struct8bytes8align* byval %b) { define void @foo2(i32 %a, %struct8bytes8align* byval(%struct8bytes8align) %b) {
; CHECK-LABEL: foo2 ; CHECK-LABEL: foo2
; CHECK: sub sp, sp, #8 ; CHECK: sub sp, sp, #8
; CHECK: push {r11, lr} ; CHECK: push {r11, lr}
; CHECK: add r0, sp, #8 ; CHECK: add r0, sp, #8
; CHECK: str r3, [sp, #12] ; CHECK: str r3, [sp, #12]
; CHECK: str r2, [sp, #8] ; CHECK: str r2, [sp, #8]
; CHECK: bl usePtr ; CHECK: bl usePtr
; CHECK: pop {r11, lr} ; CHECK: pop {r11, lr}
; CHECK: add sp, sp, #8 ; CHECK: add sp, sp, #8
call void @usePtr(%struct8bytes8align* %b) call void @usePtr(%struct8bytes8align* %b)
ret void ret void
} }
; a -> r0..r1 ; a -> r0..r1
; b -> r2 ; b -> r2
define void @foo3(%struct8bytes8align* byval %a, %struct4bytes* byval %b) { define void @foo3(%struct8bytes8align* byval(%struct8bytes8align) %a, %struct4bytes* byval(%struct4bytes) %b) {
; CHECK-LABEL: foo3 ; CHECK-LABEL: foo3
; CHECK: sub sp, sp, #16 ; CHECK: sub sp, sp, #16
; CHECK: push {r11, lr} ; CHECK: push {r11, lr}
; CHECK: add [[SCRATCH:r[0-9]+]], sp, #8 ; CHECK: add [[SCRATCH:r[0-9]+]], sp, #8
; CHECK: stm [[SCRATCH]], {r0, r1, r2} ; CHECK: stm [[SCRATCH]], {r0, r1, r2}
; CHECK: add r0, sp, #8 ; CHECK: add r0, sp, #8
; CHECK: bl usePtr ; CHECK: bl usePtr
; CHECK: pop {r11, lr} ; CHECK: pop {r11, lr}
; CHECK: add sp, sp, #16 ; CHECK: add sp, sp, #16
call void @usePtr(%struct8bytes8align* %a) call void @usePtr(%struct8bytes8align* %a)
ret void ret void
} }
; a -> r0 ; a -> r0
; b -> r2..r3 ; b -> r2..r3
define void @foo4(%struct4bytes* byval %a, %struct8bytes8align* byval %b) { define void @foo4(%struct4bytes* byval(%struct4bytes) %a, %struct8bytes8align* byval(%struct8bytes8align) %b) {
; CHECK-LABEL: foo4 ; CHECK-LABEL: foo4
; CHECK: sub sp, sp, #16 ; CHECK: sub sp, sp, #16
; CHECK: push {r11, lr} ; CHECK: push {r11, lr}
; CHECK: str r0, [sp, #8] ; CHECK: str r0, [sp, #8]
; CHECK: add r0, sp, #16 ; CHECK: add r0, sp, #16
; CHECK: str r3, [sp, #20] ; CHECK: str r3, [sp, #20]
; CHECK: str r2, [sp, #16] ; CHECK: str r2, [sp, #16]
; CHECK: bl usePtr ; CHECK: bl usePtr
; CHECK: pop {r11, lr} ; CHECK: pop {r11, lr}
; CHECK: add sp, sp, #16 ; CHECK: add sp, sp, #16
; CHECK: mov pc, lr ; CHECK: mov pc, lr
call void @usePtr(%struct8bytes8align* %b) call void @usePtr(%struct8bytes8align* %b)
ret void ret void
} }
; a -> r0..r1 ; a -> r0..r1
; b -> r2 ; b -> r2
; c -> r3 ; c -> r3
define void @foo5(%struct8bytes8align* byval %a, %struct4bytes* byval %b, %struct4bytes* byval %c) { define void @foo5(%struct8bytes8align* byval(%struct8bytes8align) %a, %struct4bytes* byval(%struct4bytes) %b, %struct4bytes* byval(%struct4bytes) %c) {
; CHECK-LABEL: foo5 ; CHECK-LABEL: foo5
; CHECK: sub sp, sp, #16 ; CHECK: sub sp, sp, #16
; CHECK: push {r11, lr} ; CHECK: push {r11, lr}
; CHECK: add [[SCRATCH:r[0-9]+]], sp, #8 ; CHECK: add [[SCRATCH:r[0-9]+]], sp, #8
; CHECK: stm [[SCRATCH]], {r0, r1, r2, r3} ; CHECK: stm [[SCRATCH]], {r0, r1, r2, r3}
; CHECK: add r0, sp, #8 ; CHECK: add r0, sp, #8
; CHECK: bl usePtr ; CHECK: bl usePtr
; CHECK: pop {r11, lr} ; CHECK: pop {r11, lr}
; CHECK: add sp, sp, #16 ; CHECK: add sp, sp, #16
; CHECK: mov pc, lr ; CHECK: mov pc, lr
call void @usePtr(%struct8bytes8align* %a) call void @usePtr(%struct8bytes8align* %a)
ret void ret void
} }
; a..c -> r0..r2 ; a..c -> r0..r2
; d -> sp+0..sp+7 ; d -> sp+0..sp+7
define void @foo6(i32 %a, i32 %b, i32 %c, %struct8bytes8align* byval %d) { define void @foo6(i32 %a, i32 %b, i32 %c, %struct8bytes8align* byval(%struct8bytes8align) %d) {
; CHECK-LABEL: foo6 ; CHECK-LABEL: foo6
; CHECK: push {r11, lr} ; CHECK: push {r11, lr}
; CHECK: add r0, sp, #8 ; CHECK: add r0, sp, #8
; CHECK: bl usePtr ; CHECK: bl usePtr
; CHECK: pop {r11, lr} ; CHECK: pop {r11, lr}
; CHECK: mov pc, lr ; CHECK: mov pc, lr
call void @usePtr(%struct8bytes8align* %d) call void @usePtr(%struct8bytes8align* %d)
ret void ret void
} }

test/CodeGen/ARM/align-sp-adjustment.ll

; RUN: llc -mtriple=thumbv7 -o - %s | FileCheck %s ; RUN: llc -mtriple=thumbv7 -o - %s | FileCheck %s
; CHECK: [sp, #2120] ; CHECK: [sp, #2120]
%struct.struct_2 = type { [172 x %struct.struct_1] } %struct.struct_2 = type { [172 x %struct.struct_1] }
%struct.struct_1 = type { i32, i32, i32 } %struct.struct_1 = type { i32, i32, i32 }
@.str = private unnamed_addr constant [2 x i8] c"a\00", align 1 @.str = private unnamed_addr constant [2 x i8] c"a\00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"b\00", align 1 @.str.1 = private unnamed_addr constant [2 x i8] c"b\00", align 1
@.str.2 = private unnamed_addr constant [2 x i8] c"c\00", align 1 @.str.2 = private unnamed_addr constant [2 x i8] c"c\00", align 1
@.str.3 = private unnamed_addr constant [2 x i8] c"d\00", align 1 @.str.3 = private unnamed_addr constant [2 x i8] c"d\00", align 1
declare i32* @_Z4bar3iiPKcS0_i(i32, i32, i8*, i8*, i32) declare i32* @_Z4bar3iiPKcS0_i(i32, i32, i8*, i8*, i32)
declare void @_Z4bar1i8struct_2(i32, %struct.struct_2* byval align 4) declare void @_Z4bar1i8struct_2(i32, %struct.struct_2* align 4 byval(%struct.struct_2))
declare i32 @_Z4bar2PiPKc(i32*, i8*) declare i32 @_Z4bar2PiPKc(i32*, i8*)
define void @_Z3fooiiiii(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5) #0 { define void @_Z3fooiiiii(i32 %p1, i32 %p2, i32 %p3, i32 %p4, i32 %p5) #0 {
entry: entry:
%params = alloca %struct.struct_2, align 4 %params = alloca %struct.struct_2, align 4
%0 = bitcast %struct.struct_2* %params to i8* %0 = bitcast %struct.struct_2* %params to i8*
br label %for.body br label %for.body
Show All 10 Linesfor.inc:
%call3 = tail call i32 @_Z4bar2PiPKc(i32* %call, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i32 0, i32 0)) #4 %call3 = tail call i32 @_Z4bar2PiPKc(i32* %call, i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.str.3, i32 0, i32 0)) #4
%f2 = getelementptr inbounds %struct.struct_2, %struct.struct_2* %params, i32 0, i32 0, i32 %i.015, i32 1 %f2 = getelementptr inbounds %struct.struct_2, %struct.struct_2* %params, i32 0, i32 0, i32 %i.015, i32 1
store i32 %call3, i32* %f2, align 4 store i32 %call3, i32* %f2, align 4
%inc = add nuw nsw i32 %i.015, 1 %inc = add nuw nsw i32 %i.015, 1
%cmp = icmp slt i32 %inc, 4 %cmp = icmp slt i32 %inc, 4
br i1 %cmp, label %for.body, label %for.end br i1 %cmp, label %for.body, label %for.end
for.end: for.end:
call void @_Z4bar1i8struct_2(i32 %p4, %struct.struct_2* byval nonnull align 4 %params) #4 call void @_Z4bar1i8struct_2(i32 %p4, %struct.struct_2* non byval(%struct.struct_2)null align 4 %params) #4
br label %cleanup.8 br label %cleanup.8
cleanup.8: cleanup.8:
ret void ret void
} }

test/CodeGen/ARM/byval-align.ll

; RUN: llc -mtriple=thumbv7-apple-ios8.0 %s -o - | FileCheck %s ; RUN: llc -mtriple=thumbv7-apple-ios8.0 %s -o - | FileCheck %s
; This checks that alignments greater than 4 are respected by APCS ; This checks that alignments greater than 4 are respected by APCS
; targets. Mostly here to make sure *some* correct code is created after some ; targets. Mostly here to make sure *some* correct code is created after some
; simplifying refactoring; at the time of writing there were no actual APCS ; simplifying refactoring; at the time of writing there were no actual APCS
; users of byval alignments > 4, so no real calls for ABI stability. ; users of byval alignments > 4, so no real calls for ABI stability.
; "byval align 16" can't fit in any regs with an i8* taking up r0. ; "byval align 16" can't fit in any regs with an i8* taking up r0.
define i32 @test_align16(i8*, [4 x i32]* byval align 16 %b) { define i32 @test_align16(i8*, [4 x i32]* align 16 byval([4 x i32]) %b) {
; CHECK-LABEL: test_align16: ; CHECK-LABEL: test_align16:
; CHECK-NOT: sub sp ; CHECK-NOT: sub sp
; CHECK: push {r4, r7, lr} ; CHECK: push {r4, r7, lr}
; CHECK: add r7, sp, #4 ; CHECK: add r7, sp, #4
; CHECK: ldr r0, [r7, #8] ; CHECK: ldr r0, [r7, #8]
call void @bar() call void @bar()
%valptr = getelementptr [4 x i32], [4 x i32]* %b, i32 0, i32 0 %valptr = getelementptr [4 x i32], [4 x i32]* %b, i32 0, i32 0
%val = load i32, i32* %valptr %val = load i32, i32* %valptr
ret i32 %val ret i32 %val
} }
; byval align 8 can, but we used to incorrectly set r7 here (miscalculating the ; byval align 8 can, but we used to incorrectly set r7 here (miscalculating the
; space taken up by arg regs). ; space taken up by arg regs).
define i32 @test_align8(i8*, [4 x i32]* byval align 8 %b) { define i32 @test_align8(i8*, [4 x i32]* align 8 byval([4 x i32]) %b) {
; CHECK-LABEL: test_align8: ; CHECK-LABEL: test_align8:
; CHECK: sub sp, #8 ; CHECK: sub sp, #8
; CHECK: push {r4, r7, lr} ; CHECK: push {r4, r7, lr}
; CHECK: add r7, sp, #4 ; CHECK: add r7, sp, #4
; CHECK: strd r2, r3, [r7, #8] ; CHECK: strd r2, r3, [r7, #8]
; CHECK: ldr r0, [r7, #8] ; CHECK: ldr r0, [r7, #8]
call void @bar() call void @bar()
%valptr = getelementptr [4 x i32], [4 x i32]* %b, i32 0, i32 0 %valptr = getelementptr [4 x i32], [4 x i32]* %b, i32 0, i32 0
%val = load i32, i32* %valptr %val = load i32, i32* %valptr
ret i32 %val ret i32 %val
} }
; "byval align 32" can't fit in regs no matter what: it would be misaligned ; "byval align 32" can't fit in regs no matter what: it would be misaligned
; unless the incoming stack was deliberately misaligned. ; unless the incoming stack was deliberately misaligned.
define i32 @test_align32(i8*, [4 x i32]* byval align 32 %b) { define i32 @test_align32(i8*, [4 x i32]* align 32 byval([4 x i32]) %b) {
; CHECK-LABEL: test_align32: ; CHECK-LABEL: test_align32:
; CHECK-NOT: sub sp ; CHECK-NOT: sub sp
; CHECK: push {r4, r7, lr} ; CHECK: push {r4, r7, lr}
; CHECK: add r7, sp, #4 ; CHECK: add r7, sp, #4
; CHECK: ldr r0, [r7, #8] ; CHECK: ldr r0, [r7, #8]
call void @bar() call void @bar()
Show All 10 Lines
; CHECK: mov [[TMP:r[0-9]+]], sp ; CHECK: mov [[TMP:r[0-9]+]], sp
; CHECK: bfc [[TMP]], #0, #4 ; CHECK: bfc [[TMP]], #0, #4
; CHECK: mov sp, [[TMP]] ; CHECK: mov sp, [[TMP]]
; While we're here, make sure the caller also puts it at sp ; While we're here, make sure the caller also puts it at sp
; CHECK: mov r[[BASE:[0-9]+]], sp ; CHECK: mov r[[BASE:[0-9]+]], sp
; CHECK: vst1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]] ; CHECK: vst1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r[[BASE]]]
call i32 @test_align16(i8* null, [4 x i32]* byval align 16 @var) call i32 @test_align16(i8* null, [4 x i32]* align 16 byval([4 x i32]) @var)
ret void ret void
} }
@var = global [4 x i32] zeroinitializer @var = global [4 x i32] zeroinitializer
declare void @bar() declare void @bar()

test/CodeGen/ARM/byval_load_align.ll

Show All 10 Lines
%struct.ModuleID = type { [32 x i8], [32 x i8], i16 } %struct.ModuleID = type { [32 x i8], [32 x i8], i16 }
@sID = internal constant %struct.ModuleID { [32 x i8] c"TEST\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", [32 x i8] c"1.0\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", i16 23 }, align 2 @sID = internal constant %struct.ModuleID { [32 x i8] c"TEST\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", [32 x i8] c"1.0\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00", i16 23 }, align 2
; Function Attrs: nounwind ssp ; Function Attrs: nounwind ssp
define void @Client() #0 { define void @Client() #0 {
entry: entry:
tail call void @Logger(i8 signext 97, %struct.ModuleID* byval @sID) #2 tail call void @Logger(i8 signext 97, %struct.ModuleID* byval(%struct.ModuleID) @sID) #2
ret void ret void
} }
declare void @Logger(i8 signext, %struct.ModuleID* byval) #1 declare void @Logger(i8 signext, %struct.ModuleID* byval(%struct.ModuleID)) #1
attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind } attributes #2 = { nounwind }

test/CodeGen/ARM/ssp-data-layout.ll

Show First 20 Lines • Show All 153 Lines • ▼ Show 20 Lines; CHECK: bl end_struct_small_nonchar
%3 = bitcast [8 x i8]* %coerce.dive to i64* %3 = bitcast [8 x i8]* %coerce.dive to i64*
%4 = load i64, i64* %3, align 1 %4 = load i64, i64* %3, align 1
%coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0 %coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0
%5 = bitcast [2 x i8]* %coerce.dive25 to i16* %5 = bitcast [2 x i8]* %coerce.dive25 to i16*
%6 = load i16, i16* %5, align 1 %6 = load i16, i16* %5, align 1
%coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0 %coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0
%7 = bitcast [2 x i16]* %coerce.dive26 to i32* %7 = bitcast [2 x i16]* %coerce.dive26 to i32*
%8 = load i32, i32* %7, align 1 %8 = load i32, i32* %7, align 1
call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* byval align 4 %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2) call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* align 4 byval(%struct.struct_large_nonchar) %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2)
ret void ret void
} }
define void @layout_sspstrong() sspstrong { define void @layout_sspstrong() sspstrong {
entry: entry:
; Expected stack layout for sspstrong is ; Expected stack layout for sspstrong is
; 144 large_nonchar . Group 1, nested arrays, ; 144 large_nonchar . Group 1, nested arrays,
; 136 large_char . arrays >= ssp-buffer-size ; 136 large_char . arrays >= ssp-buffer-size
▲ Show 20 Lines • Show All 128 Lines • ▼ Show 20 Lines; CHECK: bl end_struct_small_nonchar
%3 = bitcast [8 x i8]* %coerce.dive to i64* %3 = bitcast [8 x i8]* %coerce.dive to i64*
%4 = load i64, i64* %3, align 1 %4 = load i64, i64* %3, align 1
%coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0 %coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0
%5 = bitcast [2 x i8]* %coerce.dive25 to i16* %5 = bitcast [2 x i8]* %coerce.dive25 to i16*
%6 = load i16, i16* %5, align 1 %6 = load i16, i16* %5, align 1
%coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0 %coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0
%7 = bitcast [2 x i16]* %coerce.dive26 to i32* %7 = bitcast [2 x i16]* %coerce.dive26 to i32*
%8 = load i32, i32* %7, align 1 %8 = load i32, i32* %7, align 1
call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* byval align 4 %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2) call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* align 4 byval(%struct.struct_large_nonchar) %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2)
ret void ret void
} }
define void @layout_sspreq() sspreq { define void @layout_sspreq() sspreq {
entry: entry:
; Expected stack layout for sspreq is the same as sspstrong ; Expected stack layout for sspreq is the same as sspstrong
; ;
; CHECK: layout_sspreq: ; CHECK: layout_sspreq:
▲ Show 20 Lines • Show All 116 Lines • ▼ Show 20 Lines; CHECK: bl end_struct_small_nonchar
%3 = bitcast [8 x i8]* %coerce.dive to i64* %3 = bitcast [8 x i8]* %coerce.dive to i64*
%4 = load i64, i64* %3, align 1 %4 = load i64, i64* %3, align 1
%coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0 %coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0
%5 = bitcast [2 x i8]* %coerce.dive25 to i16* %5 = bitcast [2 x i8]* %coerce.dive25 to i16*
%6 = load i16, i16* %5, align 1 %6 = load i16, i16* %5, align 1
%coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0 %coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0
%7 = bitcast [2 x i16]* %coerce.dive26 to i32* %7 = bitcast [2 x i16]* %coerce.dive26 to i32*
%8 = load i32, i32* %7, align 1 %8 = load i32, i32* %7, align 1
call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* byval align 4 %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2) call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* align 4 byval(%struct.struct_large_nonchar) %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2)
ret void ret void
} }
define void @struct_with_protectable_arrays() sspstrong { define void @struct_with_protectable_arrays() sspstrong {
entry: entry:
; Check to ensure that a structure which contains a small array followed by a ; Check to ensure that a structure which contains a small array followed by a
; large array is assigned to the stack properly as a large object. ; large array is assigned to the stack properly as a large object.
; CHECK: struct_with_protectable_arrays: ; CHECK: struct_with_protectable_arrays:
Show All 22 Lines; CHECK: bl end_struct_large_char2
%1 = bitcast [8 x i8]* %coerce.dive to i64* %1 = bitcast [8 x i8]* %coerce.dive to i64*
%2 = load i64, i64* %1, align 1 %2 = load i64, i64* %1, align 1
%coerce.dive4 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %a, i32 0, i32 0 %coerce.dive4 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %a, i32 0, i32 0
%3 = bitcast [2 x i8]* %coerce.dive4 to i16* %3 = bitcast [2 x i8]* %coerce.dive4 to i16*
%4 = load i16, i16* %3, align 1 %4 = load i16, i16* %3, align 1
%coerce.dive5 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d2, i32 0, i32 0 %coerce.dive5 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d2, i32 0, i32 0
%5 = bitcast [2 x i16]* %coerce.dive5 to i32* %5 = bitcast [2 x i16]* %coerce.dive5 to i32*
%6 = load i32, i32* %5, align 1 %6 = load i32, i32* %5, align 1
call void @takes_all(i64 %2, i16 %4, %struct.struct_large_nonchar* byval align 4 %d1, i32 %6, i8* null, i8* null, i32* null, i16* null, i32* null, i32 0, i32 0, i32 0) call void @takes_all(i64 %2, i16 %4, %struct.struct_large_nonchar* align 4 byval(%struct.struct_large_nonchar) %d1, i32 %6, i8* null, i8* null, i32* null, i16* null, i32* null, i32 0, i32 0, i32 0)
ret void ret void
} }
declare i32 @get_scalar1() declare i32 @get_scalar1()
declare void @end_scalar1() declare void @end_scalar1()
declare i32 @get_scalar2() declare i32 @get_scalar2()
declare void @end_scalar2() declare void @end_scalar2()
Show All 26 Lines
declare void @end_struct_small_char() declare void @end_struct_small_char()
declare i32 @get_struct_large_nonchar() declare i32 @get_struct_large_nonchar()
declare void @end_struct_large_nonchar() declare void @end_struct_large_nonchar()
declare signext i16 @get_struct_small_nonchar() declare signext i16 @get_struct_small_nonchar()
declare void @end_struct_small_nonchar() declare void @end_struct_small_nonchar()
declare void @takes_all(i64, i16, %struct.struct_large_nonchar* byval align 8, i32, i8*, i8*, i32*, i16*, i32*, i32, i32, i32) declare void @takes_all(i64, i16, %struct.struct_large_nonchar* align 8 byval(%struct.struct_large_nonchar), i32, i8*, i8*, i32*, i16*, i32*, i32, i32, i32)

test/CodeGen/ARM/struct-byval-frame-index.ll

Show First 20 Lines • Show All 138 Lines • ▼ Show 20 Linesif.end236: ; preds = %if.end230
%or.cond812 = or i1 %cmp242, %tobool245 %or.cond812 = or i1 %cmp242, %tobool245
br i1 %or.cond812, label %if.end249, label %land.lhs.true246 br i1 %or.cond812, label %if.end249, label %land.lhs.true246
land.lhs.true246: ; preds = %if.end236 land.lhs.true246: ; preds = %if.end236
br i1 undef, label %if.end249, label %if.then248 br i1 undef, label %if.end249, label %if.then248
if.then248: ; preds = %land.lhs.true246 if.then248: ; preds = %land.lhs.true246
tail call void asm sideeffect "", "~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11}"() nounwind tail call void asm sideeffect "", "~{r1},~{r2},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11}"() nounwind
tail call void @RestoreMVBlock8x8(i32 1, i32 0, %structN* byval @tr8x8, i32 0) #0 tail call void @RestoreMVBlock8x8(i32 1, i32 0, %structN* byval(%structN) @tr8x8, i32 0) #0
tail call void @RestoreMVBlock8x8(i32 1, i32 2, %structN* byval @tr8x8, i32 0) #0 tail call void @RestoreMVBlock8x8(i32 1, i32 2, %structN* byval(%structN) @tr8x8, i32 0) #0
tail call void @RestoreMVBlock8x8(i32 1, i32 3, %structN* byval @tr8x8, i32 0) #0 tail call void @RestoreMVBlock8x8(i32 1, i32 3, %structN* byval(%structN) @tr8x8, i32 0) #0
br label %if.end249 br label %if.end249
if.end249: ; preds = %if.then248, %land.lhs.true246, %if.end236 if.end249: ; preds = %if.then248, %land.lhs.true246, %if.end236
%5 = load i32, i32* @luma_transform_size_8x8_flag, align 4 %5 = load i32, i32* @luma_transform_size_8x8_flag, align 4
%6 = load %structA*, %structA** @rdopt, align 4 %6 = load %structA*, %structA** @rdopt, align 4
%luma_transform_size_8x8_flag264 = getelementptr inbounds %structA, %structA* %6, i32 0, i32 21 %luma_transform_size_8x8_flag264 = getelementptr inbounds %structA, %structA* %6, i32 0, i32 21
store i32 %5, i32* %luma_transform_size_8x8_flag264, align 4 store i32 %5, i32* %luma_transform_size_8x8_flag264, align 4
%7 = load i32, i32* undef, align 4 %7 = load i32, i32* undef, align 4
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Linesfor.inc503: ; preds = %if.then475, %lor.lhs.false459
%.pre1155 = load %structB*, %structB** @img, align 4 %.pre1155 = load %structB*, %structB** @img, align 4
br label %for.body285 br label %for.body285
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @update_offset_params(i32, i32) #1 declare void @update_offset_params(i32, i32) #1
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @RestoreMVBlock8x8(i32, i32, %structN* byval nocapture, i32) #1 declare void @RestoreMVBlock8x8(i32, i32, %structN* nocapture byval(%structN), i32) #1
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }

test/CodeGen/ARM/struct_byval.ll

Show All 14 Lines
; CHECK: ldr ; CHECK: ldr
; CHECK: str ; CHECK: str
; CHECK-NOT:bne ; CHECK-NOT:bne
; THUMB-LABEL: f: ; THUMB-LABEL: f:
; THUMB: ldr ; THUMB: ldr
; THUMB: str ; THUMB: str
; THUMB-NOT:bne ; THUMB-NOT:bne
%st = alloca %struct.SmallStruct, align 4 %st = alloca %struct.SmallStruct, align 4
%call = call i32 @e1(%struct.SmallStruct* byval %st) %call = call i32 @e1(%struct.SmallStruct* byval(%struct.SmallStruct) %st)
ret i32 0 ret i32 0
} }
; Generate a loop for large struct byval ; Generate a loop for large struct byval
define i32 @g() nounwind ssp { define i32 @g() nounwind ssp {
entry: entry:
; CHECK-LABEL: g: ; CHECK-LABEL: g:
; CHECK: ldr ; CHECK: ldr
Show All 9 Lines
; Ensure that use movw instead of constpool for the loop trip count. But don't ; Ensure that use movw instead of constpool for the loop trip count. But don't
; match the __stack_chk_guard movw ; match the __stack_chk_guard movw
; NACL: movw r{{[1-9]}}, # ; NACL: movw r{{[1-9]}}, #
; NACL: ldr ; NACL: ldr
; NACL: sub ; NACL: sub
; NACL: str ; NACL: str
; NACL: bne ; NACL: bne
%st = alloca %struct.LargeStruct, align 4 %st = alloca %struct.LargeStruct, align 4
%call = call i32 @e2(%struct.LargeStruct* byval %st) %call = call i32 @e2(%struct.LargeStruct* byval(%struct.LargeStruct) %st)
ret i32 0 ret i32 0
} }
; Generate a loop using NEON instructions ; Generate a loop using NEON instructions
define i32 @h() nounwind ssp { define i32 @h() nounwind ssp {
entry: entry:
; CHECK-LABEL: h: ; CHECK-LABEL: h:
; CHECK: vld1 ; CHECK: vld1
; CHECK: sub ; CHECK: sub
; CHECK: vst1 ; CHECK: vst1
; CHECK: bne ; CHECK: bne
; THUMB-LABEL: h: ; THUMB-LABEL: h:
; THUMB: vld1 ; THUMB: vld1
; THUMB: sub ; THUMB: sub
; THUMB: vst1 ; THUMB: vst1
; THUMB: bne ; THUMB: bne
; NACL: movw r{{[1-9]}}, # ; NACL: movw r{{[1-9]}}, #
; NACL: vld1 ; NACL: vld1
; NACL: sub ; NACL: sub
; NACL: vst1 ; NACL: vst1
; NACL: bne ; NACL: bne
%st = alloca %struct.LargeStruct, align 16 %st = alloca %struct.LargeStruct, align 16
%call = call i32 @e3(%struct.LargeStruct* byval align 16 %st) %call = call i32 @e3(%struct.LargeStruct* align 16 byval(%struct.LargeStruct) %st)
ret i32 0 ret i32 0
} }
declare i32 @e1(%struct.SmallStruct* nocapture byval %in) nounwind declare i32 @e1(%struct.SmallStruct* nocapture byval(%struct.SmallStruct) %in) nounwind
declare i32 @e2(%struct.LargeStruct* nocapture byval %in) nounwind declare i32 @e2(%struct.LargeStruct* nocapture byval(%struct.LargeStruct) %in) nounwind
declare i32 @e3(%struct.LargeStruct* nocapture byval align 16 %in) nounwind declare i32 @e3(%struct.LargeStruct* nocapture align 16 byval(%struct.LargeStruct) %in) nounwind
; rdar://12442472 ; rdar://12442472
; We can't do tail call since address of s is passed to the callee and part of ; We can't do tail call since address of s is passed to the callee and part of
; s is in caller's local frame. ; s is in caller's local frame.
define void @f3(%struct.SmallStruct* nocapture byval %s) nounwind optsize { define void @f3(%struct.SmallStruct* nocapture byval(%struct.SmallStruct) %s) nounwind optsize {
; CHECK-LABEL: f3 ; CHECK-LABEL: f3
; CHECK: bl _consumestruct ; CHECK: bl _consumestruct
; THUMB-LABEL: f3 ; THUMB-LABEL: f3
; THUMB: blx _consumestruct ; THUMB: blx _consumestruct
entry: entry:
%0 = bitcast %struct.SmallStruct* %s to i8* %0 = bitcast %struct.SmallStruct* %s to i8*
tail call void @consumestruct(i8* %0, i32 80) optsize tail call void @consumestruct(i8* %0, i32 80) optsize
ret void ret void
} }
define void @f4(%struct.SmallStruct* nocapture byval %s) nounwind optsize { define void @f4(%struct.SmallStruct* nocapture byval(%struct.SmallStruct) %s) nounwind optsize {
; CHECK-LABEL: f4 ; CHECK-LABEL: f4
; CHECK: bl _consumestruct ; CHECK: bl _consumestruct
; THUMB-LABEL: f4 ; THUMB-LABEL: f4
; THUMB: blx _consumestruct ; THUMB: blx _consumestruct
entry: entry:
%addr = getelementptr inbounds %struct.SmallStruct, %struct.SmallStruct* %s, i32 0, i32 0 %addr = getelementptr inbounds %struct.SmallStruct, %struct.SmallStruct* %s, i32 0, i32 0
%0 = bitcast i32* %addr to i8* %0 = bitcast i32* %addr to i8*
tail call void @consumestruct(i8* %0, i32 80) optsize tail call void @consumestruct(i8* %0, i32 80) optsize
ret void ret void
} }
; We can do tail call here since s is in the incoming argument area. ; We can do tail call here since s is in the incoming argument area.
define void @f5(i32 %a, i32 %b, i32 %c, i32 %d, %struct.SmallStruct* nocapture byval %s) nounwind optsize { define void @f5(i32 %a, i32 %b, i32 %c, i32 %d, %struct.SmallStruct* nocapture byval(%struct.SmallStruct) %s) nounwind optsize {
; CHECK-LABEL: f5 ; CHECK-LABEL: f5
; CHECK: b _consumestruct ; CHECK: b _consumestruct
; THUMB-LABEL: f5 ; THUMB-LABEL: f5
; THUMB: b.w _consumestruct ; THUMB: b.w _consumestruct
entry: entry:
%0 = bitcast %struct.SmallStruct* %s to i8* %0 = bitcast %struct.SmallStruct* %s to i8*
tail call void @consumestruct(i8* %0, i32 80) optsize tail call void @consumestruct(i8* %0, i32 80) optsize
ret void ret void
} }
define void @f6(i32 %a, i32 %b, i32 %c, i32 %d, %struct.SmallStruct* nocapture byval %s) nounwind optsize { define void @f6(i32 %a, i32 %b, i32 %c, i32 %d, %struct.SmallStruct* nocapture byval(%struct.SmallStruct) %s) nounwind optsize {
; CHECK-LABEL: f6 ; CHECK-LABEL: f6
; CHECK: b _consumestruct ; CHECK: b _consumestruct
; THUMB-LABEL: f6 ; THUMB-LABEL: f6
; THUMB: b.w _consumestruct ; THUMB: b.w _consumestruct
entry: entry:
%addr = getelementptr inbounds %struct.SmallStruct, %struct.SmallStruct* %s, i32 0, i32 0 %addr = getelementptr inbounds %struct.SmallStruct, %struct.SmallStruct* %s, i32 0, i32 0
%0 = bitcast i32* %addr to i8* %0 = bitcast i32* %addr to i8*
tail call void @consumestruct(i8* %0, i32 80) optsize tail call void @consumestruct(i8* %0, i32 80) optsize
ret void ret void
} }
declare void @consumestruct(i8* nocapture %structp, i32 %structsize) nounwind declare void @consumestruct(i8* nocapture %structp, i32 %structsize) nounwind
; PR17309 ; PR17309
%struct.I.8 = type { [10 x i32], [3 x i8] } %struct.I.8 = type { [10 x i32], [3 x i8] }
declare void @use_I(%struct.I.8* byval) declare void @use_I(%struct.I.8* byval(%struct.I.8))
define void @test_I_16() { define void @test_I_16() {
; CHECK-LABEL: test_I_16 ; CHECK-LABEL: test_I_16
; CHECK: ldrb ; CHECK: ldrb
; CHECK: strb ; CHECK: strb
; THUMB-LABEL: test_I_16 ; THUMB-LABEL: test_I_16
; THUMB: ldrb ; THUMB: ldrb
; THUMB: strb ; THUMB: strb
entry: entry:
call void @use_I(%struct.I.8* byval align 16 undef) call void @use_I(%struct.I.8* align 16 byval(%struct.I.8) undef)
ret void ret void
} }

test/CodeGen/ARM/struct_byval_arm_t1_t2.ll

Show All 15 Lines
;for the correct architecture. Otherwise we could accidentally generate an ;for the correct architecture. Otherwise we could accidentally generate an
;ARM instruction for THUMB1 and wouldn't detect it because the assembly ;ARM instruction for THUMB1 and wouldn't detect it because the assembly
;code representation is the same, but the object code would be generated ;code representation is the same, but the object code would be generated
;incorrectly. For each test we check for the label, a load instruction of the ;incorrectly. For each test we check for the label, a load instruction of the
;correct form, a branch if it will be generated with a loop, and the leftover ;correct form, a branch if it will be generated with a loop, and the leftover
;cleanup if the number of bytes does not divide evenly by the store size ;cleanup if the number of bytes does not divide evenly by the store size
%struct.A = type <{ [ 10 x i32 ] }> ; 40 bytes %struct.A = type <{ [ 10 x i32 ] }> ; 40 bytes
declare void @use_A(%struct.A* byval) declare void @use_A(%struct.A* byval(%struct.A))
%struct.B = type <{ [ 10 x i32 ], i8 }> ; 41 bytes %struct.B = type <{ [ 10 x i32 ], i8 }> ; 41 bytes
declare void @use_B(%struct.B* byval) declare void @use_B(%struct.B* byval(%struct.B))
%struct.C = type <{ [ 10 x i32 ], [ 3 x i8 ] }> ; 43 bytes %struct.C = type <{ [ 10 x i32 ], [ 3 x i8 ] }> ; 43 bytes
declare void @use_C(%struct.C* byval) declare void @use_C(%struct.C* byval(%struct.C))
%struct.D = type <{ [ 100 x i32 ] }> ; 400 bytes %struct.D = type <{ [ 100 x i32 ] }> ; 400 bytes
declare void @use_D(%struct.D* byval) declare void @use_D(%struct.D* byval(%struct.D))
%struct.E = type <{ [ 100 x i32 ], i8 }> ; 401 bytes %struct.E = type <{ [ 100 x i32 ], i8 }> ; 401 bytes
declare void @use_E(%struct.E* byval) declare void @use_E(%struct.E* byval(%struct.E))
%struct.F = type <{ [ 100 x i32 ], [ 3 x i8 ] }> ; 403 bytes %struct.F = type <{ [ 100 x i32 ], [ 3 x i8 ] }> ; 403 bytes
declare void @use_F(%struct.F* byval) declare void @use_F(%struct.F* byval(%struct.F))
%struct.G = type { [ 10 x i32 ] } ; 40 bytes %struct.G = type { [ 10 x i32 ] } ; 40 bytes
declare void @use_G(%struct.G* byval) declare void @use_G(%struct.G* byval(%struct.G))
%struct.H = type { [ 10 x i32 ], i8 } ; 41 bytes %struct.H = type { [ 10 x i32 ], i8 } ; 41 bytes
declare void @use_H(%struct.H* byval) declare void @use_H(%struct.H* byval(%struct.H))
%struct.I = type { [ 10 x i32 ], [ 3 x i8 ] } ; 43 bytes %struct.I = type { [ 10 x i32 ], [ 3 x i8 ] } ; 43 bytes
declare void @use_I(%struct.I* byval) declare void @use_I(%struct.I* byval(%struct.I))
%struct.J = type { [ 100 x i32 ] } ; 400 bytes %struct.J = type { [ 100 x i32 ] } ; 400 bytes
declare void @use_J(%struct.J* byval) declare void @use_J(%struct.J* byval(%struct.J))
%struct.K = type { [ 100 x i32 ], i8 } ; 401 bytes %struct.K = type { [ 100 x i32 ], i8 } ; 401 bytes
declare void @use_K(%struct.K* byval) declare void @use_K(%struct.K* byval(%struct.K))
%struct.L = type { [ 100 x i32 ], [ 3 x i8 ] } ; 403 bytes %struct.L = type { [ 100 x i32 ], [ 3 x i8 ] } ; 403 bytes
declare void @use_L(%struct.L* byval) declare void @use_L(%struct.L* byval(%struct.L))
;ARM-LABEL: test_A_1: ;ARM-LABEL: test_A_1:
;THUMB2-LABEL: test_A_1: ;THUMB2-LABEL: test_A_1:
;NO_NEON-LABEL:test_A_1: ;NO_NEON-LABEL:test_A_1:
;THUMB1-LABEL: test_A_1: ;THUMB1-LABEL: test_A_1:
;T1POST-LABEL: test_A_1: ;T1POST-LABEL: test_A_1:
define void @test_A_1() { define void @test_A_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.A, align 1 %a = alloca %struct.A, align 1
call void @use_A(%struct.A* byval align 1 %a) call void @use_A(%struct.A* align 1 byval(%struct.A) %a)
ret void ret void
} }
;ARM-LABEL: test_A_2: ;ARM-LABEL: test_A_2:
;THUMB2-LABEL: test_A_2: ;THUMB2-LABEL: test_A_2:
;NO_NEON-LABEL:test_A_2: ;NO_NEON-LABEL:test_A_2:
;THUMB1-LABEL: test_A_2: ;THUMB1-LABEL: test_A_2:
;T1POST-LABEL: test_A_2: ;T1POST-LABEL: test_A_2:
define void @test_A_2() { define void @test_A_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.A, align 2 %a = alloca %struct.A, align 2
call void @use_A(%struct.A* byval align 2 %a) call void @use_A(%struct.A* align 2 byval(%struct.A) %a)
ret void ret void
} }
;ARM-LABEL: test_A_4: ;ARM-LABEL: test_A_4:
;THUMB2-LABEL: test_A_4: ;THUMB2-LABEL: test_A_4:
;NO_NEON-LABEL:test_A_4: ;NO_NEON-LABEL:test_A_4:
;THUMB1-LABEL: test_A_4: ;THUMB1-LABEL: test_A_4:
;T1POST-LABEL: test_A_4: ;T1POST-LABEL: test_A_4:
define void @test_A_4() { define void @test_A_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4 ;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.A, align 4 %a = alloca %struct.A, align 4
call void @use_A(%struct.A* byval align 4 %a) call void @use_A(%struct.A* align 4 byval(%struct.A) %a)
ret void ret void
} }
;ARM-LABEL: test_A_8: ;ARM-LABEL: test_A_8:
;THUMB2-LABEL: test_A_8: ;THUMB2-LABEL: test_A_8:
;NO_NEON-LABEL:test_A_8: ;NO_NEON-LABEL:test_A_8:
;THUMB1-LABEL: test_A_8: ;THUMB1-LABEL: test_A_8:
;T1POST-LABEL: test_A_8: ;T1POST-LABEL: test_A_8:
define void @test_A_8() { define void @test_A_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.A, align 8 %a = alloca %struct.A, align 8
call void @use_A(%struct.A* byval align 8 %a) call void @use_A(%struct.A* align 8 byval(%struct.A) %a)
ret void ret void
} }
;ARM-LABEL: test_A_16: ;ARM-LABEL: test_A_16:
;THUMB2-LABEL: test_A_16: ;THUMB2-LABEL: test_A_16:
;NO_NEON-LABEL:test_A_16: ;NO_NEON-LABEL:test_A_16:
;THUMB1-LABEL: test_A_16: ;THUMB1-LABEL: test_A_16:
;T1POST-LABEL: test_A_16: ;T1POST-LABEL: test_A_16:
define void @test_A_16() { define void @test_A_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.A, align 16 %a = alloca %struct.A, align 16
call void @use_A(%struct.A* byval align 16 %a) call void @use_A(%struct.A* align 16 byval(%struct.A) %a)
ret void ret void
} }
;ARM-LABEL: test_B_1: ;ARM-LABEL: test_B_1:
;THUMB2-LABEL: test_B_1: ;THUMB2-LABEL: test_B_1:
;NO_NEON-LABEL:test_B_1: ;NO_NEON-LABEL:test_B_1:
;THUMB1-LABEL: test_B_1: ;THUMB1-LABEL: test_B_1:
;T1POST-LABEL: test_B_1: ;T1POST-LABEL: test_B_1:
define void @test_B_1() { define void @test_B_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.B, align 1 %a = alloca %struct.B, align 1
call void @use_B(%struct.B* byval align 1 %a) call void @use_B(%struct.B* align 1 byval(%struct.B) %a)
ret void ret void
} }
;ARM-LABEL: test_B_2: ;ARM-LABEL: test_B_2:
;THUMB2-LABEL: test_B_2: ;THUMB2-LABEL: test_B_2:
;NO_NEON-LABEL:test_B_2: ;NO_NEON-LABEL:test_B_2:
;THUMB1-LABEL: test_B_2: ;THUMB1-LABEL: test_B_2:
;T1POST-LABEL: test_B_2: ;T1POST-LABEL: test_B_2:
define void @test_B_2() { define void @test_B_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.B, align 2 %a = alloca %struct.B, align 2
call void @use_B(%struct.B* byval align 2 %a) call void @use_B(%struct.B* align 2 byval(%struct.B) %a)
ret void ret void
} }
;ARM-LABEL: test_B_4: ;ARM-LABEL: test_B_4:
;THUMB2-LABEL: test_B_4: ;THUMB2-LABEL: test_B_4:
;NO_NEON-LABEL:test_B_4: ;NO_NEON-LABEL:test_B_4:
;THUMB1-LABEL: test_B_4: ;THUMB1-LABEL: test_B_4:
;T1POST-LABEL: test_B_4: ;T1POST-LABEL: test_B_4:
define void @test_B_4() { define void @test_B_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4 ;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.B, align 4 %a = alloca %struct.B, align 4
call void @use_B(%struct.B* byval align 4 %a) call void @use_B(%struct.B* align 4 byval(%struct.B) %a)
ret void ret void
} }
;ARM-LABEL: test_B_8: ;ARM-LABEL: test_B_8:
;THUMB2-LABEL: test_B_8: ;THUMB2-LABEL: test_B_8:
;NO_NEON-LABEL:test_B_8: ;NO_NEON-LABEL:test_B_8:
;THUMB1-LABEL: test_B_8: ;THUMB1-LABEL: test_B_8:
;T1POST-LABEL: test_B_8: ;T1POST-LABEL: test_B_8:
define void @test_B_8() { define void @test_B_8() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.B, align 8 %a = alloca %struct.B, align 8
call void @use_B(%struct.B* byval align 8 %a) call void @use_B(%struct.B* align 8 byval(%struct.B) %a)
ret void ret void
} }
;ARM-LABEL: test_B_16: ;ARM-LABEL: test_B_16:
;THUMB2-LABEL: test_B_16: ;THUMB2-LABEL: test_B_16:
;NO_NEON-LABEL:test_B_16: ;NO_NEON-LABEL:test_B_16:
;THUMB1-LABEL: test_B_16: ;THUMB1-LABEL: test_B_16:
;T1POST-LABEL: test_B_16: ;T1POST-LABEL: test_B_16:
define void @test_B_16() { define void @test_B_16() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.B, align 16 %a = alloca %struct.B, align 16
call void @use_B(%struct.B* byval align 16 %a) call void @use_B(%struct.B* align 16 byval(%struct.B) %a)
ret void ret void
} }
;ARM-LABEL: test_C_1: ;ARM-LABEL: test_C_1:
;THUMB2-LABEL: test_C_1: ;THUMB2-LABEL: test_C_1:
;NO_NEON-LABEL:test_C_1: ;NO_NEON-LABEL:test_C_1:
;THUMB1-LABEL: test_C_1: ;THUMB1-LABEL: test_C_1:
;T1POST-LABEL: test_C_1: ;T1POST-LABEL: test_C_1:
define void @test_C_1() { define void @test_C_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.C, align 1 %a = alloca %struct.C, align 1
call void @use_C(%struct.C* byval align 1 %a) call void @use_C(%struct.C* align 1 byval(%struct.C) %a)
ret void ret void
} }
;ARM-LABEL: test_C_2: ;ARM-LABEL: test_C_2:
;THUMB2-LABEL: test_C_2: ;THUMB2-LABEL: test_C_2:
;NO_NEON-LABEL:test_C_2: ;NO_NEON-LABEL:test_C_2:
;THUMB1-LABEL: test_C_2: ;THUMB1-LABEL: test_C_2:
;T1POST-LABEL: test_C_2: ;T1POST-LABEL: test_C_2:
define void @test_C_2() { define void @test_C_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.C, align 2 %a = alloca %struct.C, align 2
call void @use_C(%struct.C* byval align 2 %a) call void @use_C(%struct.C* align 2 byval(%struct.C) %a)
ret void ret void
} }
;ARM-LABEL: test_C_4: ;ARM-LABEL: test_C_4:
;THUMB2-LABEL: test_C_4: ;THUMB2-LABEL: test_C_4:
;NO_NEON-LABEL:test_C_4: ;NO_NEON-LABEL:test_C_4:
;THUMB1-LABEL: test_C_4: ;THUMB1-LABEL: test_C_4:
;T1POST-LABEL: test_C_4: ;T1POST-LABEL: test_C_4:
define void @test_C_4() { define void @test_C_4() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.C, align 4 %a = alloca %struct.C, align 4
call void @use_C(%struct.C* byval align 4 %a) call void @use_C(%struct.C* align 4 byval(%struct.C) %a)
ret void ret void
} }
;ARM-LABEL: test_C_8: ;ARM-LABEL: test_C_8:
;THUMB2-LABEL: test_C_8: ;THUMB2-LABEL: test_C_8:
;NO_NEON-LABEL:test_C_8: ;NO_NEON-LABEL:test_C_8:
;THUMB1-LABEL: test_C_8: ;THUMB1-LABEL: test_C_8:
;T1POST-LABEL: test_C_8: ;T1POST-LABEL: test_C_8:
define void @test_C_8() { define void @test_C_8() {
Show All 10 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.C, align 8 %a = alloca %struct.C, align 8
call void @use_C(%struct.C* byval align 8 %a) call void @use_C(%struct.C* align 8 byval(%struct.C) %a)
ret void ret void
} }
;ARM-LABEL: test_C_16: ;ARM-LABEL: test_C_16:
;THUMB2-LABEL: test_C_16: ;THUMB2-LABEL: test_C_16:
;NO_NEON-LABEL:test_C_16: ;NO_NEON-LABEL:test_C_16:
;THUMB1-LABEL: test_C_16: ;THUMB1-LABEL: test_C_16:
;T1POST-LABEL: test_C_16: ;T1POST-LABEL: test_C_16:
define void @test_C_16() { define void @test_C_16() {
Show All 10 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.C, align 16 %a = alloca %struct.C, align 16
call void @use_C(%struct.C* byval align 16 %a) call void @use_C(%struct.C* align 16 byval(%struct.C) %a)
ret void ret void
} }
;ARM-LABEL: test_D_1: ;ARM-LABEL: test_D_1:
;THUMB2-LABEL: test_D_1: ;THUMB2-LABEL: test_D_1:
;NO_NEON-LABEL:test_D_1: ;NO_NEON-LABEL:test_D_1:
;THUMB1-LABEL: test_D_1: ;THUMB1-LABEL: test_D_1:
;T1POST-LABEL: test_D_1: ;T1POST-LABEL: test_D_1:
define void @test_D_1() { define void @test_D_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne ;ARM: bne
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.D, align 1 %a = alloca %struct.D, align 1
call void @use_D(%struct.D* byval align 1 %a) call void @use_D(%struct.D* align 1 byval(%struct.D) %a)
ret void ret void
} }
;ARM-LABEL: test_D_2: ;ARM-LABEL: test_D_2:
;THUMB2-LABEL: test_D_2: ;THUMB2-LABEL: test_D_2:
;NO_NEON-LABEL:test_D_2: ;NO_NEON-LABEL:test_D_2:
;THUMB1-LABEL: test_D_2: ;THUMB1-LABEL: test_D_2:
;T1POST-LABEL: test_D_2: ;T1POST-LABEL: test_D_2:
define void @test_D_2() { define void @test_D_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne ;ARM: bne
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.D, align 2 %a = alloca %struct.D, align 2
call void @use_D(%struct.D* byval align 2 %a) call void @use_D(%struct.D* align 2 byval(%struct.D) %a)
ret void ret void
} }
;ARM-LABEL: test_D_4: ;ARM-LABEL: test_D_4:
;THUMB2-LABEL: test_D_4: ;THUMB2-LABEL: test_D_4:
;NO_NEON-LABEL:test_D_4: ;NO_NEON-LABEL:test_D_4:
;THUMB1-LABEL: test_D_4: ;THUMB1-LABEL: test_D_4:
;T1POST-LABEL: test_D_4: ;T1POST-LABEL: test_D_4:
define void @test_D_4() { define void @test_D_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne ;ARM: bne
;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4 ;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.D, align 4 %a = alloca %struct.D, align 4
call void @use_D(%struct.D* byval align 4 %a) call void @use_D(%struct.D* align 4 byval(%struct.D) %a)
ret void ret void
} }
;ARM-LABEL: test_D_8: ;ARM-LABEL: test_D_8:
;THUMB2-LABEL: test_D_8: ;THUMB2-LABEL: test_D_8:
;NO_NEON-LABEL:test_D_8: ;NO_NEON-LABEL:test_D_8:
;THUMB1-LABEL: test_D_8: ;THUMB1-LABEL: test_D_8:
;T1POST-LABEL: test_D_8: ;T1POST-LABEL: test_D_8:
define void @test_D_8() { define void @test_D_8() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.D, align 8 %a = alloca %struct.D, align 8
call void @use_D(%struct.D* byval align 8 %a) call void @use_D(%struct.D* align 8 byval(%struct.D) %a)
ret void ret void
} }
;ARM-LABEL: test_D_16: ;ARM-LABEL: test_D_16:
;THUMB2-LABEL: test_D_16: ;THUMB2-LABEL: test_D_16:
;NO_NEON-LABEL:test_D_16: ;NO_NEON-LABEL:test_D_16:
;THUMB1-LABEL: test_D_16: ;THUMB1-LABEL: test_D_16:
;T1POST-LABEL: test_D_16: ;T1POST-LABEL: test_D_16:
define void @test_D_16() { define void @test_D_16() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.D, align 16 %a = alloca %struct.D, align 16
call void @use_D(%struct.D* byval align 16 %a) call void @use_D(%struct.D* align 16 byval(%struct.D) %a)
ret void ret void
} }
;ARM-LABEL: test_E_1: ;ARM-LABEL: test_E_1:
;THUMB2-LABEL: test_E_1: ;THUMB2-LABEL: test_E_1:
;NO_NEON-LABEL:test_E_1: ;NO_NEON-LABEL:test_E_1:
;THUMB1-LABEL: test_E_1: ;THUMB1-LABEL: test_E_1:
;T1POST-LABEL: test_E_1: ;T1POST-LABEL: test_E_1:
define void @test_E_1() { define void @test_E_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne ;ARM: bne
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.E, align 1 %a = alloca %struct.E, align 1
call void @use_E(%struct.E* byval align 1 %a) call void @use_E(%struct.E* align 1 byval(%struct.E) %a)
ret void ret void
} }
;ARM-LABEL: test_E_2: ;ARM-LABEL: test_E_2:
;THUMB2-LABEL: test_E_2: ;THUMB2-LABEL: test_E_2:
;NO_NEON-LABEL:test_E_2: ;NO_NEON-LABEL:test_E_2:
;THUMB1-LABEL: test_E_2: ;THUMB1-LABEL: test_E_2:
;T1POST-LABEL: test_E_2: ;T1POST-LABEL: test_E_2:
define void @test_E_2() { define void @test_E_2() {
Show All 12 Lines
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;THUMB1: bne ;THUMB1: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.E, align 2 %a = alloca %struct.E, align 2
call void @use_E(%struct.E* byval align 2 %a) call void @use_E(%struct.E* align 2 byval(%struct.E) %a)
ret void ret void
} }
;ARM-LABEL: test_E_4: ;ARM-LABEL: test_E_4:
;THUMB2-LABEL: test_E_4: ;THUMB2-LABEL: test_E_4:
;NO_NEON-LABEL:test_E_4: ;NO_NEON-LABEL:test_E_4:
;THUMB1-LABEL: test_E_4: ;THUMB1-LABEL: test_E_4:
;T1POST-LABEL: test_E_4: ;T1POST-LABEL: test_E_4:
define void @test_E_4() { define void @test_E_4() {
Show All 12 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.E, align 4 %a = alloca %struct.E, align 4
call void @use_E(%struct.E* byval align 4 %a) call void @use_E(%struct.E* align 4 byval(%struct.E) %a)
ret void ret void
} }
;ARM-LABEL: test_E_8: ;ARM-LABEL: test_E_8:
;THUMB2-LABEL: test_E_8: ;THUMB2-LABEL: test_E_8:
;NO_NEON-LABEL:test_E_8: ;NO_NEON-LABEL:test_E_8:
;THUMB1-LABEL: test_E_8: ;THUMB1-LABEL: test_E_8:
;T1POST-LABEL: test_E_8: ;T1POST-LABEL: test_E_8:
define void @test_E_8() { define void @test_E_8() {
Show All 13 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.E, align 8 %a = alloca %struct.E, align 8
call void @use_E(%struct.E* byval align 8 %a) call void @use_E(%struct.E* align 8 byval(%struct.E) %a)
ret void ret void
} }
;ARM-LABEL: test_E_16: ;ARM-LABEL: test_E_16:
;THUMB2-LABEL: test_E_16: ;THUMB2-LABEL: test_E_16:
;NO_NEON-LABEL:test_E_16: ;NO_NEON-LABEL:test_E_16:
;THUMB1-LABEL: test_E_16: ;THUMB1-LABEL: test_E_16:
;T1POST-LABEL: test_E_16: ;T1POST-LABEL: test_E_16:
define void @test_E_16() { define void @test_E_16() {
Show All 13 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.E, align 16 %a = alloca %struct.E, align 16
call void @use_E(%struct.E* byval align 16 %a) call void @use_E(%struct.E* align 16 byval(%struct.E) %a)
ret void ret void
} }
;ARM-LABEL: test_F_1: ;ARM-LABEL: test_F_1:
;THUMB2-LABEL: test_F_1: ;THUMB2-LABEL: test_F_1:
;NO_NEON-LABEL:test_F_1: ;NO_NEON-LABEL:test_F_1:
;THUMB1-LABEL: test_F_1: ;THUMB1-LABEL: test_F_1:
;T1POST-LABEL: test_F_1: ;T1POST-LABEL: test_F_1:
define void @test_F_1() { define void @test_F_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne ;ARM: bne
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.F, align 1 %a = alloca %struct.F, align 1
call void @use_F(%struct.F* byval align 1 %a) call void @use_F(%struct.F* align 1 byval(%struct.F) %a)
ret void ret void
} }
;ARM-LABEL: test_F_2: ;ARM-LABEL: test_F_2:
;THUMB2-LABEL: test_F_2: ;THUMB2-LABEL: test_F_2:
;NO_NEON-LABEL:test_F_2: ;NO_NEON-LABEL:test_F_2:
;THUMB1-LABEL: test_F_2: ;THUMB1-LABEL: test_F_2:
;T1POST-LABEL: test_F_2: ;T1POST-LABEL: test_F_2:
define void @test_F_2() { define void @test_F_2() {
Show All 12 Lines
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;THUMB1: bne ;THUMB1: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.F, align 2 %a = alloca %struct.F, align 2
call void @use_F(%struct.F* byval align 2 %a) call void @use_F(%struct.F* align 2 byval(%struct.F) %a)
ret void ret void
} }
;ARM-LABEL: test_F_4: ;ARM-LABEL: test_F_4:
;THUMB2-LABEL: test_F_4: ;THUMB2-LABEL: test_F_4:
;NO_NEON-LABEL:test_F_4: ;NO_NEON-LABEL:test_F_4:
;THUMB1-LABEL: test_F_4: ;THUMB1-LABEL: test_F_4:
;T1POST-LABEL: test_F_4: ;T1POST-LABEL: test_F_4:
define void @test_F_4() { define void @test_F_4() {
Show All 13 Lines
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.F, align 4 %a = alloca %struct.F, align 4
call void @use_F(%struct.F* byval align 4 %a) call void @use_F(%struct.F* align 4 byval(%struct.F) %a)
ret void ret void
} }
;ARM-LABEL: test_F_8: ;ARM-LABEL: test_F_8:
;THUMB2-LABEL: test_F_8: ;THUMB2-LABEL: test_F_8:
;NO_NEON-LABEL:test_F_8: ;NO_NEON-LABEL:test_F_8:
;THUMB1-LABEL: test_F_8: ;THUMB1-LABEL: test_F_8:
;T1POST-LABEL: test_F_8: ;T1POST-LABEL: test_F_8:
define void @test_F_8() { define void @test_F_8() {
Show All 14 Lines
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.F, align 8 %a = alloca %struct.F, align 8
call void @use_F(%struct.F* byval align 8 %a) call void @use_F(%struct.F* align 8 byval(%struct.F) %a)
ret void ret void
} }
;ARM-LABEL: test_F_16: ;ARM-LABEL: test_F_16:
;THUMB2-LABEL: test_F_16: ;THUMB2-LABEL: test_F_16:
;NO_NEON-LABEL:test_F_16: ;NO_NEON-LABEL:test_F_16:
;THUMB1-LABEL: test_F_16: ;THUMB1-LABEL: test_F_16:
;T1POST-LABEL: test_F_16: ;T1POST-LABEL: test_F_16:
define void @test_F_16() { define void @test_F_16() {
Show All 14 Lines
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.F, align 16 %a = alloca %struct.F, align 16
call void @use_F(%struct.F* byval align 16 %a) call void @use_F(%struct.F* align 16 byval(%struct.F) %a)
ret void ret void
} }
;ARM-LABEL: test_G_1: ;ARM-LABEL: test_G_1:
;THUMB2-LABEL: test_G_1: ;THUMB2-LABEL: test_G_1:
;NO_NEON-LABEL:test_G_1: ;NO_NEON-LABEL:test_G_1:
;THUMB1-LABEL: test_G_1: ;THUMB1-LABEL: test_G_1:
;T1POST-LABEL: test_G_1: ;T1POST-LABEL: test_G_1:
define void @test_G_1() { define void @test_G_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.G, align 1 %a = alloca %struct.G, align 1
call void @use_G(%struct.G* byval align 1 %a) call void @use_G(%struct.G* align 1 byval(%struct.G) %a)
ret void ret void
} }
;ARM-LABEL: test_G_2: ;ARM-LABEL: test_G_2:
;THUMB2-LABEL: test_G_2: ;THUMB2-LABEL: test_G_2:
;NO_NEON-LABEL:test_G_2: ;NO_NEON-LABEL:test_G_2:
;THUMB1-LABEL: test_G_2: ;THUMB1-LABEL: test_G_2:
;T1POST-LABEL: test_G_2: ;T1POST-LABEL: test_G_2:
define void @test_G_2() { define void @test_G_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.G, align 2 %a = alloca %struct.G, align 2
call void @use_G(%struct.G* byval align 2 %a) call void @use_G(%struct.G* align 2 byval(%struct.G) %a)
ret void ret void
} }
;ARM-LABEL: test_G_4: ;ARM-LABEL: test_G_4:
;THUMB2-LABEL: test_G_4: ;THUMB2-LABEL: test_G_4:
;NO_NEON-LABEL:test_G_4: ;NO_NEON-LABEL:test_G_4:
;THUMB1-LABEL: test_G_4: ;THUMB1-LABEL: test_G_4:
;T1POST-LABEL: test_G_4: ;T1POST-LABEL: test_G_4:
define void @test_G_4() { define void @test_G_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4 ;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.G, align 4 %a = alloca %struct.G, align 4
call void @use_G(%struct.G* byval align 4 %a) call void @use_G(%struct.G* align 4 byval(%struct.G) %a)
ret void ret void
} }
;ARM-LABEL: test_G_8: ;ARM-LABEL: test_G_8:
;THUMB2-LABEL: test_G_8: ;THUMB2-LABEL: test_G_8:
;NO_NEON-LABEL:test_G_8: ;NO_NEON-LABEL:test_G_8:
;THUMB1-LABEL: test_G_8: ;THUMB1-LABEL: test_G_8:
;T1POST-LABEL: test_G_8: ;T1POST-LABEL: test_G_8:
define void @test_G_8() { define void @test_G_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.G, align 8 %a = alloca %struct.G, align 8
call void @use_G(%struct.G* byval align 8 %a) call void @use_G(%struct.G* align 8 byval(%struct.G) %a)
ret void ret void
} }
;ARM-LABEL: test_G_16: ;ARM-LABEL: test_G_16:
;THUMB2-LABEL: test_G_16: ;THUMB2-LABEL: test_G_16:
;NO_NEON-LABEL:test_G_16: ;NO_NEON-LABEL:test_G_16:
;THUMB1-LABEL: test_G_16: ;THUMB1-LABEL: test_G_16:
;T1POST-LABEL: test_G_16: ;T1POST-LABEL: test_G_16:
define void @test_G_16() { define void @test_G_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.G, align 16 %a = alloca %struct.G, align 16
call void @use_G(%struct.G* byval align 16 %a) call void @use_G(%struct.G* align 16 byval(%struct.G) %a)
ret void ret void
} }
;ARM-LABEL: test_H_1: ;ARM-LABEL: test_H_1:
;THUMB2-LABEL: test_H_1: ;THUMB2-LABEL: test_H_1:
;NO_NEON-LABEL:test_H_1: ;NO_NEON-LABEL:test_H_1:
;THUMB1-LABEL: test_H_1: ;THUMB1-LABEL: test_H_1:
;T1POST-LABEL: test_H_1: ;T1POST-LABEL: test_H_1:
define void @test_H_1() { define void @test_H_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.H, align 1 %a = alloca %struct.H, align 1
call void @use_H(%struct.H* byval align 1 %a) call void @use_H(%struct.H* align 1 byval(%struct.H) %a)
ret void ret void
} }
;ARM-LABEL: test_H_2: ;ARM-LABEL: test_H_2:
;THUMB2-LABEL: test_H_2: ;THUMB2-LABEL: test_H_2:
;NO_NEON-LABEL:test_H_2: ;NO_NEON-LABEL:test_H_2:
;THUMB1-LABEL: test_H_2: ;THUMB1-LABEL: test_H_2:
;T1POST-LABEL: test_H_2: ;T1POST-LABEL: test_H_2:
define void @test_H_2() { define void @test_H_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.H, align 2 %a = alloca %struct.H, align 2
call void @use_H(%struct.H* byval align 2 %a) call void @use_H(%struct.H* align 2 byval(%struct.H) %a)
ret void ret void
} }
;ARM-LABEL: test_H_4: ;ARM-LABEL: test_H_4:
;THUMB2-LABEL: test_H_4: ;THUMB2-LABEL: test_H_4:
;NO_NEON-LABEL:test_H_4: ;NO_NEON-LABEL:test_H_4:
;THUMB1-LABEL: test_H_4: ;THUMB1-LABEL: test_H_4:
;T1POST-LABEL: test_H_4: ;T1POST-LABEL: test_H_4:
define void @test_H_4() { define void @test_H_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4 ;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.H, align 4 %a = alloca %struct.H, align 4
call void @use_H(%struct.H* byval align 4 %a) call void @use_H(%struct.H* align 4 byval(%struct.H) %a)
ret void ret void
} }
;ARM-LABEL: test_H_8: ;ARM-LABEL: test_H_8:
;THUMB2-LABEL: test_H_8: ;THUMB2-LABEL: test_H_8:
;NO_NEON-LABEL:test_H_8: ;NO_NEON-LABEL:test_H_8:
;THUMB1-LABEL: test_H_8: ;THUMB1-LABEL: test_H_8:
;T1POST-LABEL: test_H_8: ;T1POST-LABEL: test_H_8:
define void @test_H_8() { define void @test_H_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.H, align 8 %a = alloca %struct.H, align 8
call void @use_H(%struct.H* byval align 8 %a) call void @use_H(%struct.H* align 8 byval(%struct.H) %a)
ret void ret void
} }
;ARM-LABEL: test_H_16: ;ARM-LABEL: test_H_16:
;THUMB2-LABEL: test_H_16: ;THUMB2-LABEL: test_H_16:
;NO_NEON-LABEL:test_H_16: ;NO_NEON-LABEL:test_H_16:
;THUMB1-LABEL: test_H_16: ;THUMB1-LABEL: test_H_16:
;T1POST-LABEL: test_H_16: ;T1POST-LABEL: test_H_16:
define void @test_H_16() { define void @test_H_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.H, align 16 %a = alloca %struct.H, align 16
call void @use_H(%struct.H* byval align 16 %a) call void @use_H(%struct.H* align 16 byval(%struct.H) %a)
ret void ret void
} }
;ARM-LABEL: test_I_1: ;ARM-LABEL: test_I_1:
;THUMB2-LABEL: test_I_1: ;THUMB2-LABEL: test_I_1:
;NO_NEON-LABEL:test_I_1: ;NO_NEON-LABEL:test_I_1:
;THUMB1-LABEL: test_I_1: ;THUMB1-LABEL: test_I_1:
;T1POST-LABEL: test_I_1: ;T1POST-LABEL: test_I_1:
define void @test_I_1() { define void @test_I_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.I, align 1 %a = alloca %struct.I, align 1
call void @use_I(%struct.I* byval align 1 %a) call void @use_I(%struct.I* align 1 byval(%struct.I) %a)
ret void ret void
} }
;ARM-LABEL: test_I_2: ;ARM-LABEL: test_I_2:
;THUMB2-LABEL: test_I_2: ;THUMB2-LABEL: test_I_2:
;NO_NEON-LABEL:test_I_2: ;NO_NEON-LABEL:test_I_2:
;THUMB1-LABEL: test_I_2: ;THUMB1-LABEL: test_I_2:
;T1POST-LABEL: test_I_2: ;T1POST-LABEL: test_I_2:
define void @test_I_2() { define void @test_I_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.I, align 2 %a = alloca %struct.I, align 2
call void @use_I(%struct.I* byval align 2 %a) call void @use_I(%struct.I* align 2 byval(%struct.I) %a)
ret void ret void
} }
;ARM-LABEL: test_I_4: ;ARM-LABEL: test_I_4:
;THUMB2-LABEL: test_I_4: ;THUMB2-LABEL: test_I_4:
;NO_NEON-LABEL:test_I_4: ;NO_NEON-LABEL:test_I_4:
;THUMB1-LABEL: test_I_4: ;THUMB1-LABEL: test_I_4:
;T1POST-LABEL: test_I_4: ;T1POST-LABEL: test_I_4:
define void @test_I_4() { define void @test_I_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4 ;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.I, align 4 %a = alloca %struct.I, align 4
call void @use_I(%struct.I* byval align 4 %a) call void @use_I(%struct.I* align 4 byval(%struct.I) %a)
ret void ret void
} }
;ARM-LABEL: test_I_8: ;ARM-LABEL: test_I_8:
;THUMB2-LABEL: test_I_8: ;THUMB2-LABEL: test_I_8:
;NO_NEON-LABEL:test_I_8: ;NO_NEON-LABEL:test_I_8:
;THUMB1-LABEL: test_I_8: ;THUMB1-LABEL: test_I_8:
;T1POST-LABEL: test_I_8: ;T1POST-LABEL: test_I_8:
define void @test_I_8() { define void @test_I_8() {
;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;ARM: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;THUMB2: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.I, align 8 %a = alloca %struct.I, align 8
call void @use_I(%struct.I* byval align 8 %a) call void @use_I(%struct.I* align 8 byval(%struct.I) %a)
ret void ret void
} }
;ARM-LABEL: test_I_16: ;ARM-LABEL: test_I_16:
;THUMB2-LABEL: test_I_16: ;THUMB2-LABEL: test_I_16:
;NO_NEON-LABEL:test_I_16: ;NO_NEON-LABEL:test_I_16:
;THUMB1-LABEL: test_I_16: ;THUMB1-LABEL: test_I_16:
;T1POST-LABEL: test_I_16: ;T1POST-LABEL: test_I_16:
define void @test_I_16() { define void @test_I_16() {
;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;ARM: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;THUMB2: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;NO_NEON-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.I, align 16 %a = alloca %struct.I, align 16
call void @use_I(%struct.I* byval align 16 %a) call void @use_I(%struct.I* align 16 byval(%struct.I) %a)
ret void ret void
} }
;ARM-LABEL: test_J_1: ;ARM-LABEL: test_J_1:
;THUMB2-LABEL: test_J_1: ;THUMB2-LABEL: test_J_1:
;NO_NEON-LABEL:test_J_1: ;NO_NEON-LABEL:test_J_1:
;THUMB1-LABEL: test_J_1: ;THUMB1-LABEL: test_J_1:
;T1POST-LABEL: test_J_1: ;T1POST-LABEL: test_J_1:
define void @test_J_1() { define void @test_J_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne ;ARM: bne
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.J, align 1 %a = alloca %struct.J, align 1
call void @use_J(%struct.J* byval align 1 %a) call void @use_J(%struct.J* align 1 byval(%struct.J) %a)
ret void ret void
} }
;ARM-LABEL: test_J_2: ;ARM-LABEL: test_J_2:
;THUMB2-LABEL: test_J_2: ;THUMB2-LABEL: test_J_2:
;NO_NEON-LABEL:test_J_2: ;NO_NEON-LABEL:test_J_2:
;THUMB1-LABEL: test_J_2: ;THUMB1-LABEL: test_J_2:
;T1POST-LABEL: test_J_2: ;T1POST-LABEL: test_J_2:
define void @test_J_2() { define void @test_J_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne ;ARM: bne
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.J, align 2 %a = alloca %struct.J, align 2
call void @use_J(%struct.J* byval align 2 %a) call void @use_J(%struct.J* align 2 byval(%struct.J) %a)
ret void ret void
} }
;ARM-LABEL: test_J_4: ;ARM-LABEL: test_J_4:
;THUMB2-LABEL: test_J_4: ;THUMB2-LABEL: test_J_4:
;NO_NEON-LABEL:test_J_4: ;NO_NEON-LABEL:test_J_4:
;THUMB1-LABEL: test_J_4: ;THUMB1-LABEL: test_J_4:
;T1POST-LABEL: test_J_4: ;T1POST-LABEL: test_J_4:
define void @test_J_4() { define void @test_J_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne ;ARM: bne
;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4 ;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.J, align 4 %a = alloca %struct.J, align 4
call void @use_J(%struct.J* byval align 4 %a) call void @use_J(%struct.J* align 4 byval(%struct.J) %a)
ret void ret void
} }
;ARM-LABEL: test_J_8: ;ARM-LABEL: test_J_8:
;THUMB2-LABEL: test_J_8: ;THUMB2-LABEL: test_J_8:
;NO_NEON-LABEL:test_J_8: ;NO_NEON-LABEL:test_J_8:
;THUMB1-LABEL: test_J_8: ;THUMB1-LABEL: test_J_8:
;T1POST-LABEL: test_J_8: ;T1POST-LABEL: test_J_8:
define void @test_J_8() { define void @test_J_8() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.J, align 8 %a = alloca %struct.J, align 8
call void @use_J(%struct.J* byval align 8 %a) call void @use_J(%struct.J* align 8 byval(%struct.J) %a)
ret void ret void
} }
;ARM-LABEL: test_J_16: ;ARM-LABEL: test_J_16:
;THUMB2-LABEL: test_J_16: ;THUMB2-LABEL: test_J_16:
;NO_NEON-LABEL:test_J_16: ;NO_NEON-LABEL:test_J_16:
;THUMB1-LABEL: test_J_16: ;THUMB1-LABEL: test_J_16:
;T1POST-LABEL: test_J_16: ;T1POST-LABEL: test_J_16:
define void @test_J_16() { define void @test_J_16() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.J, align 16 %a = alloca %struct.J, align 16
call void @use_J(%struct.J* byval align 16 %a) call void @use_J(%struct.J* align 16 byval(%struct.J) %a)
ret void ret void
} }
;ARM-LABEL: test_K_1: ;ARM-LABEL: test_K_1:
;THUMB2-LABEL: test_K_1: ;THUMB2-LABEL: test_K_1:
;NO_NEON-LABEL:test_K_1: ;NO_NEON-LABEL:test_K_1:
;THUMB1-LABEL: test_K_1: ;THUMB1-LABEL: test_K_1:
;T1POST-LABEL: test_K_1: ;T1POST-LABEL: test_K_1:
define void @test_K_1() { define void @test_K_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne ;ARM: bne
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.K, align 1 %a = alloca %struct.K, align 1
call void @use_K(%struct.K* byval align 1 %a) call void @use_K(%struct.K* align 1 byval(%struct.K) %a)
ret void ret void
} }
;ARM-LABEL: test_K_2: ;ARM-LABEL: test_K_2:
;THUMB2-LABEL: test_K_2: ;THUMB2-LABEL: test_K_2:
;NO_NEON-LABEL:test_K_2: ;NO_NEON-LABEL:test_K_2:
;THUMB1-LABEL: test_K_2: ;THUMB1-LABEL: test_K_2:
;T1POST-LABEL: test_K_2: ;T1POST-LABEL: test_K_2:
define void @test_K_2() { define void @test_K_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne ;ARM: bne
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.K, align 2 %a = alloca %struct.K, align 2
call void @use_K(%struct.K* byval align 2 %a) call void @use_K(%struct.K* align 2 byval(%struct.K) %a)
ret void ret void
} }
;ARM-LABEL: test_K_4: ;ARM-LABEL: test_K_4:
;THUMB2-LABEL: test_K_4: ;THUMB2-LABEL: test_K_4:
;NO_NEON-LABEL:test_K_4: ;NO_NEON-LABEL:test_K_4:
;THUMB1-LABEL: test_K_4: ;THUMB1-LABEL: test_K_4:
;T1POST-LABEL: test_K_4: ;T1POST-LABEL: test_K_4:
define void @test_K_4() { define void @test_K_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne ;ARM: bne
;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4 ;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.K, align 4 %a = alloca %struct.K, align 4
call void @use_K(%struct.K* byval align 4 %a) call void @use_K(%struct.K* align 4 byval(%struct.K) %a)
ret void ret void
} }
;ARM-LABEL: test_K_8: ;ARM-LABEL: test_K_8:
;THUMB2-LABEL: test_K_8: ;THUMB2-LABEL: test_K_8:
;NO_NEON-LABEL:test_K_8: ;NO_NEON-LABEL:test_K_8:
;THUMB1-LABEL: test_K_8: ;THUMB1-LABEL: test_K_8:
;T1POST-LABEL: test_K_8: ;T1POST-LABEL: test_K_8:
define void @test_K_8() { define void @test_K_8() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.K, align 8 %a = alloca %struct.K, align 8
call void @use_K(%struct.K* byval align 8 %a) call void @use_K(%struct.K* align 8 byval(%struct.K) %a)
ret void ret void
} }
;ARM-LABEL: test_K_16: ;ARM-LABEL: test_K_16:
;THUMB2-LABEL: test_K_16: ;THUMB2-LABEL: test_K_16:
;NO_NEON-LABEL:test_K_16: ;NO_NEON-LABEL:test_K_16:
;THUMB1-LABEL: test_K_16: ;THUMB1-LABEL: test_K_16:
;T1POST-LABEL: test_K_16: ;T1POST-LABEL: test_K_16:
define void @test_K_16() { define void @test_K_16() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.K, align 16 %a = alloca %struct.K, align 16
call void @use_K(%struct.K* byval align 16 %a) call void @use_K(%struct.K* align 16 byval(%struct.K) %a)
ret void ret void
} }
;ARM-LABEL: test_L_1: ;ARM-LABEL: test_L_1:
;THUMB2-LABEL: test_L_1: ;THUMB2-LABEL: test_L_1:
;NO_NEON-LABEL:test_L_1: ;NO_NEON-LABEL:test_L_1:
;THUMB1-LABEL: test_L_1: ;THUMB1-LABEL: test_L_1:
;T1POST-LABEL: test_L_1: ;T1POST-LABEL: test_L_1:
define void @test_L_1() { define void @test_L_1() {
;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;ARM: ldrb r{{[0-9]+}}, [{{.*}}], #1
;ARM: bne ;ARM: bne
;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;THUMB2: ldrb r{{[0-9]+}}, [{{.*}}], #1
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;NO_NEON: ldrb r{{[0-9]+}}, [{{.*}}], #1
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrb r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #1 ;THUMB1: adds [[BASE]], #1
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;T1POST-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
entry: entry:
%a = alloca %struct.L, align 1 %a = alloca %struct.L, align 1
call void @use_L(%struct.L* byval align 1 %a) call void @use_L(%struct.L* align 1 byval(%struct.L) %a)
ret void ret void
} }
;ARM-LABEL: test_L_2: ;ARM-LABEL: test_L_2:
;THUMB2-LABEL: test_L_2: ;THUMB2-LABEL: test_L_2:
;NO_NEON-LABEL:test_L_2: ;NO_NEON-LABEL:test_L_2:
;THUMB1-LABEL: test_L_2: ;THUMB1-LABEL: test_L_2:
;T1POST-LABEL: test_L_2: ;T1POST-LABEL: test_L_2:
define void @test_L_2() { define void @test_L_2() {
;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;ARM: ldrh r{{[0-9]+}}, [{{.*}}], #2
;ARM: bne ;ARM: bne
;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;THUMB2: ldrh r{{[0-9]+}}, [{{.*}}], #2
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;NO_NEON: ldrh r{{[0-9]+}}, [{{.*}}], #2
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldrh r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #2 ;THUMB1: adds [[BASE]], #2
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;T1POST-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
entry: entry:
%a = alloca %struct.L, align 2 %a = alloca %struct.L, align 2
call void @use_L(%struct.L* byval align 2 %a) call void @use_L(%struct.L* align 2 byval(%struct.L) %a)
ret void ret void
} }
;ARM-LABEL: test_L_4: ;ARM-LABEL: test_L_4:
;THUMB2-LABEL: test_L_4: ;THUMB2-LABEL: test_L_4:
;NO_NEON-LABEL:test_L_4: ;NO_NEON-LABEL:test_L_4:
;THUMB1-LABEL: test_L_4: ;THUMB1-LABEL: test_L_4:
;T1POST-LABEL: test_L_4: ;T1POST-LABEL: test_L_4:
define void @test_L_4() { define void @test_L_4() {
;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4 ;ARM: ldr r{{[0-9]+}}, [{{.*}}], #4
;ARM: bne ;ARM: bne
;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4 ;THUMB2: ldr r{{[0-9]+}}, [{{.*}}], #4
;THUMB2: bne ;THUMB2: bne
;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4 ;NO_NEON: ldr r{{[0-9]+}}, [{{.*}}], #4
;NO_NEON: bne ;NO_NEON: bne
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;T1POST-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
entry: entry:
%a = alloca %struct.L, align 4 %a = alloca %struct.L, align 4
call void @use_L(%struct.L* byval align 4 %a) call void @use_L(%struct.L* align 4 byval(%struct.L) %a)
ret void ret void
} }
;ARM-LABEL: test_L_8: ;ARM-LABEL: test_L_8:
;THUMB2-LABEL: test_L_8: ;THUMB2-LABEL: test_L_8:
;NO_NEON-LABEL:test_L_8: ;NO_NEON-LABEL:test_L_8:
;THUMB1-LABEL: test_L_8: ;THUMB1-LABEL: test_L_8:
;T1POST-LABEL: test_L_8: ;T1POST-LABEL: test_L_8:
define void @test_L_8() { define void @test_L_8() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.L, align 8 %a = alloca %struct.L, align 8
call void @use_L(%struct.L* byval align 8 %a) call void @use_L(%struct.L* align 8 byval(%struct.L) %a)
ret void ret void
} }
;ARM-LABEL: test_L_16: ;ARM-LABEL: test_L_16:
;THUMB2-LABEL: test_L_16: ;THUMB2-LABEL: test_L_16:
;NO_NEON-LABEL:test_L_16: ;NO_NEON-LABEL:test_L_16:
;THUMB1-LABEL: test_L_16: ;THUMB1-LABEL: test_L_16:
;T1POST-LABEL: test_L_16: ;T1POST-LABEL: test_L_16:
define void @test_L_16() { define void @test_L_16() {
Show All 9 Lines
;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}} ;THUMB1: ldr r{{[0-9]+}}, {{\[}}[[BASE:r[0-9]+]]{{\]}}
;THUMB1: adds [[BASE]], #4 ;THUMB1: adds [[BASE]], #4
;THUMB1: bne ;THUMB1: bne
;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]! ;T1POST-NOT: vld1.32 {d{{[0-9]+}}, d{{[0-9]+}}}, [r{{.*}}]!
entry: entry:
%a = alloca %struct.L, align 16 %a = alloca %struct.L, align 16
call void @use_L(%struct.L* byval align 16 %a) call void @use_L(%struct.L* align 16 byval(%struct.L) %a)
ret void ret void
} }

test/CodeGen/BPF/byval.ll

Show All 11 Linesentry:
store i32 1, i32* %arrayinit.begin, align 8 store i32 1, i32* %arrayinit.begin, align 8
%arrayinit.element = getelementptr inbounds %struct.S, %struct.S* %.compoundliteral, i64 0, i32 0, i64 1 %arrayinit.element = getelementptr inbounds %struct.S, %struct.S* %.compoundliteral, i64 0, i32 0, i64 1
store i32 2, i32* %arrayinit.element, align 4 store i32 2, i32* %arrayinit.element, align 4
%arrayinit.element2 = getelementptr inbounds %struct.S, %struct.S* %.compoundliteral, i64 0, i32 0, i64 2 %arrayinit.element2 = getelementptr inbounds %struct.S, %struct.S* %.compoundliteral, i64 0, i32 0, i64 2
store i32 3, i32* %arrayinit.element2, align 8 store i32 3, i32* %arrayinit.element2, align 8
%arrayinit.start = getelementptr inbounds %struct.S, %struct.S* %.compoundliteral, i64 0, i32 0, i64 3 %arrayinit.start = getelementptr inbounds %struct.S, %struct.S* %.compoundliteral, i64 0, i32 0, i64 3
%scevgep4 = bitcast i32* %arrayinit.start to i8* %scevgep4 = bitcast i32* %arrayinit.start to i8*
call void @llvm.memset.p0i8.i64(i8* %scevgep4, i8 0, i64 28, i32 4, i1 false) call void @llvm.memset.p0i8.i64(i8* %scevgep4, i8 0, i64 28, i32 4, i1 false)
call void @foo(i32 %a, %struct.S* byval align 8 %.compoundliteral) #3 call void @foo(i32 %a, %struct.S* align 8 byval(%struct.S) %.compoundliteral) #3
ret void ret void
} }
declare void @foo(i32, %struct.S* byval align 8) #1 declare void @foo(i32, %struct.S* align 8 byval(%struct.S)) #1
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #3 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) #3

test/CodeGen/CPP/attributes.ll

; RUN: llc < %s -march=cpp | FileCheck %s ; RUN: llc < %s -march=cpp | FileCheck %s
define void @f1(i8* byval, i8* inalloca) { define void @f1(i8* byval(i8), i8* inalloca) {
; CHECK: ByVal ; CHECK: ByVal
; CHECK: InAlloca ; CHECK: InAlloca
ret void ret void
} }

test/CodeGen/Generic/2010-11-04-BigByval.ll

; RUN: llc < %s ; RUN: llc < %s
; PR7170 ; PR7170
%big = type [131072 x i8] %big = type [131072 x i8]
declare void @foo(%big* byval align 1) declare void @foo(%big* align 1 byval(%big))
define void @bar(%big* byval align 1 %x) { define void @bar(%big* align 1 byval(%big) %x) {
call void @foo(%big* byval align 1 %x) call void @foo(%big* align 1 byval(%big) %x)
ret void ret void
} }

test/CodeGen/Hexagon/struct_args_large.ll

; XFAIL: ; XFAIL:
; RUN: llc -march=hexagon < %s | FileCheck %s ; RUN: llc -march=hexagon < %s | FileCheck %s
; CHECK: r[[T0:[0-9]+]] = CONST32(#s2) ; CHECK: r[[T0:[0-9]+]] = CONST32(#s2)
; CHECK: memw(r29+#0) = r{{.}} ; CHECK: memw(r29+#0) = r{{.}}
; CHECK: memw(r29+#8) = r{{.}} ; CHECK: memw(r29+#8) = r{{.}}
%struct.large = type { i64, i64 } %struct.large = type { i64, i64 }
@s2 = common global %struct.large zeroinitializer, align 8 @s2 = common global %struct.large zeroinitializer, align 8
define void @foo() nounwind { define void @foo() nounwind {
entry: entry:
call void @bar(%struct.large* byval @s2) call void @bar(%struct.large* byval(%struct.large) @s2)
ret void ret void
} }
declare void @bar(%struct.large* byval) declare void @bar(%struct.large* byval(%struct.large))

test/CodeGen/MSP430/byval.ll

; RUN: llc < %s | FileCheck %s ; RUN: llc < %s | FileCheck %s
target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16" target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
target triple = "msp430---elf" target triple = "msp430---elf"
%struct.Foo = type { i16, i16, i16 } %struct.Foo = type { i16, i16, i16 }
@foo = global %struct.Foo { i16 1, i16 2, i16 3 }, align 2 @foo = global %struct.Foo { i16 1, i16 2, i16 3 }, align 2
define i16 @callee(%struct.Foo* byval %f) nounwind { define i16 @callee(%struct.Foo* byval(%struct.Foo) %f) nounwind {
entry: entry:
; CHECK-LABEL: callee: ; CHECK-LABEL: callee:
; CHECK: mov.w 2(r1), r15 ; CHECK: mov.w 2(r1), r15
%0 = getelementptr inbounds %struct.Foo, %struct.Foo* %f, i32 0, i32 0 %0 = getelementptr inbounds %struct.Foo, %struct.Foo* %f, i32 0, i32 0
%1 = load i16, i16* %0, align 2 %1 = load i16, i16* %0, align 2
ret i16 %1 ret i16 %1
} }
define void @caller() nounwind { define void @caller() nounwind {
entry: entry:
; CHECK-LABEL: caller: ; CHECK-LABEL: caller:
; CHECK: mov.w &foo+4, 4(r1) ; CHECK: mov.w &foo+4, 4(r1)
; CHECK-NEXT: mov.w &foo+2, 2(r1) ; CHECK-NEXT: mov.w &foo+2, 2(r1)
; CHECK-NEXT: mov.w &foo, 0(r1) ; CHECK-NEXT: mov.w &foo, 0(r1)
%call = call i16 @callee(%struct.Foo* byval @foo) %call = call i16 @callee(%struct.Foo* byval(%struct.Foo) @foo)
ret void ret void
} }

test/CodeGen/Mips/cprestore.ll

; DISABLE: llc -march=mipsel < %s | FileCheck %s ; DISABLE: llc -march=mipsel < %s | FileCheck %s
; RUN: false ; RUN: false
; XFAIL: * ; XFAIL: *
; CHECK: .set macro ; CHECK: .set macro
; CHECK: .set at ; CHECK: .set at
; CHECK-NEXT: .cprestore ; CHECK-NEXT: .cprestore
; CHECK: .set noat ; CHECK: .set noat
; CHECK-NEXT: .set nomacro ; CHECK-NEXT: .set nomacro
%struct.S = type { [16384 x i32] } %struct.S = type { [16384 x i32] }
define void @foo2() nounwind { define void @foo2() nounwind {
entry: entry:
%s = alloca %struct.S, align 4 %s = alloca %struct.S, align 4
call void @foo1(%struct.S* byval %s) call void @foo1(%struct.S* byval(%struct.S) %s)
ret void ret void
} }
declare void @foo1(%struct.S* byval) declare void @foo1(%struct.S* byval(%struct.S))

test/CodeGen/Mips/largeimmprinting.ll

Show All 23 Lines
; 64: daddu $sp, $sp, $[[R0]] ; 64: daddu $sp, $sp, $[[R0]]
; 64: lui $[[R1:[0-9]+]], 1 ; 64: lui $[[R1:[0-9]+]], 1
; 64: daddu $[[R1]], $sp, $[[R1]] ; 64: daddu $[[R1]], $sp, $[[R1]]
; 64: sd $ra, 24($[[R1]]) ; 64: sd $ra, 24($[[R1]])
%agg.tmp = alloca %struct.S1, align 1 %agg.tmp = alloca %struct.S1, align 1
%tmp = getelementptr inbounds %struct.S1, %struct.S1* %agg.tmp, i32 0, i32 0, i32 0 %tmp = getelementptr inbounds %struct.S1, %struct.S1* %agg.tmp, i32 0, i32 0, i32 0
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.S1, %struct.S1* @s1, i32 0, i32 0, i32 0), i32 65536, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.S1, %struct.S1* @s1, i32 0, i32 0, i32 0), i32 65536, i32 1, i1 false)
call void @f2(%struct.S1* byval %agg.tmp) nounwind call void @f2(%struct.S1* byval(%struct.S1) %agg.tmp) nounwind
ret void ret void
} }
declare void @f2(%struct.S1* byval) declare void @f2(%struct.S1* byval(%struct.S1))
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind

test/CodeGen/Mips/load-store-left-right.ll

Show First 20 Lines • Show All 426 Lines • ▼ Show 20 Lines
; MIPS64-EB-DAG: dsll $[[T1]], $[[T1]], 16 ; MIPS64-EB-DAG: dsll $[[T1]], $[[T1]], 16
; MIPS64-EB-DAG: or $[[T3:[0-9]+]], $[[R1]], $[[T1]] ; MIPS64-EB-DAG: or $[[T3:[0-9]+]], $[[R1]], $[[T1]]
; MIPS64-EB-DAG: lbu $[[R4:[0-9]+]], 6($[[PTR]]) ; MIPS64-EB-DAG: lbu $[[R4:[0-9]+]], 6($[[PTR]])
; MIPS64-EB-DAG: dsll $[[T4:[0-9]+]], $[[R4]], 8 ; MIPS64-EB-DAG: dsll $[[T4:[0-9]+]], $[[R4]], 8
; MIPS64-EB-DAG: or $4, $[[T3]], $[[T4]] ; MIPS64-EB-DAG: or $4, $[[T3]], $[[T4]]
; MIPS64R6: ld $[[SPTR:[0-9]+]], %got_disp(arr)( ; MIPS64R6: ld $[[SPTR:[0-9]+]], %got_disp(arr)(
tail call void @extern_func([7 x i8]* byval @arr) nounwind tail call void @extern_func([7 x i8]* byval([7 x i8]) @arr) nounwind
ret void ret void
} }
declare void @extern_func([7 x i8]* byval) declare void @extern_func([7 x i8]* byval([7 x i8]))

test/CodeGen/Mips/o32_cc_byval.ll

Show All 22 Lines
; CHECK-DAG: sw $[[R4]], 28($sp) ; CHECK-DAG: sw $[[R4]], 28($sp)
; CHECK-DAG: sw $[[R3]], 24($sp) ; CHECK-DAG: sw $[[R3]], 24($sp)
; CHECK-DAG: sw $[[R7]], 20($sp) ; CHECK-DAG: sw $[[R7]], 20($sp)
; CHECK-DAG: lw $[[R2:[0-9]+]], 8($[[R0]]) ; CHECK-DAG: lw $[[R2:[0-9]+]], 8($[[R0]])
; CHECK-DAG: sw $[[R2]], 16($sp) ; CHECK-DAG: sw $[[R2]], 16($sp)
; CHECK-DAG: lw $6, %lo(f1.s1)($[[R1]]) ; CHECK-DAG: lw $6, %lo(f1.s1)($[[R1]])
; CHECK-DAG: lw $7, 4($[[R0]]) ; CHECK-DAG: lw $7, 4($[[R0]])
%agg.tmp10 = alloca %struct.S3, align 4 %agg.tmp10 = alloca %struct.S3, align 4
call void @callee1(float 2.000000e+01, %struct.S1* byval bitcast (%0* @f1.s1 to %struct.S1*)) nounwind call void @callee1(float 2.000000e+01, %struct.S1* byval(%struct.S1) bitcast (%0* @f1.s1 to %struct.S1*)) nounwind
call void @callee2(%struct.S2* byval @f1.s2) nounwind call void @callee2(%struct.S2* byval(%struct.S2) @f1.s2) nounwind
%tmp11 = getelementptr inbounds %struct.S3, %struct.S3* %agg.tmp10, i32 0, i32 0 %tmp11 = getelementptr inbounds %struct.S3, %struct.S3* %agg.tmp10, i32 0, i32 0
store i8 11, i8* %tmp11, align 4 store i8 11, i8* %tmp11, align 4
call void @callee3(float 2.100000e+01, %struct.S3* byval %agg.tmp10, %struct.S1* byval bitcast (%0* @f1.s1 to %struct.S1*)) nounwind call void @callee3(float 2.100000e+01, %struct.S3* byval(%struct.S3) %agg.tmp10, %struct.S1* byval(%struct.S1) bitcast (%0* @f1.s1 to %struct.S1*)) nounwind
ret void ret void
} }
declare void @callee1(float, %struct.S1* byval) declare void @callee1(float, %struct.S1* byval(%struct.S1))
declare void @callee2(%struct.S2* byval) declare void @callee2(%struct.S2* byval(%struct.S2))
declare void @callee3(float, %struct.S3* byval, %struct.S1* byval) declare void @callee3(float, %struct.S3* byval(%struct.S3), %struct.S1* byval(%struct.S1))
define void @f2(float %f, %struct.S1* nocapture byval %s1) nounwind { define void @f2(float %f, %struct.S1* nocapture byval(%struct.S1) %s1) nounwind {
entry: entry:
; CHECK: addiu $sp, $sp, -48 ; CHECK: addiu $sp, $sp, -48
; CHECK: sw $7, 60($sp) ; CHECK: sw $7, 60($sp)
; CHECK: sw $6, 56($sp) ; CHECK: sw $6, 56($sp)
; CHECK: lw $4, 80($sp) ; CHECK: lw $4, 80($sp)
; CHECK: ldc1 $f[[F0:[0-9]+]], 72($sp) ; CHECK: ldc1 $f[[F0:[0-9]+]], 72($sp)
; CHECK: lw $[[R3:[0-9]+]], 64($sp) ; CHECK: lw $[[R3:[0-9]+]], 64($sp)
; CHECK: lw $[[R4:[0-9]+]], 68($sp) ; CHECK: lw $[[R4:[0-9]+]], 68($sp)
Show All 20 Lines; CHECK: mfc1 $6, $f[[F0]]
%c = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 0 %c = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 0
%tmp5 = load i8, i8* %c, align 1 %tmp5 = load i8, i8* %c, align 1
tail call void @callee4(i32 %tmp, double %tmp1, i64 %tmp2, i32 %tmp3, i16 signext %tmp4, i8 signext %tmp5, float %f) nounwind tail call void @callee4(i32 %tmp, double %tmp1, i64 %tmp2, i32 %tmp3, i16 signext %tmp4, i8 signext %tmp5, float %f) nounwind
ret void ret void
} }
declare void @callee4(i32, double, i64, i32, i16 signext, i8 signext, float) declare void @callee4(i32, double, i64, i32, i16 signext, i8 signext, float)
define void @f3(%struct.S2* nocapture byval %s2) nounwind { define void @f3(%struct.S2* nocapture byval(%struct.S2) %s2) nounwind {
entry: entry:
; CHECK: addiu $sp, $sp, -48 ; CHECK: addiu $sp, $sp, -48
; CHECK: sw $7, 60($sp) ; CHECK: sw $7, 60($sp)
; CHECK: sw $6, 56($sp) ; CHECK: sw $6, 56($sp)
; CHECK: sw $5, 52($sp) ; CHECK: sw $5, 52($sp)
; CHECK: sw $4, 48($sp) ; CHECK: sw $4, 48($sp)
; CHECK: lw $4, 48($sp) ; CHECK: lw $4, 48($sp)
; CHECK: lw $[[R0:[0-9]+]], 60($sp) ; CHECK: lw $[[R0:[0-9]+]], 60($sp)
; CHECK: sw $[[R0]], 24($sp) ; CHECK: sw $[[R0]], 24($sp)
%arrayidx = getelementptr inbounds %struct.S2, %struct.S2* %s2, i32 0, i32 0, i32 0 %arrayidx = getelementptr inbounds %struct.S2, %struct.S2* %s2, i32 0, i32 0, i32 0
%tmp = load i32, i32* %arrayidx, align 4 %tmp = load i32, i32* %arrayidx, align 4
%arrayidx2 = getelementptr inbounds %struct.S2, %struct.S2* %s2, i32 0, i32 0, i32 3 %arrayidx2 = getelementptr inbounds %struct.S2, %struct.S2* %s2, i32 0, i32 0, i32 3
%tmp3 = load i32, i32* %arrayidx2, align 4 %tmp3 = load i32, i32* %arrayidx2, align 4
tail call void @callee4(i32 %tmp, double 2.000000e+00, i64 3, i32 %tmp3, i16 signext 4, i8 signext 5, float 6.000000e+00) nounwind tail call void @callee4(i32 %tmp, double 2.000000e+00, i64 3, i32 %tmp3, i16 signext 4, i8 signext 5, float 6.000000e+00) nounwind
ret void ret void
} }
define void @f4(float %f, %struct.S3* nocapture byval %s3, %struct.S1* nocapture byval %s1) nounwind { define void @f4(float %f, %struct.S3* nocapture byval(%struct.S3) %s3, %struct.S1* nocapture byval(%struct.S1) %s1) nounwind {
entry: entry:
; CHECK: addiu $sp, $sp, -48 ; CHECK: addiu $sp, $sp, -48
; CHECK: sw $7, 60($sp) ; CHECK: sw $7, 60($sp)
; CHECK: sw $6, 56($sp) ; CHECK: sw $6, 56($sp)
; CHECK: sw $5, 52($sp) ; CHECK: sw $5, 52($sp)
; CHECK: lw $4, 60($sp) ; CHECK: lw $4, 60($sp)
; CHECK: lw $[[R1:[0-9]+]], 80($sp) ; CHECK: lw $[[R1:[0-9]+]], 80($sp)
; CHECK: lb $[[R0:[0-9]+]], 52($sp) ; CHECK: lb $[[R0:[0-9]+]], 52($sp)
; CHECK: sw $[[R0]], 32($sp) ; CHECK: sw $[[R0]], 32($sp)
; CHECK: sw $[[R1]], 24($sp) ; CHECK: sw $[[R1]], 24($sp)
%i = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 2 %i = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 2
%tmp = load i32, i32* %i, align 4 %tmp = load i32, i32* %i, align 4
%i2 = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 5 %i2 = getelementptr inbounds %struct.S1, %struct.S1* %s1, i32 0, i32 5
%tmp1 = load i32, i32* %i2, align 4 %tmp1 = load i32, i32* %i2, align 4
%c = getelementptr inbounds %struct.S3, %struct.S3* %s3, i32 0, i32 0 %c = getelementptr inbounds %struct.S3, %struct.S3* %s3, i32 0, i32 0
%tmp2 = load i8, i8* %c, align 1 %tmp2 = load i8, i8* %c, align 1
tail call void @callee4(i32 %tmp, double 2.000000e+00, i64 3, i32 %tmp1, i16 signext 4, i8 signext %tmp2, float 6.000000e+00) nounwind tail call void @callee4(i32 %tmp, double 2.000000e+00, i64 3, i32 %tmp1, i16 signext 4, i8 signext %tmp2, float 6.000000e+00) nounwind
ret void ret void
} }
%struct.S4 = type { [4 x i32] } %struct.S4 = type { [4 x i32] }
define void @f5(i64 %a0, %struct.S4* nocapture byval %a1) nounwind { define void @f5(i64 %a0, %struct.S4* nocapture byval(%struct.S4) %a1) nounwind {
entry: entry:
tail call void @f6(%struct.S4* byval %a1, i64 %a0) nounwind tail call void @f6(%struct.S4* byval(%struct.S4) %a1, i64 %a0) nounwind
ret void ret void
} }
declare void @f6(%struct.S4* nocapture byval, i64) declare void @f6(%struct.S4* nocapture byval(%struct.S4), i64)

test/CodeGen/Mips/tailcall.ll

Show First 20 Lines • Show All 138 Lines • ▼ Show 20 Lines; PIC16: .end caller8_1
%call = tail call i32 (i32, ...) @callee8(i32 2, i32 1) nounwind %call = tail call i32 (i32, ...) @callee8(i32 2, i32 1) nounwind
ret i32 %call ret i32 %call
} }
%struct.S = type { [2 x i32] } %struct.S = type { [2 x i32] }
@gs1 = external global %struct.S @gs1 = external global %struct.S
declare i32 @callee9(%struct.S* byval) declare i32 @callee9(%struct.S* byval(%struct.S))
define i32 @caller9_0() nounwind { define i32 @caller9_0() nounwind {
entry: entry:
%call = tail call fastcc i32 @caller9_1() %call = tail call fastcc i32 @caller9_1()
ret i32 %call ret i32 %call
} }
define internal fastcc i32 @caller9_1() nounwind noinline { define internal fastcc i32 @caller9_1() nounwind noinline {
entry: entry:
; PIC32: .ent caller9_1 ; PIC32: .ent caller9_1
; PIC32: jalr ; PIC32: jalr
; PIC32: .end caller9_1 ; PIC32: .end caller9_1
; STATIC32: .ent caller9_1 ; STATIC32: .ent caller9_1
; STATIC32: jal ; STATIC32: jal
; STATIC32: .end caller9_1 ; STATIC32: .end caller9_1
; N64: .ent caller9_1 ; N64: .ent caller9_1
; N64: jalr ; N64: jalr
; N64: .end caller9_1 ; N64: .end caller9_1
; PIC16: .ent caller9_1 ; PIC16: .ent caller9_1
; PIC16: jalrc ; PIC16: jalrc
; PIC16: .end caller9_1 ; PIC16: .end caller9_1
%call = tail call i32 @callee9(%struct.S* byval @gs1) nounwind %call = tail call i32 @callee9(%struct.S* byval(%struct.S) @gs1) nounwind
ret i32 %call ret i32 %call
} }
declare i32 @callee10(i32, i32, i32, i32, i32, i32, i32, i32, i32) declare i32 @callee10(i32, i32, i32, i32, i32, i32, i32, i32, i32)
define i32 @caller10(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) nounwind { define i32 @caller10(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) nounwind {
entry: entry:
; PIC32: .ent caller10 ; PIC32: .ent caller10
; PIC32-NOT: jalr ; PIC32-NOT: jalr
; STATIC32: .ent caller10 ; STATIC32: .ent caller10
; STATIC32-NOT: jal ; STATIC32-NOT: jal
; N64: .ent caller10 ; N64: .ent caller10
; N64-NOT: jalr ; N64-NOT: jalr
; PIC16: .ent caller10 ; PIC16: .ent caller10
; PIC16: jalrc ; PIC16: jalrc
%call = tail call i32 @callee10(i32 %a8, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind %call = tail call i32 @callee10(i32 %a8, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind
ret i32 %call ret i32 %call
} }
declare i32 @callee11(%struct.S* byval) declare i32 @callee11(%struct.S* byval(%struct.S))
define i32 @caller11() nounwind noinline { define i32 @caller11() nounwind noinline {
entry: entry:
; PIC32: .ent caller11 ; PIC32: .ent caller11
; PIC32: jalr ; PIC32: jalr
; STATIC32: .ent caller11 ; STATIC32: .ent caller11
; STATIC32: jal ; STATIC32: jal
; N64: .ent caller11 ; N64: .ent caller11
; N64: jalr ; N64: jalr
; PIC16: .ent caller11 ; PIC16: .ent caller11
; PIC16: jalrc ; PIC16: jalrc
%call = tail call i32 @callee11(%struct.S* byval @gs1) nounwind %call = tail call i32 @callee11(%struct.S* byval(%struct.S) @gs1) nounwind
ret i32 %call ret i32 %call
} }
declare i32 @callee12() declare i32 @callee12()
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
define i32 @caller12(%struct.S* nocapture byval %a0) nounwind { define i32 @caller12(%struct.S* nocapture byval(%struct.S) %a0) nounwind {
entry: entry:
; PIC32: .ent caller12 ; PIC32: .ent caller12
; PIC32: jalr ; PIC32: jalr
; STATIC32: .ent caller12 ; STATIC32: .ent caller12
; STATIC32: jal ; STATIC32: jal
; N64: .ent caller12 ; N64: .ent caller12
; N64: jalr ; N64: jalr
; PIC16: .ent caller12 ; PIC16: .ent caller12
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test/CodeGen/Mips/unalignedload.ll

Show All 24 Lines
; MIPS32-EB-DAG: lbu $[[PART1:[0-9]+]], 2($[[R0]]) ; MIPS32-EB-DAG: lbu $[[PART1:[0-9]+]], 2($[[R0]])
; MIPS32-EB-DAG: lbu $[[PART2:[0-9]+]], 3($[[R0]]) ; MIPS32-EB-DAG: lbu $[[PART2:[0-9]+]], 3($[[R0]])
; MIPS32-EB-DAG: sll $[[T0:[0-9]+]], $[[PART1]], 8 ; MIPS32-EB-DAG: sll $[[T0:[0-9]+]], $[[PART1]], 8
; MIPS32-EB-DAG: or $[[T1:[0-9]+]], $[[T0]], $[[PART2]] ; MIPS32-EB-DAG: or $[[T1:[0-9]+]], $[[T0]], $[[PART2]]
; MIPS32-EB-DAG: sll $4, $[[T1]], 16 ; MIPS32-EB-DAG: sll $4, $[[T1]], 16
; MIPS32R6-DAG: lhu $[[PART1:[0-9]+]], 2($[[R0]]) ; MIPS32R6-DAG: lhu $[[PART1:[0-9]+]], 2($[[R0]])
tail call void @foo2(%struct.S1* byval getelementptr inbounds (%struct.S2, %struct.S2* @s2, i32 0, i32 1)) nounwind tail call void @foo2(%struct.S1* byval(%struct.S1) getelementptr inbounds (%struct.S2, %struct.S2* @s2, i32 0, i32 1)) nounwind
ret void ret void
} }
define void @bar2() nounwind { define void @bar2() nounwind {
entry: entry:
; ALL-LABEL: bar2: ; ALL-LABEL: bar2:
; ALL-DAG: lw $[[R2:[0-9]+]], %got(s4)( ; ALL-DAG: lw $[[R2:[0-9]+]], %got(s4)(
Show All 29 Lines
; FIXME: We should be able to do better than this using lhu ; FIXME: We should be able to do better than this using lhu
; MIPS32R6-EB-DAG: lw $4, 0($[[R2]]) ; MIPS32R6-EB-DAG: lw $4, 0($[[R2]])
; MIPS32R6-EB-DAG: lhu $[[T0:[0-9]+]], 4($[[R2]]) ; MIPS32R6-EB-DAG: lhu $[[T0:[0-9]+]], 4($[[R2]])
; MIPS32R6-EB-DAG: lbu $[[T1:[0-9]+]], 6($[[R2]]) ; MIPS32R6-EB-DAG: lbu $[[T1:[0-9]+]], 6($[[R2]])
; MIPS32R6-EB-DAG: sll $[[T2:[0-9]+]], $[[T0]], 16 ; MIPS32R6-EB-DAG: sll $[[T2:[0-9]+]], $[[T0]], 16
; MIPS32R6-EB-DAG: sll $[[T3:[0-9]+]], $[[T1]], 8 ; MIPS32R6-EB-DAG: sll $[[T3:[0-9]+]], $[[T1]], 8
; MIPS32R6-EB-DAG: or $5, $[[T2]], $[[T3]] ; MIPS32R6-EB-DAG: or $5, $[[T2]], $[[T3]]
tail call void @foo4(%struct.S4* byval @s4) nounwind tail call void @foo4(%struct.S4* byval(%struct.S4) @s4) nounwind
ret void ret void
} }
declare void @foo2(%struct.S1* byval) declare void @foo2(%struct.S1* byval(%struct.S1))
declare void @foo4(%struct.S4* byval) declare void @foo4(%struct.S4* byval(%struct.S4))

test/CodeGen/NVPTX/bug21465.ll

; RUN: opt < %s -nvptx-lower-kernel-args -S | FileCheck %s ; RUN: opt < %s -nvptx-lower-kernel-args -S | FileCheck %s
; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
target triple = "nvptx64-unknown-unknown" target triple = "nvptx64-unknown-unknown"
%struct.S = type { i32, i32 } %struct.S = type { i32, i32 }
; Function Attrs: nounwind ; Function Attrs: nounwind
define void @_Z11TakesStruct1SPi(%struct.S* byval nocapture readonly %input, i32* nocapture %output) #0 { define void @_Z11TakesStruct1SPi(%struct.S* nocapture readonly byval(%struct.S) %input, i32* nocapture %output) #0 {
entry: entry:
; CHECK-LABEL: @_Z11TakesStruct1SPi ; CHECK-LABEL: @_Z11TakesStruct1SPi
; PTX-LABEL: .visible .entry _Z11TakesStruct1SPi( ; PTX-LABEL: .visible .entry _Z11TakesStruct1SPi(
; CHECK: addrspacecast %struct.S* %input to %struct.S addrspace(101)* ; CHECK: addrspacecast %struct.S* %input to %struct.S addrspace(101)*
%b = getelementptr inbounds %struct.S, %struct.S* %input, i64 0, i32 1 %b = getelementptr inbounds %struct.S, %struct.S* %input, i64 0, i32 1
%0 = load i32, i32* %b, align 4 %0 = load i32, i32* %b, align 4
; PTX-NOT: ld.param.u32 {{%r[0-9]+}}, [{{%rd[0-9]+}}] ; PTX-NOT: ld.param.u32 {{%r[0-9]+}}, [{{%rd[0-9]+}}]
; PTX: ld.param.u32 [[value:%r[0-9]+]], [{{%rd[0-9]+}}+4] ; PTX: ld.param.u32 [[value:%r[0-9]+]], [{{%rd[0-9]+}}+4]
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test/CodeGen/NVPTX/lower-kernel-ptr-arg.ll

Show All 22 Lines
; CHECK: ld.global.f32 ; CHECK: ld.global.f32
store float %1, float addrspace(1)* %output, align 4 store float %1, float addrspace(1)* %output, align 4
; CHECK: st.global.f32 ; CHECK: st.global.f32
ret void ret void
} }
%struct.S = type { i32*, i32* } %struct.S = type { i32*, i32* }
define void @ptr_in_byval(%struct.S* byval %input, i32* %output) { define void @ptr_in_byval(%struct.S* byval(%struct.S) %input, i32* %output) {
; CHECK-LABEL: .visible .entry ptr_in_byval( ; CHECK-LABEL: .visible .entry ptr_in_byval(
; CHECK: cvta.to.global.u64 ; CHECK: cvta.to.global.u64
; CHECK: cvta.to.global.u64 ; CHECK: cvta.to.global.u64
%b_ptr = getelementptr inbounds %struct.S, %struct.S* %input, i64 0, i32 1 %b_ptr = getelementptr inbounds %struct.S, %struct.S* %input, i64 0, i32 1
%b = load i32*, i32** %b_ptr, align 4 %b = load i32*, i32** %b_ptr, align 4
%v = load i32, i32* %b, align 4 %v = load i32, i32* %b, align 4
; CHECK: ld.global.u32 ; CHECK: ld.global.u32
store i32 %v, i32* %output, align 4 store i32 %v, i32* %output, align 4
; CHECK: st.global.u32 ; CHECK: st.global.u32
ret void ret void
} }
!nvvm.annotations = !{!0, !1, !2} !nvvm.annotations = !{!0, !1, !2}
!0 = !{void (float*, float*)* @kernel, !"kernel", i32 1} !0 = !{void (float*, float*)* @kernel, !"kernel", i32 1}
!1 = !{void (float addrspace(1)*, float addrspace(1)*)* @kernel2, !"kernel", i32 1} !1 = !{void (float addrspace(1)*, float addrspace(1)*)* @kernel2, !"kernel", i32 1}
!2 = !{void (%struct.S*, i32*)* @ptr_in_byval, !"kernel", i32 1} !2 = !{void (%struct.S*, i32*)* @ptr_in_byval, !"kernel", i32 1}

test/CodeGen/NVPTX/param-align.ll

; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
;;; Need 4-byte alignment on float* passed byval ;;; Need 4-byte alignment on float* passed byval
define ptx_device void @t1(float* byval %x) { define ptx_device void @t1(float* byval(float) %x) {
; CHECK: .func t1 ; CHECK: .func t1
; CHECK: .param .align 4 .b8 t1_param_0[4] ; CHECK: .param .align 4 .b8 t1_param_0[4]
ret void ret void
} }
;;; Need 8-byte alignment on double* passed byval ;;; Need 8-byte alignment on double* passed byval
define ptx_device void @t2(double* byval %x) { define ptx_device void @t2(double* byval(double) %x) {
; CHECK: .func t2 ; CHECK: .func t2
; CHECK: .param .align 8 .b8 t2_param_0[8] ; CHECK: .param .align 8 .b8 t2_param_0[8]
ret void ret void
} }
;;; Need 4-byte alignment on float2* passed byval ;;; Need 4-byte alignment on float2* passed byval
%struct.float2 = type { float, float } %struct.float2 = type { float, float }
define ptx_device void @t3(%struct.float2* byval %x) { define ptx_device void @t3(%struct.float2* byval(%struct.float2) %x) {
; CHECK: .func t3 ; CHECK: .func t3
; CHECK: .param .align 4 .b8 t3_param_0[8] ; CHECK: .param .align 4 .b8 t3_param_0[8]
ret void ret void
} }

test/CodeGen/PowerPC/a2-fp-basic.ll

; RUN: llc < %s -march=ppc64 -mcpu=a2 -fp-contract=fast | FileCheck %s ; RUN: llc < %s -march=ppc64 -mcpu=a2 -fp-contract=fast | FileCheck %s
%0 = type { double, double } %0 = type { double, double }
define void @maybe_an_fma(%0* sret %agg.result, %0* byval %a, %0* byval %b, %0* byval %c) nounwind { define void @maybe_an_fma(%0* sret %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
entry: entry:
%a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0 %a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0
%a.real = load double, double* %a.realp %a.real = load double, double* %a.realp
%a.imagp = getelementptr inbounds %0, %0* %a, i32 0, i32 1 %a.imagp = getelementptr inbounds %0, %0* %a, i32 0, i32 1
%a.imag = load double, double* %a.imagp %a.imag = load double, double* %a.imagp
%b.realp = getelementptr inbounds %0, %0* %b, i32 0, i32 0 %b.realp = getelementptr inbounds %0, %0* %b, i32 0, i32 0
%b.real = load double, double* %b.realp %b.real = load double, double* %b.realp
%b.imagp = getelementptr inbounds %0, %0* %b, i32 0, i32 1 %b.imagp = getelementptr inbounds %0, %0* %b, i32 0, i32 1
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test/CodeGen/PowerPC/anon_aggr.ll

Show First 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; DARWIN64: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]] ; DARWIN64: mr r[[REG2:[0-9]+]], r[[REGB:[0-9]+]]
; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGA]], r[[REGB]] ; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGA]], r[[REGB]]
; DARWIN64: std r[[REG1]], -[[OFFSET1:[0-9]+]] ; DARWIN64: std r[[REG1]], -[[OFFSET1:[0-9]+]]
; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]] ; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]]
; DARWIN64: ld r3, -[[OFFSET1]] ; DARWIN64: ld r3, -[[OFFSET1]]
; DARWIN64: ld r3, -[[OFFSET2]] ; DARWIN64: ld r3, -[[OFFSET2]]
define i8* @func2({ i64, i8* } %array1, %tarray* byval %array2) { define i8* @func2({ i64, i8* } %array1, %tarray* byval(%tarray) %array2) {
entry: entry:
%array1_ptr = extractvalue {i64, i8* } %array1, 1 %array1_ptr = extractvalue {i64, i8* } %array1, 1
%tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1 %tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1
%array2_ptr = load i8*, i8** %tmp %array2_ptr = load i8*, i8** %tmp
%cond = icmp eq i8* %array1_ptr, %array2_ptr %cond = icmp eq i8* %array1_ptr, %array2_ptr
br i1 %cond, label %equal, label %unequal br i1 %cond, label %equal, label %unequal
equal: equal:
ret i8* %array1_ptr ret i8* %array1_ptr
Show All 26 Lines
; DARWIN64: mr r[[REG3:[0-9]+]], r[[REGA:[0-9]+]] ; DARWIN64: mr r[[REG3:[0-9]+]], r[[REGA:[0-9]+]]
; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGA]], r[[REG2]] ; DARWIN64: cmpld {{(cr[0-9]+,)?}}r[[REGA]], r[[REG2]]
; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]] ; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]]
; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]] ; DARWIN64: std r[[REG2]], -[[OFFSET2:[0-9]+]]
; DARWIN64: ld r3, -[[OFFSET1]] ; DARWIN64: ld r3, -[[OFFSET1]]
; DARWIN64: ld r3, -[[OFFSET2]] ; DARWIN64: ld r3, -[[OFFSET2]]
define i8* @func3({ i64, i8* }* byval %array1, %tarray* byval %array2) { define i8* @func3({ i64, i8* }* byval({ i64, i8* }) %array1, %tarray* byval(%tarray) %array2) {
entry: entry:
%tmp1 = getelementptr inbounds { i64, i8* }, { i64, i8* }* %array1, i32 0, i32 1 %tmp1 = getelementptr inbounds { i64, i8* }, { i64, i8* }* %array1, i32 0, i32 1
%array1_ptr = load i8*, i8** %tmp1 %array1_ptr = load i8*, i8** %tmp1
%tmp2 = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1 %tmp2 = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1
%array2_ptr = load i8*, i8** %tmp2 %array2_ptr = load i8*, i8** %tmp2
%cond = icmp eq i8* %array1_ptr, %array2_ptr %cond = icmp eq i8* %array1_ptr, %array2_ptr
br i1 %cond, label %equal, label %unequal br i1 %cond, label %equal, label %unequal
equal: equal:
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; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]] ; DARWIN64: std r[[REG3]], -[[OFFSET1:[0-9]+]]
; DARWIN64: std r[[REG4]], -[[OFFSET2:[0-9]+]] ; DARWIN64: std r[[REG4]], -[[OFFSET2:[0-9]+]]
; DARWIN64: ld r3, -[[OFFSET2]] ; DARWIN64: ld r3, -[[OFFSET2]]
; DARWIN64: ld r3, -[[OFFSET1]] ; DARWIN64: ld r3, -[[OFFSET1]]
define i8* @func4(i64 %p1, i64 %p2, i64 %p3, i64 %p4, define i8* @func4(i64 %p1, i64 %p2, i64 %p3, i64 %p4,
i64 %p5, i64 %p6, i64 %p7, i64 %p8, i64 %p5, i64 %p6, i64 %p7, i64 %p8,
{ i64, i8* } %array1, %tarray* byval %array2) { { i64, i8* } %array1, %tarray* byval(%tarray) %array2) {
entry: entry:
%array1_ptr = extractvalue {i64, i8* } %array1, 1 %array1_ptr = extractvalue {i64, i8* } %array1, 1
%tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1 %tmp = getelementptr inbounds %tarray, %tarray* %array2, i32 0, i32 1
%array2_ptr = load i8*, i8** %tmp %array2_ptr = load i8*, i8** %tmp
%cond = icmp eq i8* %array1_ptr, %array2_ptr %cond = icmp eq i8* %array1_ptr, %array2_ptr
br i1 %cond, label %equal, label %unequal br i1 %cond, label %equal, label %unequal
equal: equal:
ret i8* %array1_ptr ret i8* %array1_ptr
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test/CodeGen/PowerPC/byval-agg-info.ll

; RUN: llc < %s -print-after=prologepilog >%t 2>&1 && FileCheck <%t %s ; RUN: llc < %s -print-after=prologepilog >%t 2>&1 && FileCheck <%t %s
target datalayout = "E-m:e-i64:64-n32:64" target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.anon = type { i32, i32 } %struct.anon = type { i32, i32 }
declare void @foo(%struct.anon* %v) declare void @foo(%struct.anon* %v)
define void @test(i32 %a, i32 %b, %struct.anon* byval nocapture %v) { define void @test(i32 %a, i32 %b, %struct.anon* nocapture byval(%struct.anon) %v) {
entry: entry:
call void @foo(%struct.anon* %v) call void @foo(%struct.anon* %v)
ret void ret void
} }
; Make sure that the MMO on the store has no offset from the byval ; Make sure that the MMO on the store has no offset from the byval
; variable itself (we used to have mem:ST8[%v+64]). ; variable itself (we used to have mem:ST8[%v+64]).
; CHECK: STD %X5<kill>, 176, %X1; mem:ST8[%v](align=16) ; CHECK: STD %X5<kill>, 176, %X1; mem:ST8[%v](align=16)

test/CodeGen/PowerPC/byval-aliased.ll

; RUN: llc -mcpu=ppc64 < %s | FileCheck %s ; RUN: llc -mcpu=ppc64 < %s | FileCheck %s
target datalayout = "E-m:o-p:32:32-f64:32:64-n32" target datalayout = "E-m:o-p:32:32-f64:32:64-n32"
target triple = "powerpc-apple-macosx10.5.0" target triple = "powerpc-apple-macosx10.5.0"
%struct.sm = type { i8, i8 } %struct.sm = type { i8, i8 }
; Function Attrs: nounwind ssp ; Function Attrs: nounwind ssp
define void @foo(%struct.sm* byval %s) #0 { define void @foo(%struct.sm* byval(%struct.sm) %s) #0 {
entry: entry:
%a = getelementptr inbounds %struct.sm, %struct.sm* %s, i32 0, i32 0 %a = getelementptr inbounds %struct.sm, %struct.sm* %s, i32 0, i32 0
%0 = load i8, i8* %a, align 1 %0 = load i8, i8* %a, align 1
%conv2 = zext i8 %0 to i32 %conv2 = zext i8 %0 to i32
%add = add nuw nsw i32 %conv2, 3 %add = add nuw nsw i32 %conv2, 3
%conv1 = trunc i32 %add to i8 %conv1 = trunc i32 %add to i8
store i8 %conv1, i8* %a, align 1 store i8 %conv1, i8* %a, align 1
call void @bar(%struct.sm* byval %s, %struct.sm* byval %s) #1 call void @bar(%struct.sm* byval(%struct.sm) %s, %struct.sm* byval(%struct.sm) %s) #1
ret void ret void
} }
; CHECK-LABEL: @foo ; CHECK-LABEL: @foo
; CHECK: stb {{r[0-9]+}}, [[OFF:[0-9]+]]({{r[3]?1}}) ; CHECK: stb {{r[0-9]+}}, [[OFF:[0-9]+]]({{r[3]?1}})
; CHECK: lhz r3, [[OFF]]({{r[3]?1}}) ; CHECK: lhz r3, [[OFF]]({{r[3]?1}})
; CHECK: bl _bar ; CHECK: bl _bar
; CHECK: blr ; CHECK: blr
declare void @bar(%struct.sm* byval, %struct.sm* byval) declare void @bar(%struct.sm* byval(%struct.sm), %struct.sm* byval(%struct.sm))
attributes #0 = { nounwind ssp } attributes #0 = { nounwind ssp }
attributes #1 = { nounwind } attributes #1 = { nounwind }

test/CodeGen/PowerPC/dyn-alloca-aligned.ll

; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.s = type { i32, i32 } %struct.s = type { i32, i32 }
declare void @bar(i32*, i32*) #0 declare void @bar(i32*, i32*) #0
define void @goo(%struct.s* byval nocapture readonly %a, i32 signext %n) #0 { define void @goo(%struct.s* nocapture readonly byval(%struct.s) %a, i32 signext %n) #0 {
entry: entry:
%0 = zext i32 %n to i64 %0 = zext i32 %n to i64
%vla = alloca i32, i64 %0, align 128 %vla = alloca i32, i64 %0, align 128
%vla1 = alloca i32, i64 %0, align 128 %vla1 = alloca i32, i64 %0, align 128
%a2 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 %a2 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0
%1 = load i32, i32* %a2, align 4 %1 = load i32, i32* %a2, align 4
store i32 %1, i32* %vla1, align 128 store i32 %1, i32* %vla1, align 128
%b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1
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test/CodeGen/PowerPC/emptystruct.ll

; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false < %s | FileCheck %s ; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false < %s | FileCheck %s
; This tests correct handling of empty aggregate parameters and return values. ; This tests correct handling of empty aggregate parameters and return values.
; An empty parameter passed by value does not consume a protocol register or ; An empty parameter passed by value does not consume a protocol register or
; a parameter save area doubleword. An empty parameter passed by reference ; a parameter save area doubleword. An empty parameter passed by reference
; is treated as any other pointer parameter. An empty aggregate return value ; is treated as any other pointer parameter. An empty aggregate return value
; is treated as any other aggregate return value, passed via address as a ; is treated as any other aggregate return value, passed via address as a
; hidden parameter in GPR3. In this example, GPR3 contains the return value ; hidden parameter in GPR3. In this example, GPR3 contains the return value
; address, GPR4 contains the address of e2, and e1 and e3 are not passed or ; address, GPR4 contains the address of e2, and e1 and e3 are not passed or
; received. ; received.
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.empty = type {} %struct.empty = type {}
define void @callee(%struct.empty* noalias sret %agg.result, %struct.empty* byval %a1, %struct.empty* %a2, %struct.empty* byval %a3) nounwind { define void @callee(%struct.empty* noalias sret %agg.result, %struct.empty* byval(%struct.empty) %a1, %struct.empty* %a2, %struct.empty* byval(%struct.empty) %a3) nounwind {
entry: entry:
%a2.addr = alloca %struct.empty*, align 8 %a2.addr = alloca %struct.empty*, align 8
store %struct.empty* %a2, %struct.empty** %a2.addr, align 8 store %struct.empty* %a2, %struct.empty** %a2.addr, align 8
%0 = load %struct.empty*, %struct.empty** %a2.addr, align 8 %0 = load %struct.empty*, %struct.empty** %a2.addr, align 8
%1 = bitcast %struct.empty* %agg.result to i8* %1 = bitcast %struct.empty* %agg.result to i8*
%2 = bitcast %struct.empty* %0 to i8* %2 = bitcast %struct.empty* %0 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* %2, i64 0, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* %2, i64 0, i32 1, i1 false)
ret void ret void
} }
; CHECK-LABEL: callee: ; CHECK-LABEL: callee:
; CHECK: std 4, ; CHECK: std 4,
; CHECK-NOT: std 5, ; CHECK-NOT: std 5,
; CHECK-NOT: std 6, ; CHECK-NOT: std 6,
; CHECK: blr ; CHECK: blr
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
define void @caller(%struct.empty* noalias sret %agg.result) nounwind { define void @caller(%struct.empty* noalias sret %agg.result) nounwind {
entry: entry:
%e1 = alloca %struct.empty, align 1 %e1 = alloca %struct.empty, align 1
%e2 = alloca %struct.empty, align 1 %e2 = alloca %struct.empty, align 1
%e3 = alloca %struct.empty, align 1 %e3 = alloca %struct.empty, align 1
call void @callee(%struct.empty* sret %agg.result, %struct.empty* byval %e1, %struct.empty* %e2, %struct.empty* byval %e3) call void @callee(%struct.empty* sret %agg.result, %struct.empty* byval(%struct.empty) %e1, %struct.empty* %e2, %struct.empty* byval(%struct.empty) %e3)
ret void ret void
} }
; CHECK-LABEL: caller: ; CHECK-LABEL: caller:
; CHECK: addi 4, ; CHECK: addi 4,
; CHECK-NOT: std 5, ; CHECK-NOT: std 5,
; CHECK-NOT: std 6, ; CHECK-NOT: std 6,
; CHECK: bl callee ; CHECK: bl callee

test/CodeGen/PowerPC/glob-comp-aa-crash.ll

Show All 30 Linesentry:
call void @_ZNSt3__15mutex4lockEv(%"class.std::__1::mutex"* %__mut_) #4 call void @_ZNSt3__15mutex4lockEv(%"class.std::__1::mutex"* %__mut_) #4
invoke void @_ZNSt3__117__assoc_sub_state10__sub_waitERNS_11unique_lockINS_5mutexEEE(%"class.std::__1::__assoc_sub_state"* %this, %"class.std::__1::unique_lock"* %__lk) #4 invoke void @_ZNSt3__117__assoc_sub_state10__sub_waitERNS_11unique_lockINS_5mutexEEE(%"class.std::__1::__assoc_sub_state"* %this, %"class.std::__1::unique_lock"* %__lk) #4
to label %invoke.cont unwind label %lpad to label %invoke.cont unwind label %lpad
invoke.cont: ; preds = %entry invoke.cont: ; preds = %entry
%__exception_ = getelementptr inbounds %"class.std::__1::__assoc_sub_state", %"class.std::__1::__assoc_sub_state"* %this, i64 0, i32 1 %__exception_ = getelementptr inbounds %"class.std::__1::__assoc_sub_state", %"class.std::__1::__assoc_sub_state"* %this, i64 0, i32 1
%0 = bitcast { i64, i64 }* %tmp to i8* %0 = bitcast { i64, i64 }* %tmp to i8*
call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 16, i32 8, i1 false) call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 16, i32 8, i1 false)
call void @_ZNSt15__exception_ptr13exception_ptrC1EMS0_FvvE(%"class.std::__exception_ptr::exception_ptr"* %ref.tmp, { i64, i64 }* byval %tmp) #5 call void @_ZNSt15__exception_ptr13exception_ptrC1EMS0_FvvE(%"class.std::__exception_ptr::exception_ptr"* %ref.tmp, { i64, i64 }* byval({ i64, i64 }) %tmp) #5
%call = call zeroext i1 @_ZNSt15__exception_ptrneERKNS_13exception_ptrES2_(%"class.std::__exception_ptr::exception_ptr"* %__exception_, %"class.std::__exception_ptr::exception_ptr"* %ref.tmp) #5 %call = call zeroext i1 @_ZNSt15__exception_ptrneERKNS_13exception_ptrES2_(%"class.std::__exception_ptr::exception_ptr"* %__exception_, %"class.std::__exception_ptr::exception_ptr"* %ref.tmp) #5
call void @_ZNSt15__exception_ptr13exception_ptrD1Ev(%"class.std::__exception_ptr::exception_ptr"* %ref.tmp) #5 call void @_ZNSt15__exception_ptr13exception_ptrD1Ev(%"class.std::__exception_ptr::exception_ptr"* %ref.tmp) #5
br i1 %call, label %if.then, label %if.end br i1 %call, label %if.then, label %if.end
if.then: ; preds = %invoke.cont if.then: ; preds = %invoke.cont
call void @_ZNSt15__exception_ptr13exception_ptrC1ERKS0_(%"class.std::__exception_ptr::exception_ptr"* %agg.tmp, %"class.std::__exception_ptr::exception_ptr"* %__exception_) #5 call void @_ZNSt15__exception_ptr13exception_ptrC1ERKS0_(%"class.std::__exception_ptr::exception_ptr"* %agg.tmp, %"class.std::__exception_ptr::exception_ptr"* %__exception_) #5
invoke void @_ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE(%"class.std::__exception_ptr::exception_ptr"* %agg.tmp) #6 invoke void @_ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE(%"class.std::__exception_ptr::exception_ptr"* %agg.tmp) #6
to label %invoke.cont4 unwind label %lpad3 to label %invoke.cont4 unwind label %lpad3
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
; Function Attrs: optsize ; Function Attrs: optsize
declare void @_ZNSt3__117__assoc_sub_state10__sub_waitERNS_11unique_lockINS_5mutexEEE(%"class.std::__1::__assoc_sub_state"*, %"class.std::__1::unique_lock"*) #0 align 2 declare void @_ZNSt3__117__assoc_sub_state10__sub_waitERNS_11unique_lockINS_5mutexEEE(%"class.std::__1::__assoc_sub_state"*, %"class.std::__1::unique_lock"*) #0 align 2
; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
declare zeroext i1 @_ZNSt15__exception_ptrneERKNS_13exception_ptrES2_(%"class.std::__exception_ptr::exception_ptr"*, %"class.std::__exception_ptr::exception_ptr"*) #1 declare zeroext i1 @_ZNSt15__exception_ptrneERKNS_13exception_ptrES2_(%"class.std::__exception_ptr::exception_ptr"*, %"class.std::__exception_ptr::exception_ptr"*) #1
; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
declare void @_ZNSt15__exception_ptr13exception_ptrC1EMS0_FvvE(%"class.std::__exception_ptr::exception_ptr"*, { i64, i64 }* byval) #1 declare void @_ZNSt15__exception_ptr13exception_ptrC1EMS0_FvvE(%"class.std::__exception_ptr::exception_ptr"*, { i64, i64 }* byval({ i64, i64 })) #1
; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
declare void @_ZNSt15__exception_ptr13exception_ptrD1Ev(%"class.std::__exception_ptr::exception_ptr"*) #1 declare void @_ZNSt15__exception_ptr13exception_ptrD1Ev(%"class.std::__exception_ptr::exception_ptr"*) #1
; Function Attrs: noreturn optsize ; Function Attrs: noreturn optsize
declare void @_ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE(%"class.std::__exception_ptr::exception_ptr"*) #2 declare void @_ZSt17rethrow_exceptionNSt15__exception_ptr13exception_ptrE(%"class.std::__exception_ptr::exception_ptr"*) #2
; Function Attrs: nounwind optsize ; Function Attrs: nounwind optsize
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test/CodeGen/PowerPC/jaggedstructs.ll

; RUN: llc -mcpu=ppc64 -O0 -fast-isel=false < %s | FileCheck %s ; RUN: llc -mcpu=ppc64 -O0 -fast-isel=false < %s | FileCheck %s
; This tests receiving and re-passing parameters consisting of structures ; This tests receiving and re-passing parameters consisting of structures
; of size 3, 5, 6, and 7. They are to be found/placed right-adjusted in ; of size 3, 5, 6, and 7. They are to be found/placed right-adjusted in
; the parameter registers. ; the parameter registers.
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.S3 = type { [3 x i8] } %struct.S3 = type { [3 x i8] }
%struct.S5 = type { [5 x i8] } %struct.S5 = type { [5 x i8] }
%struct.S6 = type { [6 x i8] } %struct.S6 = type { [6 x i8] }
%struct.S7 = type { [7 x i8] } %struct.S7 = type { [7 x i8] }
define void @test(%struct.S3* byval %s3, %struct.S5* byval %s5, %struct.S6* byval %s6, %struct.S7* byval %s7) nounwind { define void @test(%struct.S3* byval(%struct.S3) %s3, %struct.S5* byval(%struct.S5) %s5, %struct.S6* byval(%struct.S6) %s6, %struct.S7* byval(%struct.S7) %s7) nounwind {
entry: entry:
call void @check(%struct.S3* byval %s3, %struct.S5* byval %s5, %struct.S6* byval %s6, %struct.S7* byval %s7) call void @check(%struct.S3* byval(%struct.S3) %s3, %struct.S5* byval(%struct.S5) %s5, %struct.S6* byval(%struct.S6) %s6, %struct.S7* byval(%struct.S7) %s7)
ret void ret void
} }
; CHECK: std 6, 184(1) ; CHECK: std 6, 184(1)
; CHECK: std 5, 176(1) ; CHECK: std 5, 176(1)
; CHECK: std 4, 168(1) ; CHECK: std 4, 168(1)
; CHECK: std 3, 160(1) ; CHECK: std 3, 160(1)
; CHECK: lbz {{[0-9]+}}, 167(1) ; CHECK: lbz {{[0-9]+}}, 167(1)
Show All 14 Lines
; CHECK: stb {{[0-9]+}}, 79(1) ; CHECK: stb {{[0-9]+}}, 79(1)
; CHECK: sth {{[0-9]+}}, 77(1) ; CHECK: sth {{[0-9]+}}, 77(1)
; CHECK: stw {{[0-9]+}}, 73(1) ; CHECK: stw {{[0-9]+}}, 73(1)
; CHECK: ld 6, 72(1) ; CHECK: ld 6, 72(1)
; CHECK: ld 5, 64(1) ; CHECK: ld 5, 64(1)
; CHECK: ld 4, 56(1) ; CHECK: ld 4, 56(1)
; CHECK: ld 3, 48(1) ; CHECK: ld 3, 48(1)
declare void @check(%struct.S3* byval, %struct.S5* byval, %struct.S6* byval, %struct.S7* byval) declare void @check(%struct.S3* byval(%struct.S3), %struct.S5* byval(%struct.S5), %struct.S6* byval(%struct.S6), %struct.S7* byval(%struct.S7))

test/CodeGen/PowerPC/ppc440-fp-basic.ll

; RUN: llc < %s -march=ppc32 -mcpu=440 -fp-contract=fast | FileCheck %s ; RUN: llc < %s -march=ppc32 -mcpu=440 -fp-contract=fast | FileCheck %s
%0 = type { double, double } %0 = type { double, double }
define void @maybe_an_fma(%0* sret %agg.result, %0* byval %a, %0* byval %b, %0* byval %c) nounwind { define void @maybe_an_fma(%0* sret %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
entry: entry:
%a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0 %a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0
%a.real = load double, double* %a.realp %a.real = load double, double* %a.realp
%a.imagp = getelementptr inbounds %0, %0* %a, i32 0, i32 1 %a.imagp = getelementptr inbounds %0, %0* %a, i32 0, i32 1
%a.imag = load double, double* %a.imagp %a.imag = load double, double* %a.imagp
%b.realp = getelementptr inbounds %0, %0* %b, i32 0, i32 0 %b.realp = getelementptr inbounds %0, %0* %b, i32 0, i32 0
%b.real = load double, double* %b.realp %b.real = load double, double* %b.realp
%b.imagp = getelementptr inbounds %0, %0* %b, i32 0, i32 1 %b.imagp = getelementptr inbounds %0, %0* %b, i32 0, i32 1
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test/CodeGen/PowerPC/ppc64-align-long-double.ll

; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false -mattr=-vsx < %s | FileCheck %s ; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false -mattr=-vsx < %s | FileCheck %s
; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s ; RUN: llc -mcpu=pwr7 -O0 -fast-isel=false -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s
; Verify internal alignment of long double in a struct. The double ; Verify internal alignment of long double in a struct. The double
; argument comes in in GPR3; GPR4 is skipped; GPRs 5 and 6 contain ; argument comes in in GPR3; GPR4 is skipped; GPRs 5 and 6 contain
; the long double. Check that these are stored to proper locations ; the long double. Check that these are stored to proper locations
; in the parameter save area and loaded from there for return in FPR1/2. ; in the parameter save area and loaded from there for return in FPR1/2.
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.S = type { double, ppc_fp128 } %struct.S = type { double, ppc_fp128 }
define ppc_fp128 @test(%struct.S* byval %x) nounwind { define ppc_fp128 @test(%struct.S* byval(%struct.S) %x) nounwind {
entry: entry:
%b = getelementptr inbounds %struct.S, %struct.S* %x, i32 0, i32 1 %b = getelementptr inbounds %struct.S, %struct.S* %x, i32 0, i32 1
%0 = load ppc_fp128, ppc_fp128* %b, align 16 %0 = load ppc_fp128, ppc_fp128* %b, align 16
ret ppc_fp128 %0 ret ppc_fp128 %0
} }
; CHECK: std 6, 72(1) ; CHECK: std 6, 72(1)
; CHECK: std 5, 64(1) ; CHECK: std 5, 64(1)
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test/CodeGen/PowerPC/ppc64-byval-align.ll

; RUN: llc -O1 < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s ; RUN: llc -O1 < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64" target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.test = type { i64, [8 x i8] } %struct.test = type { i64, [8 x i8] }
%struct.pad = type { [8 x i64] } %struct.pad = type { [8 x i64] }
@gt = common global %struct.test zeroinitializer, align 16 @gt = common global %struct.test zeroinitializer, align 16
@gp = common global %struct.pad zeroinitializer, align 8 @gp = common global %struct.pad zeroinitializer, align 8
define signext i32 @callee1(i32 signext %x, %struct.test* byval align 16 nocapture readnone %y, i32 signext %z) { define signext i32 @callee1(i32 signext %x, %struct.test* align 16 nocapture readnone byval(%struct.test) %y, i32 signext %z) {
entry: entry:
ret i32 %z ret i32 %z
} }
; CHECK-LABEL: @callee1 ; CHECK-LABEL: @callee1
; CHECK: mr 3, 7 ; CHECK: mr 3, 7
; CHECK: blr ; CHECK: blr
declare signext i32 @test1(i32 signext, %struct.test* byval align 16, i32 signext) declare signext i32 @test1(i32 signext, %struct.test* align 16 byval(%struct.test), i32 signext)
define void @caller1(i32 signext %z) { define void @caller1(i32 signext %z) {
entry: entry:
%call = tail call signext i32 @test1(i32 signext 0, %struct.test* byval align 16 @gt, i32 signext %z) %call = tail call signext i32 @test1(i32 signext 0, %struct.test* align 16 byval(%struct.test) @gt, i32 signext %z)
ret void ret void
} }
; CHECK-LABEL: @caller1 ; CHECK-LABEL: @caller1
; CHECK: mr [[REG:[0-9]+]], 3 ; CHECK: mr [[REG:[0-9]+]], 3
; CHECK: mr 7, [[REG]] ; CHECK: mr 7, [[REG]]
; CHECK: bl test1 ; CHECK: bl test1
define i64 @callee2(%struct.pad* byval nocapture readnone %x, i32 signext %y, %struct.test* byval align 16 nocapture readonly %z) { define i64 @callee2(%struct.pad* nocapture readnone byval(%struct.pad) %x, i32 signext %y, %struct.test* align 16 nocapture readonly byval(%struct.test) %z) {
entry: entry:
%x1 = getelementptr inbounds %struct.test, %struct.test* %z, i64 0, i32 0 %x1 = getelementptr inbounds %struct.test, %struct.test* %z, i64 0, i32 0
%0 = load i64, i64* %x1, align 16 %0 = load i64, i64* %x1, align 16
ret i64 %0 ret i64 %0
} }
; CHECK-LABEL: @callee2 ; CHECK-LABEL: @callee2
; CHECK: ld [[REG:[0-9]+]], 128(1) ; CHECK: ld [[REG:[0-9]+]], 128(1)
; CHECK: mr 3, [[REG]] ; CHECK: mr 3, [[REG]]
; CHECK: blr ; CHECK: blr
declare i64 @test2(%struct.pad* byval, i32 signext, %struct.test* byval align 16) declare i64 @test2(%struct.pad* byval(%struct.pad), i32 signext, %struct.test* align 16 byval(%struct.test))
define void @caller2(i64 %z) { define void @caller2(i64 %z) {
entry: entry:
%tmp = alloca %struct.test, align 16 %tmp = alloca %struct.test, align 16
%.compoundliteral.sroa.0.0..sroa_idx = getelementptr inbounds %struct.test, %struct.test* %tmp, i64 0, i32 0 %.compoundliteral.sroa.0.0..sroa_idx = getelementptr inbounds %struct.test, %struct.test* %tmp, i64 0, i32 0
store i64 %z, i64* %.compoundliteral.sroa.0.0..sroa_idx, align 16 store i64 %z, i64* %.compoundliteral.sroa.0.0..sroa_idx, align 16
%call = call i64 @test2(%struct.pad* byval @gp, i32 signext 0, %struct.test* byval align 16 %tmp) %call = call i64 @test2(%struct.pad* byval(%struct.pad) @gp, i32 signext 0, %struct.test* align 16 byval(%struct.test) %tmp)
ret void ret void
} }
; CHECK-LABEL: @caller2 ; CHECK-LABEL: @caller2
; CHECK: std 3, [[OFF:[0-9]+]](1) ; CHECK: std 3, [[OFF:[0-9]+]](1)
; CHECK: addi [[REG1:[0-9]+]], 1, [[OFF]] ; CHECK: addi [[REG1:[0-9]+]], 1, [[OFF]]
; CHECK: lxvw4x [[REG2:[0-9]+]], 0, [[REG1]] ; CHECK: lxvw4x [[REG2:[0-9]+]], 0, [[REG1]]
; CHECK: li [[REG3:[0-9]+]], 128 ; CHECK: li [[REG3:[0-9]+]], 128
; CHECK: stxvw4x 0, 1, [[REG3]] ; CHECK: stxvw4x 0, 1, [[REG3]]
; CHECK: bl test2 ; CHECK: bl test2

test/CodeGen/PowerPC/ppc64-crash.ll

; RUN: llc %s -o - ; RUN: llc %s -o -
; ModuleID = 'undo.c' ; ModuleID = 'undo.c'
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-freebsd" target triple = "powerpc64-unknown-freebsd"
%struct.__sFILE = type {} %struct.__sFILE = type {}
%struct.pos_T = type { i64 } %struct.pos_T = type { i64 }
; check that we're not copying stuff between R and X registers ; check that we're not copying stuff between R and X registers
define internal void @serialize_pos(%struct.pos_T* byval %pos, %struct.__sFILE* %fp) nounwind { define internal void @serialize_pos(%struct.pos_T* byval(%struct.pos_T) %pos, %struct.__sFILE* %fp) nounwind {
entry: entry:
ret void ret void
} }

test/CodeGen/PowerPC/ppc64-smallarg.ll

; Verify that small structures and float arguments are passed in the ; Verify that small structures and float arguments are passed in the
; least significant part of a stack slot doubleword. ; least significant part of a stack slot doubleword.
; RUN: llc < %s | FileCheck %s ; RUN: llc < %s | FileCheck %s
target datalayout = "E-m:e-i64:64-n32:64" target datalayout = "E-m:e-i64:64-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.large_arg = type { [8 x i64] } %struct.large_arg = type { [8 x i64] }
%struct.small_arg = type { i16, i8 } %struct.small_arg = type { i16, i8 }
@gl = common global %struct.large_arg zeroinitializer, align 8 @gl = common global %struct.large_arg zeroinitializer, align 8
@gs = common global %struct.small_arg zeroinitializer, align 2 @gs = common global %struct.small_arg zeroinitializer, align 2
@gf = common global float 0.000000e+00, align 4 @gf = common global float 0.000000e+00, align 4
define void @callee1(%struct.small_arg* noalias nocapture sret %agg.result, %struct.large_arg* byval nocapture readnone %pad, %struct.small_arg* byval nocapture readonly %x) { define void @callee1(%struct.small_arg* noalias nocapture sret %agg.result, %struct.large_arg* nocapture readnone byval(%struct.large_arg) %pad, %struct.small_arg* nocapture readonly byval(%struct.small_arg) %x) {
entry: entry:
%0 = bitcast %struct.small_arg* %x to i32* %0 = bitcast %struct.small_arg* %x to i32*
%1 = bitcast %struct.small_arg* %agg.result to i32* %1 = bitcast %struct.small_arg* %agg.result to i32*
%2 = load i32, i32* %0, align 2 %2 = load i32, i32* %0, align 2
store i32 %2, i32* %1, align 2 store i32 %2, i32* %1, align 2
ret void ret void
} }
; CHECK: @callee1 ; CHECK: @callee1
; CHECK: lwz {{[0-9]+}}, 124(1) ; CHECK: lwz {{[0-9]+}}, 124(1)
; CHECK: blr ; CHECK: blr
define void @caller1() { define void @caller1() {
entry: entry:
%tmp = alloca %struct.small_arg, align 2 %tmp = alloca %struct.small_arg, align 2
call void @test1(%struct.small_arg* sret %tmp, %struct.large_arg* byval @gl, %struct.small_arg* byval @gs) call void @test1(%struct.small_arg* sret %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
ret void ret void
} }
; CHECK: @caller1 ; CHECK: @caller1
; CHECK: stw {{[0-9]+}}, 124(1) ; CHECK: stw {{[0-9]+}}, 124(1)
; CHECK: bl test1 ; CHECK: bl test1
declare void @test1(%struct.small_arg* sret, %struct.large_arg* byval, %struct.small_arg* byval) declare void @test1(%struct.small_arg* sret, %struct.large_arg* byval(%struct.large_arg), %struct.small_arg* byval(%struct.small_arg))
define float @callee2(float %pad1, float %pad2, float %pad3, float %pad4, float %pad5, float %pad6, float %pad7, float %pad8, float %pad9, float %pad10, float %pad11, float %pad12, float %pad13, float %x) { define float @callee2(float %pad1, float %pad2, float %pad3, float %pad4, float %pad5, float %pad6, float %pad7, float %pad8, float %pad9, float %pad10, float %pad11, float %pad12, float %pad13, float %x) {
entry: entry:
ret float %x ret float %x
} }
; CHECK: @callee2 ; CHECK: @callee2
; CHECK: lfs {{[0-9]+}}, 156(1) ; CHECK: lfs {{[0-9]+}}, 156(1)
; CHECK: blr ; CHECK: blr
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test/CodeGen/PowerPC/ppc64le-smallarg.ll

; Verify that small structures and float arguments are passed in the ; Verify that small structures and float arguments are passed in the
; least significant part of a stack slot doubleword. ; least significant part of a stack slot doubleword.
; RUN: llc < %s | FileCheck %s ; RUN: llc < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64" target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu" target triple = "powerpc64le-unknown-linux-gnu"
%struct.large_arg = type { [8 x i64] } %struct.large_arg = type { [8 x i64] }
%struct.small_arg = type { i16, i8 } %struct.small_arg = type { i16, i8 }
@gl = common global %struct.large_arg zeroinitializer, align 8 @gl = common global %struct.large_arg zeroinitializer, align 8
@gs = common global %struct.small_arg zeroinitializer, align 2 @gs = common global %struct.small_arg zeroinitializer, align 2
@gf = common global float 0.000000e+00, align 4 @gf = common global float 0.000000e+00, align 4
define void @callee1(%struct.small_arg* noalias nocapture sret %agg.result, %struct.large_arg* byval nocapture readnone %pad, %struct.small_arg* byval nocapture readonly %x) { define void @callee1(%struct.small_arg* noalias nocapture sret %agg.result, %struct.large_arg* nocapture readnone byval(%struct.large_arg) %pad, %struct.small_arg* nocapture readonly byval(%struct.small_arg) %x) {
entry: entry:
%0 = bitcast %struct.small_arg* %x to i32* %0 = bitcast %struct.small_arg* %x to i32*
%1 = bitcast %struct.small_arg* %agg.result to i32* %1 = bitcast %struct.small_arg* %agg.result to i32*
%2 = load i32, i32* %0, align 2 %2 = load i32, i32* %0, align 2
store i32 %2, i32* %1, align 2 store i32 %2, i32* %1, align 2
ret void ret void
} }
; CHECK: @callee1 ; CHECK: @callee1
; CHECK: lwz {{[0-9]+}}, 104(1) ; CHECK: lwz {{[0-9]+}}, 104(1)
; CHECK: blr ; CHECK: blr
define void @caller1() { define void @caller1() {
entry: entry:
%tmp = alloca %struct.small_arg, align 2 %tmp = alloca %struct.small_arg, align 2
call void @test1(%struct.small_arg* sret %tmp, %struct.large_arg* byval @gl, %struct.small_arg* byval @gs) call void @test1(%struct.small_arg* sret %tmp, %struct.large_arg* byval(%struct.large_arg) @gl, %struct.small_arg* byval(%struct.small_arg) @gs)
ret void ret void
} }
; CHECK: @caller1 ; CHECK: @caller1
; CHECK: stw {{[0-9]+}}, 104(1) ; CHECK: stw {{[0-9]+}}, 104(1)
; CHECK: bl test1 ; CHECK: bl test1
declare void @test1(%struct.small_arg* sret, %struct.large_arg* byval, %struct.small_arg* byval) declare void @test1(%struct.small_arg* sret, %struct.large_arg* byval(%struct.large_arg), %struct.small_arg* byval(%struct.small_arg))
define float @callee2(float %pad1, float %pad2, float %pad3, float %pad4, float %pad5, float %pad6, float %pad7, float %pad8, float %pad9, float %pad10, float %pad11, float %pad12, float %pad13, float %x) { define float @callee2(float %pad1, float %pad2, float %pad3, float %pad4, float %pad5, float %pad6, float %pad7, float %pad8, float %pad9, float %pad10, float %pad11, float %pad12, float %pad13, float %x) {
entry: entry:
ret float %x ret float %x
} }
; CHECK: @callee2 ; CHECK: @callee2
; CHECK: addi [[TOCREG:[0-9]+]], 1, 136 ; CHECK: addi [[TOCREG:[0-9]+]], 1, 136
; CHECK: lxsspx {{[0-9]+}}, {{[0-9]+}}, [[TOCREG]] ; CHECK: lxsspx {{[0-9]+}}, {{[0-9]+}}, [[TOCREG]]
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test/CodeGen/PowerPC/pr13891.ll

; RUN: llc < %s | FileCheck %s ; RUN: llc < %s | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.foo = type { i8, i8 } %struct.foo = type { i8, i8 }
define void @_Z5check3foos(%struct.foo* nocapture byval %f, i16 signext %i) noinline { define void @_Z5check3foos(%struct.foo* nocapture byval(%struct.foo) %f, i16 signext %i) noinline {
; CHECK-LABEL: _Z5check3foos: ; CHECK-LABEL: _Z5check3foos:
; CHECK: sth 3, {{[0-9]+}}(1) ; CHECK: sth 3, {{[0-9]+}}(1)
; CHECK: lha {{[0-9]+}}, {{[0-9]+}}(1) ; CHECK: lha {{[0-9]+}}, {{[0-9]+}}(1)
entry: entry:
%0 = bitcast %struct.foo* %f to i16* %0 = bitcast %struct.foo* %f to i16*
%1 = load i16, i16* %0, align 2 %1 = load i16, i16* %0, align 2
%bf.val.sext = ashr i16 %1, 8 %bf.val.sext = ashr i16 %1, 8
%cmp = icmp eq i16 %bf.val.sext, %i %cmp = icmp eq i16 %bf.val.sext, %i
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test/CodeGen/PowerPC/reloc-align.ll

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%struct.S1 = type { [8 x i8] } %struct.S1 = type { [8 x i8] }
@main.l_1554 = internal global { i8, i8, i8, i8, i8, i8, i8, i8 } { i8 -1, i8 -6, i8 57, i8 62, i8 -48, i8 0, i8 58, i8 80 }, align 1 @main.l_1554 = internal global { i8, i8, i8, i8, i8, i8, i8, i8 } { i8 -1, i8 -6, i8 57, i8 62, i8 -48, i8 0, i8 58, i8 80 }, align 1
; Function Attrs: nounwind readonly ; Function Attrs: nounwind readonly
define signext i32 @main() #0 { define signext i32 @main() #0 {
entry: entry:
%call = tail call fastcc signext i32 @func_90(%struct.S1* byval bitcast ({ i8, i8, i8, i8, i8, i8, i8, i8 }* @main.l_1554 to %struct.S1*)) %call = tail call fastcc signext i32 @func_90(%struct.S1* byval(%struct.S1) bitcast ({ i8, i8, i8, i8, i8, i8, i8, i8 }* @main.l_1554 to %struct.S1*))
; CHECK-NOT: ld {{[0-9]+}}, main.l_1554@toc@l ; CHECK-NOT: ld {{[0-9]+}}, main.l_1554@toc@l
ret i32 %call ret i32 %call
} }
; Function Attrs: nounwind readonly ; Function Attrs: nounwind readonly
define internal fastcc signext i32 @func_90(%struct.S1* byval nocapture %p_91) #0 { define internal fastcc signext i32 @func_90(%struct.S1* nocapture byval(%struct.S1) %p_91) #0 {
entry: entry:
%0 = bitcast %struct.S1* %p_91 to i64* %0 = bitcast %struct.S1* %p_91 to i64*
%bf.load = load i64, i64* %0, align 1 %bf.load = load i64, i64* %0, align 1
%bf.shl = shl i64 %bf.load, 26 %bf.shl = shl i64 %bf.load, 26
%bf.ashr = ashr i64 %bf.shl, 54 %bf.ashr = ashr i64 %bf.shl, 54
%bf.cast = trunc i64 %bf.ashr to i32 %bf.cast = trunc i64 %bf.ashr to i32
ret i32 %bf.cast ret i32 %bf.cast
} }
attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind readonly "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }

test/CodeGen/PowerPC/resolvefi-basereg.ll

Show First 20 Lines • Show All 326 Lines • ▼ Show 20 Linesif.end: ; preds = %if.then, %entry
%60 = load i32, i32* %i, align 4 %60 = load i32, i32* %i, align 4
store i32 %60, i32* getelementptr inbounds (%struct.Info, %struct.Info* @info, i32 0, i32 0), align 4 store i32 %60, i32* getelementptr inbounds (%struct.Info, %struct.Info* @info, i32 0, i32 0), align 4
%61 = load i32, i32* %j, align 4 %61 = load i32, i32* %j, align 4
store i32 %61, i32* getelementptr inbounds (%struct.Info, %struct.Info* @info, i32 0, i32 1), align 4 store i32 %61, i32* getelementptr inbounds (%struct.Info, %struct.Info* @info, i32 0, i32 1), align 4
%62 = bitcast %struct.S1998* %agg.tmp111 to i8* %62 = bitcast %struct.S1998* %agg.tmp111 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %62, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %62, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false)
%63 = bitcast %struct.S1998* %agg.tmp112 to i8* %63 = bitcast %struct.S1998* %agg.tmp112 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %63, i8* bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %63, i8* bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i32 16, i1 false)
call void @check1998(%struct.S1998* sret %agg.tmp, %struct.S1998* byval align 16 %agg.tmp111, %struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 1), %struct.S1998* byval align 16 %agg.tmp112) call void @check1998(%struct.S1998* sret %agg.tmp, %struct.S1998* align 16 byval(%struct.S1998) %agg.tmp111, %struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 1), %struct.S1998* align 16 byval(%struct.S1998) %agg.tmp112)
call void @checkx1998(%struct.S1998* byval align 16 %agg.tmp) call void @checkx1998(%struct.S1998* align 16 byval(%struct.S1998) %agg.tmp)
%64 = bitcast %struct.S1998* %agg.tmp113 to i8* %64 = bitcast %struct.S1998* %agg.tmp113 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %64, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %64, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false)
%65 = bitcast %struct.S1998* %agg.tmp114 to i8* %65 = bitcast %struct.S1998* %agg.tmp114 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %65, i8* bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %65, i8* bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i32 16, i1 false)
%66 = bitcast %struct.S1998* %agg.tmp115 to i8* %66 = bitcast %struct.S1998* %agg.tmp115 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %66, i8* bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %66, i8* bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i32 16, i1 false)
call void (i32, ...) @check1998va(i32 signext 1, double 1.000000e+00, %struct.S1998* byval align 16 %agg.tmp113, i64 2, %struct.S1998* byval align 16 %agg.tmp114, %struct.S1998* byval align 16 %agg.tmp115) call void (i32, ...) @check1998va(i32 signext 1, double 1.000000e+00, %struct.S1998* align 16 byval(%struct.S1998) %agg.tmp113, i64 2, %struct.S1998* align 16 byval(%struct.S1998) %agg.tmp114, %struct.S1998* align 16 byval(%struct.S1998) %agg.tmp115)
%67 = bitcast %struct.S1998* %agg.tmp116 to i8* %67 = bitcast %struct.S1998* %agg.tmp116 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %67, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %67, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false)
%68 = bitcast %struct.S1998* %agg.tmp117 to i8* %68 = bitcast %struct.S1998* %agg.tmp117 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %68, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %68, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false)
%69 = bitcast %struct.S1998* %agg.tmp118 to i8* %69 = bitcast %struct.S1998* %agg.tmp118 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %69, i8* bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %69, i8* bitcast (%struct.S1998* getelementptr inbounds ([5 x %struct.S1998], [5 x %struct.S1998]* @a1998, i32 0, i64 2) to i8*), i64 5168, i32 16, i1 false)
%70 = bitcast %struct.S1998* %agg.tmp119 to i8* %70 = bitcast %struct.S1998* %agg.tmp119 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %70, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %70, i8* bitcast (%struct.S1998* @s1998 to i8*), i64 5168, i32 16, i1 false)
call void (i32, ...) @check1998va(i32 signext 2, %struct.S1998* byval align 16 %agg.tmp116, %struct.S1998* byval align 16 %agg.tmp117, ppc_fp128 0xM40000000000000000000000000000000, %struct.S1998* byval align 16 %agg.tmp118, %struct.S1998* byval align 16 %agg.tmp119) call void (i32, ...) @check1998va(i32 signext 2, %struct.S1998* align 16 byval(%struct.S1998) %agg.tmp116, %struct.S1998* align 16 byval(%struct.S1998) %agg.tmp117, ppc_fp128 0xM40000000000000000000000000000000, %struct.S1998* align 16 byval(%struct.S1998) %agg.tmp118, %struct.S1998* align 16 byval(%struct.S1998) %agg.tmp119)
ret void ret void
} }
declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1)
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1)
declare void @check1998(%struct.S1998* sret, %struct.S1998* byval align 16, %struct.S1998*, %struct.S1998* byval align 16) declare void @check1998(%struct.S1998* sret, %struct.S1998* align 16 byval(%struct.S1998), %struct.S1998*, %struct.S1998* align 16 byval(%struct.S1998))
declare void @check1998va(i32 signext, ...) declare void @check1998va(i32 signext, ...)
declare void @checkx1998(%struct.S1998* byval align 16 %arg) declare void @checkx1998(%struct.S1998* align 16 byval(%struct.S1998) %arg)

test/CodeGen/PowerPC/resolvefi-disp.ll

Show All 14 Lines
%struct.S2760 = type { <2 x float>, %struct.anon, i32, [28 x i8] } %struct.S2760 = type { <2 x float>, %struct.anon, i32, [28 x i8] }
%struct.anon = type { [11 x %struct.anon.0], i64, [6 x { i64, i64 }], [24 x i8] } %struct.anon = type { [11 x %struct.anon.0], i64, [6 x { i64, i64 }], [24 x i8] }
%struct.anon.0 = type { [30 x %union.U4DI], i8, [0 x i16], [30 x i8] } %struct.anon.0 = type { [30 x %union.U4DI], i8, [0 x i16], [30 x i8] }
%union.U4DI = type { <4 x i64> } %union.U4DI = type { <4 x i64> }
@s2760 = external global %struct.S2760 @s2760 = external global %struct.S2760
@fails = external global i32 @fails = external global i32
define void @check2760(%struct.S2760* noalias sret %agg.result, %struct.S2760* byval align 16, %struct.S2760* %arg1, %struct.S2760* byval align 16) { define void @check2760(%struct.S2760* noalias sret %agg.result, %struct.S2760* align 16 byval(%struct.S2760), %struct.S2760* %arg1, %struct.S2760* align 16 byval(%struct.S2760)) {
entry: entry:
%arg0 = alloca %struct.S2760, align 32 %arg0 = alloca %struct.S2760, align 32
%arg2 = alloca %struct.S2760, align 32 %arg2 = alloca %struct.S2760, align 32
%arg1.addr = alloca %struct.S2760*, align 8 %arg1.addr = alloca %struct.S2760*, align 8
%ret = alloca %struct.S2760, align 32 %ret = alloca %struct.S2760, align 32
%b1 = alloca %struct.S2760, align 32 %b1 = alloca %struct.S2760, align 32
%b2 = alloca %struct.S2760, align 32 %b2 = alloca %struct.S2760, align 32
%2 = bitcast %struct.S2760* %arg0 to i8* %2 = bitcast %struct.S2760* %arg0 to i8*
Show All 40 Lines

test/CodeGen/PowerPC/stack-realign.ll

; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s
; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -disable-fp-elim < %s | FileCheck -check-prefix=CHECK-FP %s ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -disable-fp-elim < %s | FileCheck -check-prefix=CHECK-FP %s
; RUN: llc -mtriple=powerpc-unknown-linux-gnu -disable-fp-elim < %s | FileCheck -check-prefix=CHECK-32 %s ; RUN: llc -mtriple=powerpc-unknown-linux-gnu -disable-fp-elim < %s | FileCheck -check-prefix=CHECK-32 %s
; RUN: llc -mtriple=powerpc-unknown-linux-gnu -disable-fp-elim -relocation-model=pic < %s | FileCheck -check-prefix=CHECK-32-PIC %s ; RUN: llc -mtriple=powerpc-unknown-linux-gnu -disable-fp-elim -relocation-model=pic < %s | FileCheck -check-prefix=CHECK-32-PIC %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.s = type { i32, i32 } %struct.s = type { i32, i32 }
declare void @bar(i32*) declare void @bar(i32*)
@barbaz = external global i32 @barbaz = external global i32
define void @goo(%struct.s* byval nocapture readonly %a) { define void @goo(%struct.s* nocapture readonly byval(%struct.s) %a) {
entry: entry:
%x = alloca [2 x i32], align 32 %x = alloca [2 x i32], align 32
%a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0
%0 = load i32, i32* %a1, align 4 %0 = load i32, i32* %a1, align 4
%arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0 %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0
store i32 %0, i32* %arrayidx, align 32 store i32 %0, i32* %arrayidx, align 32
%b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1
%1 = load i32, i32* %b, align 4 %1 = load i32, i32* %b, align 4
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; CHECK-32-PIC-DAG: clrlwi [[REG:[0-9]+]], 1, 27 ; CHECK-32-PIC-DAG: clrlwi [[REG:[0-9]+]], 1, 27
; CHECK-32-PIC-DAG: stw 29, -12(1) ; CHECK-32-PIC-DAG: stw 29, -12(1)
; CHECK-32-PIC-DAG: mr 29, 1 ; CHECK-32-PIC-DAG: mr 29, 1
; CHECK-32-PIC-DAG: stw 0, 4(1) ; CHECK-32-PIC-DAG: stw 0, 4(1)
; CHECK-32-PIC-DAG: subfic 0, [[REG]], -64 ; CHECK-32-PIC-DAG: subfic 0, [[REG]], -64
; CHECK-32-PIC: stwux 1, 1, 0 ; CHECK-32-PIC: stwux 1, 1, 0
; The large-frame-size case. ; The large-frame-size case.
define void @hoo(%struct.s* byval nocapture readonly %a) { define void @hoo(%struct.s* nocapture readonly byval(%struct.s) %a) {
entry: entry:
%x = alloca [200000 x i32], align 32 %x = alloca [200000 x i32], align 32
%a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0
%0 = load i32, i32* %a1, align 4 %0 = load i32, i32* %a1, align 4
%arrayidx = getelementptr inbounds [200000 x i32], [200000 x i32]* %x, i64 0, i64 0 %arrayidx = getelementptr inbounds [200000 x i32], [200000 x i32]* %x, i64 0, i64 0
store i32 %0, i32* %arrayidx, align 32 store i32 %0, i32* %arrayidx, align 32
%b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1
%1 = load i32, i32* %b, align 4 %1 = load i32, i32* %b, align 4
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; CHECK-32-PIC-DAG: stw 0, 4(1) ; CHECK-32-PIC-DAG: stw 0, 4(1)
; CHECK-32-PIC-DAG: subfc 0, [[REG3]], [[REG2]] ; CHECK-32-PIC-DAG: subfc 0, [[REG3]], [[REG2]]
; CHECK-32: stwux 1, 1, 0 ; CHECK-32: stwux 1, 1, 0
; CHECK-32: blr ; CHECK-32: blr
; Make sure that the FP save area is still allocated correctly relative to ; Make sure that the FP save area is still allocated correctly relative to
; where r30 is saved. ; where r30 is saved.
define void @loo(%struct.s* byval nocapture readonly %a) { define void @loo(%struct.s* nocapture readonly byval(%struct.s) %a) {
entry: entry:
%x = alloca [2 x i32], align 32 %x = alloca [2 x i32], align 32
%a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0
%0 = load i32, i32* %a1, align 4 %0 = load i32, i32* %a1, align 4
%arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0 %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0
store i32 %0, i32* %arrayidx, align 32 store i32 %0, i32* %arrayidx, align 32
%b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1
%1 = load i32, i32* %b, align 4 %1 = load i32, i32* %b, align 4
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test/CodeGen/PowerPC/structsinmem.ll

Show First 20 Lines • Show All 50 Lines • ▼ Show 20 Linesentry:
%3 = bitcast %struct.s4* %p4 to i8* %3 = bitcast %struct.s4* %p4 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast (%struct.s4* @caller1.p4 to i8*), i64 4, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast (%struct.s4* @caller1.p4 to i8*), i64 4, i32 4, i1 false)
%4 = bitcast %struct.s5* %p5 to i8* %4 = bitcast %struct.s5* %p5 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast ({ i32, i8, [3 x i8] }* @caller1.p5 to i8*), i64 8, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast ({ i32, i8, [3 x i8] }* @caller1.p5 to i8*), i64 8, i32 4, i1 false)
%5 = bitcast %struct.s6* %p6 to i8* %5 = bitcast %struct.s6* %p6 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast ({ i32, i16, [2 x i8] }* @caller1.p6 to i8*), i64 8, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast ({ i32, i16, [2 x i8] }* @caller1.p6 to i8*), i64 8, i32 4, i1 false)
%6 = bitcast %struct.s7* %p7 to i8* %6 = bitcast %struct.s7* %p7 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast ({ i32, i16, i8, i8 }* @caller1.p7 to i8*), i64 8, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast ({ i32, i16, i8, i8 }* @caller1.p7 to i8*), i64 8, i32 4, i1 false)
%call = call i32 @callee1(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, %struct.s1* byval %p1, %struct.s2* byval %p2, %struct.s3* byval %p3, %struct.s4* byval %p4, %struct.s5* byval %p5, %struct.s6* byval %p6, %struct.s7* byval %p7) %call = call i32 @callee1(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, %struct.s1* byval(%struct.s1) %p1, %struct.s2* byval(%struct.s2) %p2, %struct.s3* byval(%struct.s3) %p3, %struct.s4* byval(%struct.s4) %p4, %struct.s5* byval(%struct.s5) %p5, %struct.s6* byval(%struct.s6) %p6, %struct.s7* byval(%struct.s7) %p7)
ret i32 %call ret i32 %call
; CHECK: stb {{[0-9]+}}, 119(1) ; CHECK: stb {{[0-9]+}}, 119(1)
; CHECK: sth {{[0-9]+}}, 126(1) ; CHECK: sth {{[0-9]+}}, 126(1)
; CHECK: stw {{[0-9]+}}, 132(1) ; CHECK: stw {{[0-9]+}}, 132(1)
; CHECK: stw {{[0-9]+}}, 140(1) ; CHECK: stw {{[0-9]+}}, 140(1)
; CHECK: std {{[0-9]+}}, 144(1) ; CHECK: std {{[0-9]+}}, 144(1)
; CHECK: std {{[0-9]+}}, 152(1) ; CHECK: std {{[0-9]+}}, 152(1)
; CHECK: std {{[0-9]+}}, 160(1) ; CHECK: std {{[0-9]+}}, 160(1)
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
define internal i32 @callee1(i32 %z1, i32 %z2, i32 %z3, i32 %z4, i32 %z5, i32 %z6, i32 %z7, i32 %z8, %struct.s1* byval %v1, %struct.s2* byval %v2, %struct.s3* byval %v3, %struct.s4* byval %v4, %struct.s5* byval %v5, %struct.s6* byval %v6, %struct.s7* byval %v7) nounwind { define internal i32 @callee1(i32 %z1, i32 %z2, i32 %z3, i32 %z4, i32 %z5, i32 %z6, i32 %z7, i32 %z8, %struct.s1* byval(%struct.s1) %v1, %struct.s2* byval(%struct.s2) %v2, %struct.s3* byval(%struct.s3) %v3, %struct.s4* byval(%struct.s4) %v4, %struct.s5* byval(%struct.s5) %v5, %struct.s6* byval(%struct.s6) %v6, %struct.s7* byval(%struct.s7) %v7) nounwind {
entry: entry:
%z1.addr = alloca i32, align 4 %z1.addr = alloca i32, align 4
%z2.addr = alloca i32, align 4 %z2.addr = alloca i32, align 4
%z3.addr = alloca i32, align 4 %z3.addr = alloca i32, align 4
%z4.addr = alloca i32, align 4 %z4.addr = alloca i32, align 4
%z5.addr = alloca i32, align 4 %z5.addr = alloca i32, align 4
%z6.addr = alloca i32, align 4 %z6.addr = alloca i32, align 4
%z7.addr = alloca i32, align 4 %z7.addr = alloca i32, align 4
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Linesentry:
%3 = bitcast %struct.t4* %p4 to i8* %3 = bitcast %struct.t4* %p4 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast ({ i32 }* @caller2.p4 to i8*), i64 4, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast ({ i32 }* @caller2.p4 to i8*), i64 4, i32 1, i1 false)
%4 = bitcast %struct.t5* %p5 to i8* %4 = bitcast %struct.t5* %p5 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast (%struct.t5* @caller2.p5 to i8*), i64 5, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast (%struct.t5* @caller2.p5 to i8*), i64 5, i32 1, i1 false)
%5 = bitcast %struct.t6* %p6 to i8* %5 = bitcast %struct.t6* %p6 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast (%struct.t6* @caller2.p6 to i8*), i64 6, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast (%struct.t6* @caller2.p6 to i8*), i64 6, i32 1, i1 false)
%6 = bitcast %struct.t7* %p7 to i8* %6 = bitcast %struct.t7* %p7 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast (%struct.t7* @caller2.p7 to i8*), i64 7, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast (%struct.t7* @caller2.p7 to i8*), i64 7, i32 1, i1 false)
%call = call i32 @callee2(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, %struct.t1* byval %p1, %struct.t2* byval %p2, %struct.t3* byval %p3, %struct.t4* byval %p4, %struct.t5* byval %p5, %struct.t6* byval %p6, %struct.t7* byval %p7) %call = call i32 @callee2(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, %struct.t1* byval(%struct.t1) %p1, %struct.t2* byval(%struct.t2) %p2, %struct.t3* byval(%struct.t3) %p3, %struct.t4* byval(%struct.t4) %p4, %struct.t5* byval(%struct.t5) %p5, %struct.t6* byval(%struct.t6) %p6, %struct.t7* byval(%struct.t7) %p7)
ret i32 %call ret i32 %call
; CHECK: stb {{[0-9]+}}, 119(1) ; CHECK: stb {{[0-9]+}}, 119(1)
; CHECK: sth {{[0-9]+}}, 126(1) ; CHECK: sth {{[0-9]+}}, 126(1)
; CHECK: stb {{[0-9]+}}, 135(1) ; CHECK: stb {{[0-9]+}}, 135(1)
; CHECK: sth {{[0-9]+}}, 133(1) ; CHECK: sth {{[0-9]+}}, 133(1)
; CHECK: stw {{[0-9]+}}, 140(1) ; CHECK: stw {{[0-9]+}}, 140(1)
; CHECK: stb {{[0-9]+}}, 151(1) ; CHECK: stb {{[0-9]+}}, 151(1)
; CHECK: stw {{[0-9]+}}, 147(1) ; CHECK: stw {{[0-9]+}}, 147(1)
; CHECK: sth {{[0-9]+}}, 158(1) ; CHECK: sth {{[0-9]+}}, 158(1)
; CHECK: stw {{[0-9]+}}, 154(1) ; CHECK: stw {{[0-9]+}}, 154(1)
; CHECK: stb {{[0-9]+}}, 167(1) ; CHECK: stb {{[0-9]+}}, 167(1)
; CHECK: sth {{[0-9]+}}, 165(1) ; CHECK: sth {{[0-9]+}}, 165(1)
; CHECK: stw {{[0-9]+}}, 161(1) ; CHECK: stw {{[0-9]+}}, 161(1)
} }
define internal i32 @callee2(i32 %z1, i32 %z2, i32 %z3, i32 %z4, i32 %z5, i32 %z6, i32 %z7, i32 %z8, %struct.t1* byval %v1, %struct.t2* byval %v2, %struct.t3* byval %v3, %struct.t4* byval %v4, %struct.t5* byval %v5, %struct.t6* byval %v6, %struct.t7* byval %v7) nounwind { define internal i32 @callee2(i32 %z1, i32 %z2, i32 %z3, i32 %z4, i32 %z5, i32 %z6, i32 %z7, i32 %z8, %struct.t1* byval(%struct.t1) %v1, %struct.t2* byval(%struct.t2) %v2, %struct.t3* byval(%struct.t3) %v3, %struct.t4* byval(%struct.t4) %v4, %struct.t5* byval(%struct.t5) %v5, %struct.t6* byval(%struct.t6) %v6, %struct.t7* byval(%struct.t7) %v7) nounwind {
entry: entry:
%z1.addr = alloca i32, align 4 %z1.addr = alloca i32, align 4
%z2.addr = alloca i32, align 4 %z2.addr = alloca i32, align 4
%z3.addr = alloca i32, align 4 %z3.addr = alloca i32, align 4
%z4.addr = alloca i32, align 4 %z4.addr = alloca i32, align 4
%z5.addr = alloca i32, align 4 %z5.addr = alloca i32, align 4
%z6.addr = alloca i32, align 4 %z6.addr = alloca i32, align 4
%z7.addr = alloca i32, align 4 %z7.addr = alloca i32, align 4
▲ Show 20 Lines • Show All 42 Lines • Show Last 20 Lines

test/CodeGen/PowerPC/structsinregs.ll

Show First 20 Lines • Show All 50 Lines • ▼ Show 20 Linesentry:
%3 = bitcast %struct.s4* %p4 to i8* %3 = bitcast %struct.s4* %p4 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast (%struct.s4* @caller1.p4 to i8*), i64 4, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast (%struct.s4* @caller1.p4 to i8*), i64 4, i32 4, i1 false)
%4 = bitcast %struct.s5* %p5 to i8* %4 = bitcast %struct.s5* %p5 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast ({ i32, i8, [3 x i8] }* @caller1.p5 to i8*), i64 8, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast ({ i32, i8, [3 x i8] }* @caller1.p5 to i8*), i64 8, i32 4, i1 false)
%5 = bitcast %struct.s6* %p6 to i8* %5 = bitcast %struct.s6* %p6 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast ({ i32, i16, [2 x i8] }* @caller1.p6 to i8*), i64 8, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast ({ i32, i16, [2 x i8] }* @caller1.p6 to i8*), i64 8, i32 4, i1 false)
%6 = bitcast %struct.s7* %p7 to i8* %6 = bitcast %struct.s7* %p7 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast ({ i32, i16, i8, i8 }* @caller1.p7 to i8*), i64 8, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast ({ i32, i16, i8, i8 }* @caller1.p7 to i8*), i64 8, i32 4, i1 false)
%call = call i32 @callee1(%struct.s1* byval %p1, %struct.s2* byval %p2, %struct.s3* byval %p3, %struct.s4* byval %p4, %struct.s5* byval %p5, %struct.s6* byval %p6, %struct.s7* byval %p7) %call = call i32 @callee1(%struct.s1* byval(%struct.s1) %p1, %struct.s2* byval(%struct.s2) %p2, %struct.s3* byval(%struct.s3) %p3, %struct.s4* byval(%struct.s4) %p4, %struct.s5* byval(%struct.s5) %p5, %struct.s6* byval(%struct.s6) %p6, %struct.s7* byval(%struct.s7) %p7)
ret i32 %call ret i32 %call
; CHECK: ld 9, 112(31) ; CHECK: ld 9, 112(31)
; CHECK: ld 8, 120(31) ; CHECK: ld 8, 120(31)
; CHECK: ld 7, 128(31) ; CHECK: ld 7, 128(31)
; CHECK: lwz 6, 136(31) ; CHECK: lwz 6, 136(31)
; CHECK: lwz 5, 144(31) ; CHECK: lwz 5, 144(31)
; CHECK: lhz 4, 152(31) ; CHECK: lhz 4, 152(31)
; CHECK: lbz 3, 160(31) ; CHECK: lbz 3, 160(31)
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
define internal i32 @callee1(%struct.s1* byval %v1, %struct.s2* byval %v2, %struct.s3* byval %v3, %struct.s4* byval %v4, %struct.s5* byval %v5, %struct.s6* byval %v6, %struct.s7* byval %v7) nounwind { define internal i32 @callee1(%struct.s1* byval(%struct.s1) %v1, %struct.s2* byval(%struct.s2) %v2, %struct.s3* byval(%struct.s3) %v3, %struct.s4* byval(%struct.s4) %v4, %struct.s5* byval(%struct.s5) %v5, %struct.s6* byval(%struct.s6) %v6, %struct.s7* byval(%struct.s7) %v7) nounwind {
entry: entry:
%a = getelementptr inbounds %struct.s1, %struct.s1* %v1, i32 0, i32 0 %a = getelementptr inbounds %struct.s1, %struct.s1* %v1, i32 0, i32 0
%0 = load i8, i8* %a, align 1 %0 = load i8, i8* %a, align 1
%conv = zext i8 %0 to i32 %conv = zext i8 %0 to i32
%a1 = getelementptr inbounds %struct.s2, %struct.s2* %v2, i32 0, i32 0 %a1 = getelementptr inbounds %struct.s2, %struct.s2* %v2, i32 0, i32 0
%1 = load i16, i16* %a1, align 2 %1 = load i16, i16* %a1, align 2
%conv2 = sext i16 %1 to i32 %conv2 = sext i16 %1 to i32
%add = add nsw i32 %conv, %conv2 %add = add nsw i32 %conv, %conv2
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Linesentry:
%3 = bitcast %struct.t4* %p4 to i8* %3 = bitcast %struct.t4* %p4 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast ({ i32 }* @caller2.p4 to i8*), i64 4, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %3, i8* bitcast ({ i32 }* @caller2.p4 to i8*), i64 4, i32 1, i1 false)
%4 = bitcast %struct.t5* %p5 to i8* %4 = bitcast %struct.t5* %p5 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast (%struct.t5* @caller2.p5 to i8*), i64 5, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* bitcast (%struct.t5* @caller2.p5 to i8*), i64 5, i32 1, i1 false)
%5 = bitcast %struct.t6* %p6 to i8* %5 = bitcast %struct.t6* %p6 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast (%struct.t6* @caller2.p6 to i8*), i64 6, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %5, i8* bitcast (%struct.t6* @caller2.p6 to i8*), i64 6, i32 1, i1 false)
%6 = bitcast %struct.t7* %p7 to i8* %6 = bitcast %struct.t7* %p7 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast (%struct.t7* @caller2.p7 to i8*), i64 7, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %6, i8* bitcast (%struct.t7* @caller2.p7 to i8*), i64 7, i32 1, i1 false)
%call = call i32 @callee2(%struct.t1* byval %p1, %struct.t2* byval %p2, %struct.t3* byval %p3, %struct.t4* byval %p4, %struct.t5* byval %p5, %struct.t6* byval %p6, %struct.t7* byval %p7) %call = call i32 @callee2(%struct.t1* byval(%struct.t1) %p1, %struct.t2* byval(%struct.t2) %p2, %struct.t3* byval(%struct.t3) %p3, %struct.t4* byval(%struct.t4) %p4, %struct.t5* byval(%struct.t5) %p5, %struct.t6* byval(%struct.t6) %p6, %struct.t7* byval(%struct.t7) %p7)
ret i32 %call ret i32 %call
; CHECK: stb {{[0-9]+}}, 71(1) ; CHECK: stb {{[0-9]+}}, 71(1)
; CHECK: sth {{[0-9]+}}, 69(1) ; CHECK: sth {{[0-9]+}}, 69(1)
; CHECK: stb {{[0-9]+}}, 87(1) ; CHECK: stb {{[0-9]+}}, 87(1)
; CHECK: stw {{[0-9]+}}, 83(1) ; CHECK: stw {{[0-9]+}}, 83(1)
; CHECK: sth {{[0-9]+}}, 94(1) ; CHECK: sth {{[0-9]+}}, 94(1)
; CHECK: stw {{[0-9]+}}, 90(1) ; CHECK: stw {{[0-9]+}}, 90(1)
; CHECK: stb {{[0-9]+}}, 103(1) ; CHECK: stb {{[0-9]+}}, 103(1)
; CHECK: sth {{[0-9]+}}, 101(1) ; CHECK: sth {{[0-9]+}}, 101(1)
; CHECK: stw {{[0-9]+}}, 97(1) ; CHECK: stw {{[0-9]+}}, 97(1)
; CHECK: ld 9, 96(1) ; CHECK: ld 9, 96(1)
; CHECK: ld 8, 88(1) ; CHECK: ld 8, 88(1)
; CHECK: ld 7, 80(1) ; CHECK: ld 7, 80(1)
; CHECK: lwz 6, 136(31) ; CHECK: lwz 6, 136(31)
; CHECK: ld 5, 64(1) ; CHECK: ld 5, 64(1)
; CHECK: lhz 4, 152(31) ; CHECK: lhz 4, 152(31)
; CHECK: lbz 3, 160(31) ; CHECK: lbz 3, 160(31)
} }
define internal i32 @callee2(%struct.t1* byval %v1, %struct.t2* byval %v2, %struct.t3* byval %v3, %struct.t4* byval %v4, %struct.t5* byval %v5, %struct.t6* byval %v6, %struct.t7* byval %v7) nounwind { define internal i32 @callee2(%struct.t1* byval(%struct.t1) %v1, %struct.t2* byval(%struct.t2) %v2, %struct.t3* byval(%struct.t3) %v3, %struct.t4* byval(%struct.t4) %v4, %struct.t5* byval(%struct.t5) %v5, %struct.t6* byval(%struct.t6) %v6, %struct.t7* byval(%struct.t7) %v7) nounwind {
entry: entry:
%a = getelementptr inbounds %struct.t1, %struct.t1* %v1, i32 0, i32 0 %a = getelementptr inbounds %struct.t1, %struct.t1* %v1, i32 0, i32 0
%0 = load i8, i8* %a, align 1 %0 = load i8, i8* %a, align 1
%conv = zext i8 %0 to i32 %conv = zext i8 %0 to i32
%a1 = getelementptr inbounds %struct.t2, %struct.t2* %v2, i32 0, i32 0 %a1 = getelementptr inbounds %struct.t2, %struct.t2* %v2, i32 0, i32 0
%1 = load i16, i16* %a1, align 1 %1 = load i16, i16* %a1, align 1
%conv2 = sext i16 %1 to i32 %conv2 = sext i16 %1 to i32
%add = add nsw i32 %conv, %conv2 %add = add nsw i32 %conv, %conv2
Show All 33 Lines

test/CodeGen/PowerPC/vec-abi-align.ll

Show All 18 Lines
; CHECK: blr ; CHECK: blr
; CHECK-VSX-LABEL: @test1 ; CHECK-VSX-LABEL: @test1
; CHECK-VSX: stxvw4x 34, ; CHECK-VSX: stxvw4x 34,
; CHECK-VSX: blr ; CHECK-VSX: blr
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
define void @test2(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, %struct.s2* byval nocapture readonly %vs) #0 { define void @test2(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, %struct.s2* nocapture readonly byval(%struct.s2) %vs) #0 {
entry: entry:
%m = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 0 %m = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 0
%0 = load i64, i64* %m, align 8 %0 = load i64, i64* %m, align 8
store i64 %0, i64* @n, align 8 store i64 %0, i64* @n, align 8
%v = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 1 %v = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 1
%1 = load <4 x float>, <4 x float>* %v, align 16 %1 = load <4 x float>, <4 x float>* %v, align 16
store <4 x float> %1, <4 x float>* @ve, align 16 store <4 x float> %1, <4 x float>* @ve, align 16
ret void ret void
Show All 9 Lines
; CHECK-VSX-DAG: ld {{[0-9]+}}, 112(1) ; CHECK-VSX-DAG: ld {{[0-9]+}}, 112(1)
; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 16 ; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 16
; CHECK-VSX-DAG: addi [[REGB:[0-9]+]], 1, 112 ; CHECK-VSX-DAG: addi [[REGB:[0-9]+]], 1, 112
; CHECK-VSX-DAG: lxvw4x {{[0-9]+}}, [[REGB]], [[REG16]] ; CHECK-VSX-DAG: lxvw4x {{[0-9]+}}, [[REGB]], [[REG16]]
; CHECK-VSX: blr ; CHECK-VSX: blr
} }
; Function Attrs: nounwind ; Function Attrs: nounwind
define void @test3(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, i64 %d9, %struct.s2* byval nocapture readonly %vs) #0 { define void @test3(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, i64 %d9, %struct.s2* nocapture readonly byval(%struct.s2) %vs) #0 {
entry: entry:
%m = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 0 %m = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 0
%0 = load i64, i64* %m, align 8 %0 = load i64, i64* %m, align 8
store i64 %0, i64* @n, align 8 store i64 %0, i64* @n, align 8
%v = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 1 %v = getelementptr inbounds %struct.s2, %struct.s2* %vs, i64 0, i32 1
%1 = load <4 x float>, <4 x float>* %v, align 16 %1 = load <4 x float>, <4 x float>* %v, align 16
store <4 x float> %1, <4 x float>* @ve, align 16 store <4 x float> %1, <4 x float>* @ve, align 16
ret void ret void
Show All 18 Lines

test/CodeGen/SPARC/2011-01-21-ByValArgs.ll

;RUN: llc -march=sparc < %s | FileCheck %s ;RUN: llc -march=sparc < %s | FileCheck %s
%struct.foo_t = type { i32, i32, i32 } %struct.foo_t = type { i32, i32, i32 }
@s = internal unnamed_addr global %struct.foo_t { i32 10, i32 20, i32 30 } @s = internal unnamed_addr global %struct.foo_t { i32 10, i32 20, i32 30 }
define i32 @test() nounwind { define i32 @test() nounwind {
entry: entry:
;CHECK-LABEL: test: ;CHECK-LABEL: test:
;CHECK: st ;CHECK: st
;CHECK: st ;CHECK: st
;CHECK: st ;CHECK: st
;CHECK: bar ;CHECK: bar
%0 = tail call i32 @bar(%struct.foo_t* byval @s) nounwind %0 = tail call i32 @bar(%struct.foo_t* byval(%struct.foo_t) @s) nounwind
ret i32 %0 ret i32 %0
} }
declare i32 @bar(%struct.foo_t* byval) declare i32 @bar(%struct.foo_t* byval(%struct.foo_t))

test/CodeGen/SPARC/fp128.ll

Show All 20 Lines
; SOFT: ldd ; SOFT: ldd
; SOFT: call _Q_add ; SOFT: call _Q_add
; SOFT: call _Q_sub ; SOFT: call _Q_sub
; SOFT: call _Q_mul ; SOFT: call _Q_mul
; SOFT: call _Q_div ; SOFT: call _Q_div
; SOFT: std ; SOFT: std
; SOFT: std ; SOFT: std
define void @f128_ops(fp128* noalias sret %scalar.result, fp128* byval %a, fp128* byval %b, fp128* byval %c, fp128* byval %d) { define void @f128_ops(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a, fp128* byval(fp128) %b, fp128* byval(fp128) %c, fp128* byval(fp128) %d) {
entry: entry:
%0 = load fp128, fp128* %a, align 8 %0 = load fp128, fp128* %a, align 8
%1 = load fp128, fp128* %b, align 8 %1 = load fp128, fp128* %b, align 8
%2 = load fp128, fp128* %c, align 8 %2 = load fp128, fp128* %c, align 8
%3 = load fp128, fp128* %d, align 8 %3 = load fp128, fp128* %d, align 8
%4 = fadd fp128 %0, %1 %4 = fadd fp128 %0, %1
%5 = fsub fp128 %4, %2 %5 = fsub fp128 %4, %2
%6 = fmul fp128 %5, %3 %6 = fmul fp128 %5, %3
Show All 11 Lines
; SOFT-LABEL: f128_spill ; SOFT-LABEL: f128_spill
; SOFT: std %f{{.+}}, [%[[S0:.+]]] ; SOFT: std %f{{.+}}, [%[[S0:.+]]]
; SOFT: std %f{{.+}}, [%[[S1:.+]]] ; SOFT: std %f{{.+}}, [%[[S1:.+]]]
; SOFT-DAG: ldd [%[[S0]]], %f{{.+}} ; SOFT-DAG: ldd [%[[S0]]], %f{{.+}}
; SOFT-DAG: ldd [%[[S1]]], %f{{.+}} ; SOFT-DAG: ldd [%[[S1]]], %f{{.+}}
; SOFT: jmp {{%[oi]7}}+12 ; SOFT: jmp {{%[oi]7}}+12
define void @f128_spill(fp128* noalias sret %scalar.result, fp128* byval %a) { define void @f128_spill(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a) {
entry: entry:
%0 = load fp128, fp128* %a, align 8 %0 = load fp128, fp128* %a, align 8
call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"() call void asm sideeffect "", "~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
store fp128 %0, fp128* %scalar.result, align 8 store fp128 %0, fp128* %scalar.result, align 8
ret void ret void
} }
; HARD-LABEL: f128_compare ; HARD-LABEL: f128_compare
; HARD: fcmpq ; HARD: fcmpq
; HARD-NEXT: nop ; HARD-NEXT: nop
; SOFT-LABEL: f128_compare ; SOFT-LABEL: f128_compare
; SOFT: _Q_cmp ; SOFT: _Q_cmp
define i32 @f128_compare(fp128* byval %f0, fp128* byval %f1, i32 %a, i32 %b) { define i32 @f128_compare(fp128* byval(fp128) %f0, fp128* byval(fp128) %f1, i32 %a, i32 %b) {
entry: entry:
%0 = load fp128, fp128* %f0, align 8 %0 = load fp128, fp128* %f0, align 8
%1 = load fp128, fp128* %f1, align 8 %1 = load fp128, fp128* %f1, align 8
%cond = fcmp ult fp128 %0, %1 %cond = fcmp ult fp128 %0, %1
%ret = select i1 %cond, i32 %a, i32 %b %ret = select i1 %cond, i32 %a, i32 %b
ret i32 %ret ret i32 %ret
} }
Show All 19 Lines
; HARD-LABEL: f128_abs ; HARD-LABEL: f128_abs
; HARD: fabss ; HARD: fabss
; SOFT-LABEL: f128_abs ; SOFT-LABEL: f128_abs
; SOFT: fabss ; SOFT: fabss
define void @f128_abs(fp128* noalias sret %scalar.result, fp128* byval %a) { define void @f128_abs(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a) {
entry: entry:
%0 = load fp128, fp128* %a, align 8 %0 = load fp128, fp128* %a, align 8
%1 = tail call fp128 @llvm.fabs.f128(fp128 %0) %1 = tail call fp128 @llvm.fabs.f128(fp128 %0)
store fp128 %1, fp128* %scalar.result, align 8 store fp128 %1, fp128* %scalar.result, align 8
ret void ret void
} }
declare fp128 @llvm.fabs.f128(fp128) nounwind readonly declare fp128 @llvm.fabs.f128(fp128) nounwind readonly
▲ Show 20 Lines • Show All 118 Lines • ▼ Show 20 Linesentry:
%4 = bitcast i64* %ptr0 to i32* %4 = bitcast i64* %ptr0 to i32*
store i32 %3, i32* %4, align 8 store i32 %3, i32* %4, align 8
ret void ret void
} }
; SOFT-LABEL: f128_neg ; SOFT-LABEL: f128_neg
; SOFT: fnegs ; SOFT: fnegs
define void @f128_neg(fp128* noalias sret %scalar.result, fp128* byval %a) { define void @f128_neg(fp128* noalias sret %scalar.result, fp128* byval(fp128) %a) {
entry: entry:
%0 = load fp128, fp128* %a, align 8 %0 = load fp128, fp128* %a, align 8
%1 = fsub fp128 0xL00000000000000008000000000000000, %0 %1 = fsub fp128 0xL00000000000000008000000000000000, %0
store fp128 %1, fp128* %scalar.result, align 8 store fp128 %1, fp128* %scalar.result, align 8
ret void ret void
} }

test/CodeGen/SPARC/setjmp.ll

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; V9-LABEL: foo ; V9-LABEL: foo
; V9-DAG: st {{.+}}, [%i0] ; V9-DAG: st {{.+}}, [%i0]
; V9-DAG: st {{.+}}, [%i0+4] ; V9-DAG: st {{.+}}, [%i0+4]
; V9: call _setjmp ; V9: call _setjmp
; V9: ldx [%fp+{{.+}}], %[[R:[gilo][0-7]]] ; V9: ldx [%fp+{{.+}}], %[[R:[gilo][0-7]]]
; V9: st %o0, [%[[R]]+{{.+}}] ; V9: st %o0, [%[[R]]+{{.+}}]
; Function Attrs: nounwind ; Function Attrs: nounwind
define i32 @foo(%struct.jmpbuf_env* byval %inbuf) #0 { define i32 @foo(%struct.jmpbuf_env* byval(%struct.jmpbuf_env) %inbuf) #0 {
entry: entry:
%0 = getelementptr inbounds %struct.jmpbuf_env, %struct.jmpbuf_env* %inbuf, i32 0, i32 0 %0 = getelementptr inbounds %struct.jmpbuf_env, %struct.jmpbuf_env* %inbuf, i32 0, i32 0
store i32 0, i32* %0, align 4, !tbaa !4 store i32 0, i32* %0, align 4, !tbaa !4
%1 = getelementptr inbounds %struct.jmpbuf_env, %struct.jmpbuf_env* %inbuf, i32 0, i32 1 %1 = getelementptr inbounds %struct.jmpbuf_env, %struct.jmpbuf_env* %inbuf, i32 0, i32 1
store i32 1, i32* %1, align 4, !tbaa !4 store i32 1, i32* %1, align 4, !tbaa !4
%2 = getelementptr inbounds %struct.jmpbuf_env, %struct.jmpbuf_env* %inbuf, i32 0, i32 2, i32 0 %2 = getelementptr inbounds %struct.jmpbuf_env, %struct.jmpbuf_env* %inbuf, i32 0, i32 2, i32 0
%3 = call i32 @_setjmp(%struct.__jmp_buf_tag* %2) #2 %3 = call i32 @_setjmp(%struct.__jmp_buf_tag* %2) #2
%4 = getelementptr inbounds %struct.jmpbuf_env, %struct.jmpbuf_env* %inbuf, i32 0, i32 3 %4 = getelementptr inbounds %struct.jmpbuf_env, %struct.jmpbuf_env* %inbuf, i32 0, i32 3
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test/CodeGen/Thumb/2011-05-11-DAGLegalizer.ll

Show First 20 Lines • Show All 42 Lines • ▼ Show 20 Linesdo.body: ; preds = %entry
%tmp15 = bitcast %struct.RRRRRRRR* %arrayidx13 to i8* %tmp15 = bitcast %struct.RRRRRRRR* %arrayidx13 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp14, i8* %tmp15, i32 312, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp14, i8* %tmp15, i32 312, i32 4, i1 false)
%tmp17 = load %struct.MMMMMMMMMMMM*, %struct.MMMMMMMMMMMM** %aidData.addr %tmp17 = load %struct.MMMMMMMMMMMM*, %struct.MMMMMMMMMMMM** %aidData.addr
%eph18 = getelementptr inbounds %struct.MMMMMMMMMMMM, %struct.MMMMMMMMMMMM* %tmp17, i32 0, i32 0 %eph18 = getelementptr inbounds %struct.MMMMMMMMMMMM, %struct.MMMMMMMMMMMM* %tmp17, i32 0, i32 0
%arrayidx19 = getelementptr inbounds [4 x %struct.RRRRRRRR], [4 x %struct.RRRRRRRR]* %eph18, i32 0, i32 3 %arrayidx19 = getelementptr inbounds [4 x %struct.RRRRRRRR], [4 x %struct.RRRRRRRR]* %eph18, i32 0, i32 3
%tmp20 = bitcast %struct.RRRRRRRR* %agg.tmp16 to i8* %tmp20 = bitcast %struct.RRRRRRRR* %agg.tmp16 to i8*
%tmp21 = bitcast %struct.RRRRRRRR* %arrayidx19 to i8* %tmp21 = bitcast %struct.RRRRRRRR* %arrayidx19 to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp20, i8* %tmp21, i32 312, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp20, i8* %tmp21, i32 312, i32 4, i1 false)
call void (i8*, i32, i8*, i8*, ...) @CLLoggingLog(i8* %tmp, i32 2, i8* getelementptr inbounds ([62 x i8], [62 x i8]* @__PRETTY_FUNCTION__._ZN12CLGll, i32 0, i32 0), i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str, i32 0, i32 0), %struct.RRRRRRRR* byval %agg.tmp, %struct.RRRRRRRR* byval %agg.tmp4, %struct.RRRRRRRR* byval %agg.tmp10, %struct.RRRRRRRR* byval %agg.tmp16) call void (i8*, i32, i8*, i8*, ...) @CLLoggingLog(i8* %tmp, i32 2, i8* getelementptr inbounds ([62 x i8], [62 x i8]* @__PRETTY_FUNCTION__._ZN12CLGll, i32 0, i32 0), i8* getelementptr inbounds ([75 x i8], [75 x i8]* @.str, i32 0, i32 0), %struct.RRRRRRRR* byval(%struct.RRRRRRRR) %agg.tmp, %struct.RRRRRRRR* byval(%struct.RRRRRRRR) %agg.tmp4, %struct.RRRRRRRR* byval(%struct.RRRRRRRR) %agg.tmp10, %struct.RRRRRRRR* byval(%struct.RRRRRRRR) %agg.tmp16)
br label %do.end br label %do.end
do.end: ; preds = %do.body do.end: ; preds = %do.body
ret void ret void
} }
declare void @CLLoggingLog(i8*, i32, i8*, i8*, ...) declare void @CLLoggingLog(i8*, i32, i8*, i8*, ...)
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind

test/CodeGen/Thumb/PR17309.ll

; RUN: llc -mtriple thumbv5-none-linux-gnueabi < %s | FileCheck %s ; RUN: llc -mtriple thumbv5-none-linux-gnueabi < %s | FileCheck %s
%struct.C = type { [1000 x i8] } %struct.C = type { [1000 x i8] }
%struct.S = type { [1000 x i16] } %struct.S = type { [1000 x i16] }
%struct.I = type { [1000 x i32] } %struct.I = type { [1000 x i32] }
;CHECK-LABEL: pass_C: ;CHECK-LABEL: pass_C:
;CHECK-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1 ;CHECK-NOT: ldrb r{{[0-9]+}}, [{{.*}}], #1
;CHECK-NOT: strb r{{[0-9]+}}, [{{.*}}], #1 ;CHECK-NOT: strb r{{[0-9]+}}, [{{.*}}], #1
define void @pass_C() #0 { define void @pass_C() #0 {
entry: entry:
%c = alloca %struct.C, align 1 %c = alloca %struct.C, align 1
%0 = getelementptr inbounds %struct.C, %struct.C* %c, i32 0, i32 0, i32 0 %0 = getelementptr inbounds %struct.C, %struct.C* %c, i32 0, i32 0, i32 0
call void @llvm.lifetime.start(i64 1000, i8* %0) #1 call void @llvm.lifetime.start(i64 1000, i8* %0) #1
call void @use_C(%struct.C* byval %c) #3 call void @use_C(%struct.C* byval(%struct.C) %c) #3
call void @llvm.lifetime.end(i64 1000, i8* %0) #1 call void @llvm.lifetime.end(i64 1000, i8* %0) #1
ret void ret void
} }
;CHECK-LABEL: pass_S: ;CHECK-LABEL: pass_S:
;CHECK-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2 ;CHECK-NOT: ldrh r{{[0-9]+}}, [{{.*}}], #2
;CHECK-NOT: strh r{{[0-9]+}}, [{{.*}}], #2 ;CHECK-NOT: strh r{{[0-9]+}}, [{{.*}}], #2
define void @pass_S() #0 { define void @pass_S() #0 {
entry: entry:
%s = alloca %struct.S, align 2 %s = alloca %struct.S, align 2
%0 = bitcast %struct.S* %s to i8* %0 = bitcast %struct.S* %s to i8*
call void @llvm.lifetime.start(i64 2000, i8* %0) #1 call void @llvm.lifetime.start(i64 2000, i8* %0) #1
call void @use_S(%struct.S* byval %s) #3 call void @use_S(%struct.S* byval(%struct.S) %s) #3
call void @llvm.lifetime.end(i64 2000, i8* %0) #1 call void @llvm.lifetime.end(i64 2000, i8* %0) #1
ret void ret void
} }
;CHECK-LABEL: pass_I: ;CHECK-LABEL: pass_I:
;CHECK-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4 ;CHECK-NOT: ldr r{{[0-9]+}}, [{{.*}}], #4
;CHECK-NOT: str r{{[0-9]+}}, [{{.*}}], #4 ;CHECK-NOT: str r{{[0-9]+}}, [{{.*}}], #4
define void @pass_I() #0 { define void @pass_I() #0 {
entry: entry:
%i = alloca %struct.I, align 4 %i = alloca %struct.I, align 4
%0 = bitcast %struct.I* %i to i8* %0 = bitcast %struct.I* %i to i8*
call void @llvm.lifetime.start(i64 4000, i8* %0) #1 call void @llvm.lifetime.start(i64 4000, i8* %0) #1
call void @use_I(%struct.I* byval %i) #3 call void @use_I(%struct.I* byval(%struct.I) %i) #3
call void @llvm.lifetime.end(i64 4000, i8* %0) #1 call void @llvm.lifetime.end(i64 4000, i8* %0) #1
ret void ret void
} }
declare void @use_C(%struct.C* byval) #2 declare void @use_C(%struct.C* byval(%struct.C)) #2
declare void @use_S(%struct.S* byval) #2 declare void @use_S(%struct.S* byval(%struct.S)) #2
declare void @use_I(%struct.I* byval) #2 declare void @use_I(%struct.I* byval(%struct.I)) #2
declare void @llvm.lifetime.start(i64, i8* nocapture) #1 declare void @llvm.lifetime.start(i64, i8* nocapture) #1
declare void @llvm.lifetime.end(i64, i8* nocapture) #1 declare void @llvm.lifetime.end(i64, i8* nocapture) #1
attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { nounwind } attributes #1 = { nounwind }
attributes #2 = { optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #2 = { optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #3 = { nounwind optsize } attributes #3 = { nounwind optsize }

test/CodeGen/X86/2008-04-24-MemCpyBug.ll

; RUN: llc < %s -march=x86 | not grep 120 ; RUN: llc < %s -march=x86 | not grep 120
; Don't accidentally add the offset twice for trailing bytes. ; Don't accidentally add the offset twice for trailing bytes.
%struct.S63 = type { [63 x i8] } %struct.S63 = type { [63 x i8] }
@g1s63 = external global %struct.S63 ; <%struct.S63*> [#uses=1] @g1s63 = external global %struct.S63 ; <%struct.S63*> [#uses=1]
declare void @test63(%struct.S63* byval align 4 ) nounwind declare void @test63(%struct.S63* align 4 byval(%struct.S63) ) nounwind
define void @testit63_entry_2E_ce() nounwind { define void @testit63_entry_2E_ce() nounwind {
tail call void @test63( %struct.S63* byval align 4 @g1s63 ) nounwind tail call void @test63( %struct.S63* align 4 byval(%struct.S63) @g1s63 ) nounwind
ret void ret void
} }

test/CodeGen/X86/2009-04-14-IllegalRegs.ll

Show All 15 Linesentry:
%3 = getelementptr %struct.X, %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1] %3 = getelementptr %struct.X, %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1]
%4 = getelementptr [32 x i8], [32 x i8]* %3, i32 0, i32 31 ; <i8*> [#uses=1] %4 = getelementptr [32 x i8], [32 x i8]* %3, i32 0, i32 31 ; <i8*> [#uses=1]
%5 = load i8, i8* %4, align 1 ; <i8> [#uses=1] %5 = load i8, i8* %4, align 1 ; <i8> [#uses=1]
%6 = getelementptr %struct.X, %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1] %6 = getelementptr %struct.X, %struct.X* %xxx, i32 0, i32 1 ; <[32 x i8]*> [#uses=1]
%7 = getelementptr [32 x i8], [32 x i8]* %6, i32 0, i32 0 ; <i8*> [#uses=1] %7 = getelementptr [32 x i8], [32 x i8]* %6, i32 0, i32 0 ; <i8*> [#uses=1]
store i8 %5, i8* %7, align 1 store i8 %5, i8* %7, align 1
%8 = getelementptr %struct.X, %struct.X* %xxx, i32 0, i32 0 ; <i8*> [#uses=1] %8 = getelementptr %struct.X, %struct.X* %xxx, i32 0, i32 0 ; <i8*> [#uses=1]
store i8 15, i8* %8, align 1 store i8 15, i8* %8, align 1
%9 = call i32 (...) bitcast (i32 (%struct.X*, %struct.X*)* @f to i32 (...)*)(%struct.X* byval align 4 %xxx, %struct.X* byval align 4 %xxx) nounwind ; <i32> [#uses=1] %9 = call i32 (...) bitcast (i32 (%struct.X*, %struct.X*)* @f to i32 (...)*)(%struct.X* align 4 byval(%struct.X) %xxx, %struct.X* align 4 byval(%struct.X) %xxx) nounwind ; <i32> [#uses=1]
store i32 %9, i32* %0, align 4 store i32 %9, i32* %0, align 4
%10 = load i32, i32* %0, align 4 ; <i32> [#uses=1] %10 = load i32, i32* %0, align 4 ; <i32> [#uses=1]
store i32 %10, i32* %retval, align 4 store i32 %10, i32* %retval, align 4
br label %return br label %return
return: ; preds = %entry return: ; preds = %entry
%retval1 = load i32, i32* %retval ; <i32> [#uses=1] %retval1 = load i32, i32* %retval ; <i32> [#uses=1]
ret i32 %retval1 ret i32 %retval1
} }
declare i32 @f(%struct.X* byval align 4, %struct.X* byval align 4) nounwind ssp declare i32 @f(%struct.X* align 4 byval(%struct.X), %struct.X* align 4 byval(%struct.X)) nounwind ssp

test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll

; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim ; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -disable-fp-elim
; rdar://7394770 ; rdar://7394770
%struct.JVTLib_100487 = type <{ i8 }> %struct.JVTLib_100487 = type <{ i8 }>
define i32 @_Z13JVTLib_10335613JVTLib_10266513JVTLib_100579S_S_S_jPhj(i16* nocapture %ResidualX_Array.0, %struct.JVTLib_100487* nocapture byval align 4 %xqp, i16* nocapture %ResidualL_Array.0, i16* %ResidualDCZ_Array.0, i16* nocapture %ResidualACZ_FOArray.0, i32 %useFRextDequant, i8* nocapture %JVTLib_103357, i32 %use_field_scan) ssp { define i32 @_Z13JVTLib_10335613JVTLib_10266513JVTLib_100579S_S_S_jPhj(i16* nocapture %ResidualX_Array.0, %struct.JVTLib_100487* nocapture align 4 byval(%struct.JVTLib_100487) %xqp, i16* nocapture %ResidualL_Array.0, i16* %ResidualDCZ_Array.0, i16* nocapture %ResidualACZ_FOArray.0, i32 %useFRextDequant, i8* nocapture %JVTLib_103357, i32 %use_field_scan) ssp {
bb.nph: bb.nph:
%0 = shl i32 undef, 1 ; <i32> [#uses=2] %0 = shl i32 undef, 1 ; <i32> [#uses=2]
%mask133.masked.masked.masked.masked.masked.masked = or i640 undef, undef ; <i640> [#uses=1] %mask133.masked.masked.masked.masked.masked.masked = or i640 undef, undef ; <i640> [#uses=1]
br label %bb br label %bb
bb: ; preds = %_ZL13JVTLib_105204PKsPK13JVTLib_105184PsPhjS5_j.exit, %bb.nph bb: ; preds = %_ZL13JVTLib_105204PKsPK13JVTLib_105184PsPhjS5_j.exit, %bb.nph
br i1 undef, label %bb2, label %bb1 br i1 undef, label %bb2, label %bb1
▲ Show 20 Lines • Show All 119 Lines • Show Last 20 Lines

test/CodeGen/X86/2010-01-18-DbgValue.ll

; RUN: llc -march=x86 -O0 < %s | FileCheck %s ; RUN: llc -march=x86 -O0 < %s | FileCheck %s
; Currently, dbg.declare generates a DEBUG_VALUE comment. Eventually it will ; Currently, dbg.declare generates a DEBUG_VALUE comment. Eventually it will
; generate DWARF and this test will need to be modified or removed. ; generate DWARF and this test will need to be modified or removed.
%struct.Pt = type { double, double } %struct.Pt = type { double, double }
%struct.Rect = type { %struct.Pt, %struct.Pt } %struct.Rect = type { %struct.Pt, %struct.Pt }
define double @foo(%struct.Rect* byval %my_r0) nounwind ssp !dbg !1 { define double @foo(%struct.Rect* byval(%struct.Rect) %my_r0) nounwind ssp !dbg !1 {
entry: entry:
;CHECK: DEBUG_VALUE ;CHECK: DEBUG_VALUE
%retval = alloca double ; <double*> [#uses=2] %retval = alloca double ; <double*> [#uses=2]
%0 = alloca double ; <double*> [#uses=2] %0 = alloca double ; <double*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
call void @llvm.dbg.declare(metadata %struct.Rect* %my_r0, metadata !0, metadata !DIExpression()), !dbg !15 call void @llvm.dbg.declare(metadata %struct.Rect* %my_r0, metadata !0, metadata !DIExpression()), !dbg !15
%1 = getelementptr inbounds %struct.Rect, %struct.Rect* %my_r0, i32 0, i32 0, !dbg !16 ; <%struct.Pt*> [#uses=1] %1 = getelementptr inbounds %struct.Rect, %struct.Rect* %my_r0, i32 0, i32 0, !dbg !16 ; <%struct.Pt*> [#uses=1]
%2 = getelementptr inbounds %struct.Pt, %struct.Pt* %1, i32 0, i32 0, !dbg !16 ; <double*> [#uses=1] %2 = getelementptr inbounds %struct.Pt, %struct.Pt* %1, i32 0, i32 0, !dbg !16 ; <double*> [#uses=1]
Show All 38 Lines

test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll

; RUN: llc < %s -O0 -regalloc=fast -relocation-model=pic -disable-fp-elim | FileCheck %s ; RUN: llc < %s -O0 -regalloc=fast -relocation-model=pic -disable-fp-elim | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-darwin10.0.0" target triple = "i386-apple-darwin10.0.0"
%struct.S = type { [2 x i8*] } %struct.S = type { [2 x i8*] }
@_ZTIi = external constant i8* ; <i8**> [#uses=1] @_ZTIi = external constant i8* ; <i8**> [#uses=1]
@.str = internal constant [4 x i8] c"%p\0A\00" ; <[4 x i8]*> [#uses=1] @.str = internal constant [4 x i8] c"%p\0A\00" ; <[4 x i8]*> [#uses=1]
@llvm.used = appending global [1 x i8*] [i8* bitcast (i8* (%struct.S*, i32, %struct.S*)* @_Z4test1SiS_ to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] @llvm.used = appending global [1 x i8*] [i8* bitcast (i8* (%struct.S*, i32, %struct.S*)* @_Z4test1SiS_ to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
; Verify that %esi gets spilled before the call. ; Verify that %esi gets spilled before the call.
; CHECK: Z4test1SiS ; CHECK: Z4test1SiS
; CHECK: movl %esi,{{.*}}(%ebp) ; CHECK: movl %esi,{{.*}}(%ebp)
; CHECK: calll __Z6throwsv ; CHECK: calll __Z6throwsv
define i8* @_Z4test1SiS_(%struct.S* byval %s1, i32 %n, %struct.S* byval %s2) ssp personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) { define i8* @_Z4test1SiS_(%struct.S* byval(%struct.S) %s1, i32 %n, %struct.S* byval(%struct.S) %s2) ssp personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
entry: entry:
%retval = alloca i8*, align 4 ; <i8**> [#uses=2] %retval = alloca i8*, align 4 ; <i8**> [#uses=2]
%n.addr = alloca i32, align 4 ; <i32*> [#uses=1] %n.addr = alloca i32, align 4 ; <i32*> [#uses=1]
%_rethrow = alloca i8* ; <i8**> [#uses=4] %_rethrow = alloca i8* ; <i8**> [#uses=4]
%0 = alloca i32, align 4 ; <i32*> [#uses=1] %0 = alloca i32, align 4 ; <i32*> [#uses=1]
%cleanup.dst = alloca i32 ; <i32*> [#uses=3] %cleanup.dst = alloca i32 ; <i32*> [#uses=3]
%cleanup.dst7 = alloca i32 ; <i32*> [#uses=6] %cleanup.dst7 = alloca i32 ; <i32*> [#uses=6]
store i32 %n, i32* %n.addr store i32 %n, i32* %n.addr
▲ Show 20 Lines • Show All 116 Lines • Show Last 20 Lines

test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll

; RUN: llc < %s -march=x86 ; RUN: llc < %s -march=x86
; rdar://7983260 ; rdar://7983260
%struct.T0 = type {} %struct.T0 = type {}
define void @fn4(%struct.T0* byval %arg0) nounwind ssp { define void @fn4(%struct.T0* byval(%struct.T0) %arg0) nounwind ssp {
entry: entry:
ret void ret void
} }

test/CodeGen/X86/2012-11-30-handlemove-dbg.ll

; RUN: llc < %s -mtriple=x86_64-apple-macosx -enable-misched \ ; RUN: llc < %s -mtriple=x86_64-apple-macosx -enable-misched \
; RUN: -verify-machineinstrs | FileCheck %s ; RUN: -verify-machineinstrs | FileCheck %s
; ;
; Test LiveInterval update handling of DBG_VALUE. ; Test LiveInterval update handling of DBG_VALUE.
; rdar://12777252. ; rdar://12777252.
; ;
; CHECK: %entry ; CHECK: %entry
; CHECK: DEBUG_VALUE: subdivp:hg ; CHECK: DEBUG_VALUE: subdivp:hg
; CHECK: j ; CHECK: j
%struct.node.0.27 = type { i16, double, [3 x double], i32, i32 } %struct.node.0.27 = type { i16, double, [3 x double], i32, i32 }
%struct.hgstruct.2.29 = type { %struct.bnode.1.28*, [3 x double], double, [3 x double] } %struct.hgstruct.2.29 = type { %struct.bnode.1.28*, [3 x double], double, [3 x double] }
%struct.bnode.1.28 = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode.1.28*, %struct.bnode.1.28* } %struct.bnode.1.28 = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode.1.28*, %struct.bnode.1.28* }
declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
define signext i16 @subdivp(%struct.node.0.27* nocapture %p, double %dsq, double %tolsq, %struct.hgstruct.2.29* nocapture byval align 8 %hg) nounwind uwtable readonly ssp !dbg !14 { define signext i16 @subdivp(%struct.node.0.27* nocapture %p, double %dsq, double %tolsq, %struct.hgstruct.2.29* nocapture align 8 byval(%struct.hgstruct.2.29) %hg) nounwind uwtable readonly ssp !dbg !14 {
entry: entry:
call void @llvm.dbg.declare(metadata %struct.hgstruct.2.29* %hg, metadata !4, metadata !DIExpression()), !dbg !DILocation(scope: !14) call void @llvm.dbg.declare(metadata %struct.hgstruct.2.29* %hg, metadata !4, metadata !DIExpression()), !dbg !DILocation(scope: !14)
%type = getelementptr inbounds %struct.node.0.27, %struct.node.0.27* %p, i64 0, i32 0 %type = getelementptr inbounds %struct.node.0.27, %struct.node.0.27* %p, i64 0, i32 0
%0 = load i16, i16* %type, align 2 %0 = load i16, i16* %type, align 2
%cmp = icmp eq i16 %0, 1 %cmp = icmp eq i16 %0, 1
br i1 %cmp, label %return, label %for.cond.preheader br i1 %cmp, label %return, label %for.cond.preheader
for.cond.preheader: ; preds = %entry for.cond.preheader: ; preds = %entry
Show All 27 Lines

test/CodeGen/X86/aligned-variadic.ll

; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=X64
; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s -check-prefix=X32 ; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s -check-prefix=X32
%struct.Baz = type { [17 x i8] } %struct.Baz = type { [17 x i8] }
%struct.__va_list_tag = type { i32, i32, i8*, i8* } %struct.__va_list_tag = type { i32, i32, i8*, i8* }
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define void @bar(%struct.Baz* byval nocapture readnone align 8 %x, ...) { define void @bar(%struct.Baz* nocapture readnone align 8 byval(%struct.Baz) %x, ...) {
entry: entry:
%va = alloca [1 x %struct.__va_list_tag], align 16 %va = alloca [1 x %struct.__va_list_tag], align 16
%arraydecay = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %va, i64 0, i64 0 %arraydecay = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %va, i64 0, i64 0
%arraydecay1 = bitcast [1 x %struct.__va_list_tag]* %va to i8* %arraydecay1 = bitcast [1 x %struct.__va_list_tag]* %va to i8*
call void @llvm.va_start(i8* %arraydecay1) call void @llvm.va_start(i8* %arraydecay1)
%overflow_arg_area_p = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %va, i64 0, i64 0, i32 2 %overflow_arg_area_p = getelementptr inbounds [1 x %struct.__va_list_tag], [1 x %struct.__va_list_tag]* %va, i64 0, i64 0, i32 2
%overflow_arg_area = load i8*, i8** %overflow_arg_area_p, align 8 %overflow_arg_area = load i8*, i8** %overflow_arg_area_p, align 8
%overflow_arg_area.next = getelementptr i8, i8* %overflow_arg_area, i64 24 %overflow_arg_area.next = getelementptr i8, i8* %overflow_arg_area, i64 24
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test/CodeGen/X86/byval-align.ll

; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
%struct.S = type { i32} %struct.S = type { i32}
@.str = private constant [10 x i8] c"ptr = %p\0A\00", align 1 ; <[10 x i8]*> [#uses=1] @.str = private constant [10 x i8] c"ptr = %p\0A\00", align 1 ; <[10 x i8]*> [#uses=1]
@.str1 = private constant [8 x i8] c"Failed \00", align 1 ; <[8 x i8]*> [#uses=1] @.str1 = private constant [8 x i8] c"Failed \00", align 1 ; <[8 x i8]*> [#uses=1]
@.str2 = private constant [2 x i8] c"0\00", align 1 ; <[2 x i8]*> [#uses=1] @.str2 = private constant [2 x i8] c"0\00", align 1 ; <[2 x i8]*> [#uses=1]
@.str3 = private constant [7 x i8] c"test.c\00", align 1 ; <[7 x i8]*> [#uses=1] @.str3 = private constant [7 x i8] c"test.c\00", align 1 ; <[7 x i8]*> [#uses=1]
@__PRETTY_FUNCTION__.2067 = internal constant [13 x i8] c"aligned_func\00" ; <[13 x i8]*> [#uses=1] @__PRETTY_FUNCTION__.2067 = internal constant [13 x i8] c"aligned_func\00" ; <[13 x i8]*> [#uses=1]
define void @aligned_func(%struct.S* byval align 64 %obj) nounwind { define void @aligned_func(%struct.S* align 64 byval(%struct.S) %obj) nounwind {
entry: entry:
%ptr = alloca i8* ; <i8**> [#uses=3] %ptr = alloca i8* ; <i8**> [#uses=3]
%p = alloca i64 ; <i64*> [#uses=3] %p = alloca i64 ; <i64*> [#uses=3]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
%obj1 = bitcast %struct.S* %obj to i8* ; <i8*> [#uses=1] %obj1 = bitcast %struct.S* %obj to i8* ; <i8*> [#uses=1]
store i8* %obj1, i8** %ptr, align 8 store i8* %obj1, i8** %ptr, align 8
%0 = load i8*, i8** %ptr, align 8 ; <i8*> [#uses=1] %0 = load i8*, i8** %ptr, align 8 ; <i8*> [#uses=1]
%1 = ptrtoint i8* %0 to i64 ; <i64> [#uses=1] %1 = ptrtoint i8* %0 to i64 ; <i64> [#uses=1]
Show All 27 Lines
define void @main() nounwind { define void @main() nounwind {
entry: entry:
; CHECK: main ; CHECK: main
; CHECK: andq $-64, %rsp ; CHECK: andq $-64, %rsp
%s1 = alloca %struct.S ; <%struct.S*> [#uses=4] %s1 = alloca %struct.S ; <%struct.S*> [#uses=4]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
%0 = getelementptr inbounds %struct.S, %struct.S* %s1, i32 0, i32 0 ; <i32*> [#uses=1] %0 = getelementptr inbounds %struct.S, %struct.S* %s1, i32 0, i32 0 ; <i32*> [#uses=1]
store i32 1, i32* %0, align 4 store i32 1, i32* %0, align 4
call void @aligned_func(%struct.S* byval align 64 %s1) nounwind call void @aligned_func(%struct.S* align 64 byval(%struct.S) %s1) nounwind
br label %return br label %return
return: ; preds = %entry return: ; preds = %entry
ret void ret void
} }

test/CodeGen/X86/byval-callee-cleanup.ll

; RUN: llc < %s -mtriple=i686-win32 | FileCheck %s ; RUN: llc < %s -mtriple=i686-win32 | FileCheck %s
; Previously we would forget to align to stack slot alignment after placing a ; Previously we would forget to align to stack slot alignment after placing a
; byval argument. Subsequent arguments would align themselves, but if it was ; byval argument. Subsequent arguments would align themselves, but if it was
; the last argument, the argument size would not be a multiple of stack slot ; the last argument, the argument size would not be a multiple of stack slot
; size. This resulted in retl $6 in callee-cleanup functions, as well as subtle ; size. This resulted in retl $6 in callee-cleanup functions, as well as subtle
; varargs bugs. ; varargs bugs.
%struct.Six = type { [6 x i8] } %struct.Six = type { [6 x i8] }
define x86_stdcallcc void @f(%struct.Six* byval %a) { define x86_stdcallcc void @f(%struct.Six* byval(%struct.Six) %a) {
ret void ret void
} }
; CHECK-LABEL: _f@8: ; CHECK-LABEL: _f@8:
; CHECK: retl $8 ; CHECK: retl $8
define x86_thiscallcc void @g(i8* %this, %struct.Six* byval %a) { define x86_thiscallcc void @g(i8* %this, %struct.Six* byval(%struct.Six) %a) {
ret void ret void
} }
; CHECK-LABEL: _g: ; CHECK-LABEL: _g:
; CHECK: retl $8 ; CHECK: retl $8
define x86_fastcallcc void @h(i32 inreg %x, i32 inreg %y, %struct.Six* byval %a) { define x86_fastcallcc void @h(i32 inreg %x, i32 inreg %y, %struct.Six* byval(%struct.Six) %a) {
ret void ret void
} }
; CHECK-LABEL: @h@16: ; CHECK-LABEL: @h@16:
; CHECK: retl $8 ; CHECK: retl $8

test/CodeGen/X86/byval.ll

; RUN: llc < %s -mtriple=x86_64-linux | FileCheck -check-prefix=X86-64 %s ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck -check-prefix=X86-64 %s
; Win64 has not supported byval yet. ; Win64 has not supported byval yet.
; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s ; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s
; X86: movl 4(%esp), %eax ; X86: movl 4(%esp), %eax
; X86: movl 8(%esp), %edx ; X86: movl 8(%esp), %edx
; X86-64: movq 8(%rsp), %rax ; X86-64: movq 8(%rsp), %rax
%struct.s = type { i64, i64, i64 } %struct.s = type { i64, i64, i64 }
define i64 @f(%struct.s* byval %a) { define i64 @f(%struct.s* byval(%struct.s) %a) {
entry: entry:
%tmp2 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 0 %tmp2 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 0
%tmp3 = load i64, i64* %tmp2, align 8 %tmp3 = load i64, i64* %tmp2, align 8
ret i64 %tmp3 ret i64 %tmp3
} }

test/CodeGen/X86/byval2.ll

Show All 31 Lines
entry: entry:
%d = alloca %struct.s, align 16 %d = alloca %struct.s, align 16
%tmp = getelementptr %struct.s, %struct.s* %d, i32 0, i32 0 %tmp = getelementptr %struct.s, %struct.s* %d, i32 0, i32 0
store i64 %a, i64* %tmp, align 16 store i64 %a, i64* %tmp, align 16
%tmp2 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 1 %tmp2 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 1
store i64 %b, i64* %tmp2, align 16 store i64 %b, i64* %tmp2, align 16
%tmp4 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 2 %tmp4 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 2
store i64 %c, i64* %tmp4, align 16 store i64 %c, i64* %tmp4, align 16
call void @f( %struct.s* byval %d ) call void @f( %struct.s* byval(%struct.s) %d )
call void @f( %struct.s* byval %d ) call void @f( %struct.s* byval(%struct.s) %d )
ret void ret void
} }
declare void @f(%struct.s* byval) declare void @f(%struct.s* byval(%struct.s))

test/CodeGen/X86/byval3.ll

Show All 39 Linesentry:
%tmp4 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 2 %tmp4 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 2
store i32 %a3, i32* %tmp4, align 16 store i32 %a3, i32* %tmp4, align 16
%tmp6 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 3 %tmp6 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 3
store i32 %a4, i32* %tmp6, align 16 store i32 %a4, i32* %tmp6, align 16
%tmp8 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 4 %tmp8 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 4
store i32 %a5, i32* %tmp8, align 16 store i32 %a5, i32* %tmp8, align 16
%tmp10 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 5 %tmp10 = getelementptr %struct.s, %struct.s* %d, i32 0, i32 5
store i32 %a6, i32* %tmp10, align 16 store i32 %a6, i32* %tmp10, align 16
call void @f( %struct.s* byval %d) call void @f( %struct.s* byval(%struct.s) %d)
call void @f( %struct.s* byval %d) call void @f( %struct.s* byval(%struct.s) %d)
ret void ret void
} }
declare void @f(%struct.s* byval) declare void @f(%struct.s* byval(%struct.s))

test/CodeGen/X86/byval4.ll

Show First 20 Lines • Show All 45 Lines • ▼ Show 20 Linesentry:
%tmp4 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 2 %tmp4 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 2
store i16 %a3, i16* %tmp4, align 16 store i16 %a3, i16* %tmp4, align 16
%tmp6 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 3 %tmp6 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 3
store i16 %a4, i16* %tmp6, align 16 store i16 %a4, i16* %tmp6, align 16
%tmp8 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 4 %tmp8 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 4
store i16 %a5, i16* %tmp8, align 16 store i16 %a5, i16* %tmp8, align 16
%tmp10 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 5 %tmp10 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 5
store i16 %a6, i16* %tmp10, align 16 store i16 %a6, i16* %tmp10, align 16
call void @f( %struct.s* byval %a ) call void @f( %struct.s* byval(%struct.s) %a )
call void @f( %struct.s* byval %a ) call void @f( %struct.s* byval(%struct.s) %a )
ret void ret void
} }
declare void @f(%struct.s* byval) declare void @f(%struct.s* byval(%struct.s))

test/CodeGen/X86/byval5.ll

Show First 20 Lines • Show All 53 Lines • ▼ Show 20 Linesentry:
%tmp4 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 2 %tmp4 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 2
store i8 %a3, i8* %tmp4, align 8 store i8 %a3, i8* %tmp4, align 8
%tmp6 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 3 %tmp6 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 3
store i8 %a4, i8* %tmp6, align 8 store i8 %a4, i8* %tmp6, align 8
%tmp8 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 4 %tmp8 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 4
store i8 %a5, i8* %tmp8, align 8 store i8 %a5, i8* %tmp8, align 8
%tmp10 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 5 %tmp10 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 5
store i8 %a6, i8* %tmp10, align 8 store i8 %a6, i8* %tmp10, align 8
call void @f( %struct.s* byval %a ) call void @f( %struct.s* byval(%struct.s) %a )
call void @f( %struct.s* byval %a ) call void @f( %struct.s* byval(%struct.s) %a )
ret void ret void
} }
declare void @f(%struct.s* byval) declare void @f(%struct.s* byval(%struct.s))

test/CodeGen/X86/byval6.ll

; RUN: llc < %s -mcpu=generic -march=x86 | grep add | not grep 16 ; RUN: llc < %s -mcpu=generic -march=x86 | grep add | not grep 16
%struct.W = type { x86_fp80, x86_fp80 } %struct.W = type { x86_fp80, x86_fp80 }
@B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32 @B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32
@.cpx = internal constant %struct.W { x86_fp80 0xK4001E000000000000000, x86_fp80 0xK40028000000000000000 } @.cpx = internal constant %struct.W { x86_fp80 0xK4001E000000000000000, x86_fp80 0xK40028000000000000000 }
define i32 @main() nounwind { define i32 @main() nounwind {
entry: entry:
tail call void (i32, ...) @bar( i32 3, %struct.W* byval @.cpx ) nounwind tail call void (i32, ...) @bar( i32 3, %struct.W* byval(%struct.W) @.cpx ) nounwind
tail call void (i32, ...) @baz( i32 3, %struct.W* byval @B ) nounwind tail call void (i32, ...) @baz( i32 3, %struct.W* byval(%struct.W) @B ) nounwind
ret i32 undef ret i32 undef
} }
declare void @bar(i32, ...) declare void @bar(i32, ...)
declare void @baz(i32, ...) declare void @baz(i32, ...)

test/CodeGen/X86/byval7.ll

; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s ; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s
%struct.S = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, %struct.S = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
<2 x i64> } <2 x i64> }
define i32 @main() nounwind { define i32 @main() nounwind {
entry: entry:
; CHECK-LABEL: main: ; CHECK-LABEL: main:
; CHECK: leal 16(%esp), %edi ; CHECK: leal 16(%esp), %edi
; CHECK: leal 160(%esp), %esi ; CHECK: leal 160(%esp), %esi
; CHECK: rep;movsl ; CHECK: rep;movsl
; CHECK: movl $1, (%esp) ; CHECK: movl $1, (%esp)
%s = alloca %struct.S ; <%struct.S*> [#uses=2] %s = alloca %struct.S ; <%struct.S*> [#uses=2]
%tmp15 = getelementptr %struct.S, %struct.S* %s, i32 0, i32 0 ; <<2 x i64>*> [#uses=1] %tmp15 = getelementptr %struct.S, %struct.S* %s, i32 0, i32 0 ; <<2 x i64>*> [#uses=1]
store <2 x i64> < i64 8589934595, i64 1 >, <2 x i64>* %tmp15, align 16 store <2 x i64> < i64 8589934595, i64 1 >, <2 x i64>* %tmp15, align 16
call void @t( i32 1, %struct.S* byval %s ) nounwind call void @t( i32 1, %struct.S* byval(%struct.S) %s ) nounwind
ret i32 0 ret i32 0
} }
declare void @t(i32, %struct.S* byval ) declare void @t(i32, %struct.S* byval(%struct.S) )

test/CodeGen/X86/crash.ll

Show First 20 Lines • Show All 270 Lines • ▼ Show 20 Linesbb7: ; preds = %bb4
%tmp25 = load %t13*, %t13** %tmp3, align 4 %tmp25 = load %t13*, %t13** %tmp3, align 4
%tmp26 = icmp eq %t13* %tmp25, undef %tmp26 = icmp eq %t13* %tmp25, undef
br i1 %tmp26, label %bb28, label %bb27 br i1 %tmp26, label %bb28, label %bb27
bb27: ; preds = %bb7 bb27: ; preds = %bb7
br label %bb29 br label %bb29
bb28: ; preds = %bb7 bb28: ; preds = %bb7
call void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%t10* %tmp2, %t21* byval align 4 undef, %t13* undef) call void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%t10* %tmp2, %t21* align 4 byval(%t21) undef, %t13* undef)
br label %bb29 br label %bb29
bb29: ; preds = %bb28, %bb27 bb29: ; preds = %bb28, %bb27
store i96 %tmp23, i96* undef, align 4 store i96 %tmp23, i96* undef, align 4
%tmp30 = load %t13*, %t13** %tmp3, align 4 %tmp30 = load %t13*, %t13** %tmp3, align 4
br i1 false, label %bb33, label %bb31 br i1 false, label %bb33, label %bb31
bb31: ; preds = %bb29 bb31: ; preds = %bb29
%tmp32 = getelementptr inbounds %t13, %t13* %tmp30, i32 1 %tmp32 = getelementptr inbounds %t13, %t13* %tmp30, i32 1
store %t13* %tmp32, %t13** %tmp3, align 4 store %t13* %tmp32, %t13** %tmp3, align 4
br label %bb37 br label %bb37
bb33: ; preds = %bb29 bb33: ; preds = %bb29
unreachable unreachable
bb34: ; preds = %bb4 bb34: ; preds = %bb4
br i1 undef, label %bb36, label %bb35 br i1 undef, label %bb36, label %bb35
bb35: ; preds = %bb34 bb35: ; preds = %bb34
store %t13* null, %t13** %tmp3, align 4 store %t13* null, %t13** %tmp3, align 4
br label %bb37 br label %bb37
bb36: ; preds = %bb34 bb36: ; preds = %bb34
call void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%t10* %tmp2, %t21* byval align 4 undef, %t13* undef) call void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%t10* %tmp2, %t21* align 4 byval(%t21) undef, %t13* undef)
br label %bb37 br label %bb37
bb37: ; preds = %bb36, %bb35, %bb31 bb37: ; preds = %bb36, %bb35, %bb31
%tmp38 = phi i96 [ %tmp23, %bb31 ], [ %tmp5, %bb35 ], [ %tmp5, %bb36 ] %tmp38 = phi i96 [ %tmp23, %bb31 ], [ %tmp5, %bb35 ], [ %tmp5, %bb36 ]
%tmp39 = phi i96 [ %tmp24, %bb31 ], [ %tmp6, %bb35 ], [ %tmp6, %bb36 ] %tmp39 = phi i96 [ %tmp24, %bb31 ], [ %tmp6, %bb35 ], [ %tmp6, %bb36 ]
%tmp40 = add i32 undef, 1 %tmp40 = add i32 undef, 1
br label %bb4 br label %bb4
} }
declare %t14* @_ZN4llvm9MCContext16CreateTempSymbolEv(%t2*) declare %t14* @_ZN4llvm9MCContext16CreateTempSymbolEv(%t2*)
declare void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%t10*, %t21* byval align 4, %t13*) declare void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_cxx17__normal_iteratorIPS1_S3_EERKS1_(%t10*, %t21* align 4 byval(%t21), %t13*)
declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
; PR10463 ; PR10463
; Spilling a virtual register with <undef> uses. ; Spilling a virtual register with <undef> uses.
define void @autogen_239_1000() { define void @autogen_239_1000() {
▲ Show 20 Lines • Show All 269 Lines • Show Last 20 Lines

test/CodeGen/X86/dynamic-allocas-VLAs.ll

Show First 20 Lines • Show All 150 Lines • ▼ Show 20 Lines
declare void @t6_helper2(<8 x float>) declare void @t6_helper2(<8 x float>)
; VLAs + Dynamic realignment + byval ; VLAs + Dynamic realignment + byval
; The byval adjust the sp after the prolog, but if we're restoring the sp from ; The byval adjust the sp after the prolog, but if we're restoring the sp from
; the base pointer we use the original adjustment. ; the base pointer we use the original adjustment.
%struct.struct_t = type { [5 x i32] } %struct.struct_t = type { [5 x i32] }
define void @t7(i32 %size, %struct.struct_t* byval align 8 %arg1) nounwind uwtable { define void @t7(i32 %size, %struct.struct_t* align 8 byval(%struct.struct_t) %arg1) nounwind uwtable {
entry: entry:
%x = alloca i32, align 32 %x = alloca i32, align 32
store i32 0, i32* %x, align 32 store i32 0, i32* %x, align 32
%0 = zext i32 %size to i64 %0 = zext i32 %size to i64
%vla = alloca i32, i64 %0, align 16 %vla = alloca i32, i64 %0, align 16
%1 = load i32, i32* %x, align 32 %1 = load i32, i32* %x, align 32
call void @bar(i32 %1, i32* %vla, %struct.struct_t* byval align 8 %arg1) call void @bar(i32 %1, i32* %vla, %struct.struct_t* align 8 byval(%struct.struct_t) %arg1)
ret void ret void
; CHECK: _t7 ; CHECK: _t7
; CHECK: pushq %rbp ; CHECK: pushq %rbp
; CHECK: movq %rsp, %rbp ; CHECK: movq %rsp, %rbp
; CHECK: pushq %rbx ; CHECK: pushq %rbx
; CHECK: andq $-32, %rsp ; CHECK: andq $-32, %rsp
; CHECK: subq ${{[0-9]+}}, %rsp ; CHECK: subq ${{[0-9]+}}, %rsp
; CHECK: movq %rsp, %rbx ; CHECK: movq %rsp, %rbx
; Stack adjustment for byval ; Stack adjustment for byval
; CHECK: subq {{.*}}, %rsp ; CHECK: subq {{.*}}, %rsp
; CHECK: callq _bar ; CHECK: callq _bar
; CHECK-NOT: addq {{.*}}, %rsp ; CHECK-NOT: addq {{.*}}, %rsp
; CHECK: leaq -8(%rbp), %rsp ; CHECK: leaq -8(%rbp), %rsp
; CHECK: popq %rbx ; CHECK: popq %rbx
; CHECK: popq %rbp ; CHECK: popq %rbp
} }
declare i8* @llvm.stacksave() nounwind declare i8* @llvm.stacksave() nounwind
declare void @bar(i32, i32*, %struct.struct_t* byval align 8) declare void @bar(i32, i32*, %struct.struct_t* align 8 byval(%struct.struct_t))
declare void @llvm.stackrestore(i8*) nounwind declare void @llvm.stackrestore(i8*) nounwind
; Test when forcing stack alignment ; Test when forcing stack alignment
define i32 @t8() nounwind uwtable { define i32 @t8() nounwind uwtable {
entry: entry:
%a = alloca i32, align 4 %a = alloca i32, align 4
Show All 35 Lines

test/CodeGen/X86/extract-extract.ll

; RUN: llc < %s -march=x86 >/dev/null ; RUN: llc < %s -march=x86 >/dev/null
; PR4699 ; PR4699
; Handle this extractvalue-of-extractvalue case without getting in ; Handle this extractvalue-of-extractvalue case without getting in
; trouble with CSE in DAGCombine. ; trouble with CSE in DAGCombine.
%cc = type { %crd } %cc = type { %crd }
%cr = type { i32 } %cr = type { i32 }
%crd = type { i64, %cr* } %crd = type { i64, %cr* }
%pp = type { %cc } %pp = type { %cc }
define fastcc void @foo(%pp* nocapture byval %p_arg) { define fastcc void @foo(%pp* nocapture byval(%pp) %p_arg) {
entry: entry:
%tmp2 = getelementptr %pp, %pp* %p_arg, i64 0, i32 0 ; <%cc*> [#uses= %tmp2 = getelementptr %pp, %pp* %p_arg, i64 0, i32 0 ; <%cc*> [#uses=
%tmp3 = load %cc, %cc* %tmp2 ; <%cc> [#uses=1] %tmp3 = load %cc, %cc* %tmp2 ; <%cc> [#uses=1]
%tmp34 = extractvalue %cc %tmp3, 0 ; <%crd> [#uses=1] %tmp34 = extractvalue %cc %tmp3, 0 ; <%crd> [#uses=1]
%tmp345 = extractvalue %crd %tmp34, 0 ; <i64> [#uses=1] %tmp345 = extractvalue %crd %tmp34, 0 ; <i64> [#uses=1]
%.ptr.i = load %cr*, %cr** undef ; <%cr*> [#uses=0] %.ptr.i = load %cr*, %cr** undef ; <%cr*> [#uses=0]
%tmp15.i = shl i64 %tmp345, 3 ; <i64> [#uses=0] %tmp15.i = shl i64 %tmp345, 3 ; <i64> [#uses=0]
store %cr* undef, %cr** undef store %cr* undef, %cr** undef
ret void ret void
} }

test/CodeGen/X86/fast-isel-args-fail2.ll

; RUN: not llc < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10 ; RUN: not llc < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10
; REQUIRES: asserts ; REQUIRES: asserts
%struct.s0 = type { x86_fp80, x86_fp80 } %struct.s0 = type { x86_fp80, x86_fp80 }
; FastISel cannot handle this case yet. Make sure that we abort. ; FastISel cannot handle this case yet. Make sure that we abort.
define i8* @args_fail(%struct.s0* byval nocapture readonly align 16 %y) { define i8* @args_fail(%struct.s0* nocapture readonly align 16 byval(%struct.s0) %y) {
%1 = bitcast %struct.s0* %y to i8* %1 = bitcast %struct.s0* %y to i8*
ret i8* %1 ret i8* %1
} }

test/CodeGen/X86/fast-isel-call.ll

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BB2: BB2:
ret i32 0 ret i32 0
; CHECK-LABEL: test1: ; CHECK-LABEL: test1:
; CHECK: calll ; CHECK: calll
; CHECK-NEXT: testb $1 ; CHECK-NEXT: testb $1
} }
declare zeroext i1 @foo() nounwind declare zeroext i1 @foo() nounwind
declare void @foo2(%struct.s* byval) declare void @foo2(%struct.s* byval(%struct.s))
define void @test2(%struct.s* %d) nounwind { define void @test2(%struct.s* %d) nounwind {
call void @foo2(%struct.s* byval %d ) call void @foo2(%struct.s* byval(%struct.s) %d )
ret void ret void
; CHECK-LABEL: test2: ; CHECK-LABEL: test2:
; CHECK: movl (%eax) ; CHECK: movl (%eax)
; CHECK: movl {{.*}}, (%esp) ; CHECK: movl {{.*}}, (%esp)
; CHECK: movl 4(%eax) ; CHECK: movl 4(%eax)
; CHECK: movl {{.*}}, 4(%esp) ; CHECK: movl {{.*}}, 4(%esp)
; CHECK: movl 8(%eax) ; CHECK: movl 8(%eax)
; CHECK: movl {{.*}}, 8(%esp) ; CHECK: movl {{.*}}, 8(%esp)
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test/CodeGen/X86/fastcc-byval.ll

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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5" target triple = "i386-apple-darwin9.5"
%struct.MVT = type { i32 } %struct.MVT = type { i32 }
define fastcc i32 @bar() nounwind { define fastcc i32 @bar() nounwind {
%V = alloca %struct.MVT %V = alloca %struct.MVT
%a = getelementptr %struct.MVT, %struct.MVT* %V, i32 0, i32 0 %a = getelementptr %struct.MVT, %struct.MVT* %V, i32 0, i32 0
store i32 1, i32* %a store i32 1, i32* %a
call fastcc void @foo(%struct.MVT* byval %V) nounwind call fastcc void @foo(%struct.MVT* byval(%struct.MVT) %V) nounwind
%t = load i32, i32* %a %t = load i32, i32* %a
ret i32 %t ret i32 %t
} }
declare fastcc void @foo(%struct.MVT* byval) declare fastcc void @foo(%struct.MVT* byval(%struct.MVT))

test/CodeGen/X86/fp-stack-retcopy.ll

; This should not copy the result of foo into an xmm register. ; This should not copy the result of foo into an xmm register.
; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm ; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i686-apple-darwin9 | not grep xmm
; rdar://5689903 ; rdar://5689903
declare double @foo() declare double @foo()
define double @carg({ double, double }* byval %z) nounwind { define double @carg({ double, double }* byval({ double, double }) %z) nounwind {
entry: entry:
%tmp5 = tail call double @foo() nounwind ; <double> [#uses=1] %tmp5 = tail call double @foo() nounwind ; <double> [#uses=1]
ret double %tmp5 ret double %tmp5
} }

test/CodeGen/X86/fp128-i128.ll

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; CHECK-NEXT: retq ; CHECK-NEXT: retq
} }
declare fp128 @fabsl(fp128) #1 declare fp128 @fabsl(fp128) #1
declare fp128 @copysignl(fp128, fp128) #1 declare fp128 @copysignl(fp128, fp128) #1
; Test more complicated logical operations generated from copysignl. ; Test more complicated logical operations generated from copysignl.
define void @TestCopySign({ fp128, fp128 }* noalias nocapture sret %agg.result, { fp128, fp128 }* byval nocapture readonly align 16 %z) #0 { define void @TestCopySign({ fp128, fp128 }* noalias nocapture sret %agg.result, { fp128, fp128 }* nocapture readonly align 16 byval({ fp128, fp128 }) %z) #0 {
entry: entry:
%z.realp = getelementptr inbounds { fp128, fp128 }, { fp128, fp128 }* %z, i64 0, i32 0 %z.realp = getelementptr inbounds { fp128, fp128 }, { fp128, fp128 }* %z, i64 0, i32 0
%z.real = load fp128, fp128* %z.realp, align 16 %z.real = load fp128, fp128* %z.realp, align 16
%z.imagp = getelementptr inbounds { fp128, fp128 }, { fp128, fp128 }* %z, i64 0, i32 1 %z.imagp = getelementptr inbounds { fp128, fp128 }, { fp128, fp128 }* %z, i64 0, i32 1
%z.imag4 = load fp128, fp128* %z.imagp, align 16 %z.imag4 = load fp128, fp128* %z.imagp, align 16
%cmp = fcmp ogt fp128 %z.real, %z.imag4 %cmp = fcmp ogt fp128 %z.real, %z.imag4
%sub = fsub fp128 %z.imag4, %z.imag4 %sub = fsub fp128 %z.imag4, %z.imag4
br i1 %cmp, label %if.then, label %cleanup br i1 %cmp, label %if.then, label %cleanup
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test/CodeGen/X86/inline-asm-sp-clobber-memcpy.ll

; RUN: llc < %s -stackrealign -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s ; RUN: llc < %s -stackrealign -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s
%struct.foo = type { [88 x i8] } %struct.foo = type { [88 x i8] }
declare void @bar(i8* nocapture, %struct.foo* align 4 byval) nounwind declare void @bar(i8* nocapture, %struct.foo* align 4 byval(%struct.foo)) nounwind
; PR19012 ; PR19012
; Don't clobber %esi if we have inline asm that clobbers %esp. ; Don't clobber %esi if we have inline asm that clobbers %esp.
define void @test1(%struct.foo* nocapture %x, i32 %y, i8* %z) nounwind { define void @test1(%struct.foo* nocapture %x, i32 %y, i8* %z) nounwind {
call void @bar(i8* %z, %struct.foo* align 4 byval %x) call void @bar(i8* %z, %struct.foo* align 4 byval(%struct.foo) %x)
call void asm sideeffect inteldialect "xor esp, esp", "=*m,~{flags},~{esp},~{esp},~{dirflag},~{fpsr},~{flags}"(i8* %z) call void asm sideeffect inteldialect "xor esp, esp", "=*m,~{flags},~{esp},~{esp},~{dirflag},~{fpsr},~{flags}"(i8* %z)
ret void ret void
; CHECK-LABEL: test1: ; CHECK-LABEL: test1:
; CHECK: movl %esp, %esi ; CHECK: movl %esp, %esi
; CHECK-NOT: rep;movsl ; CHECK-NOT: rep;movsl
} }

test/CodeGen/X86/mcu-abi.ll

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; CHECK-NEXT: movl %eax, %esi ; CHECK-NEXT: movl %eax, %esi
; CHECK-NEXT: leal 8(%esp), %edx ; CHECK-NEXT: leal 8(%esp), %edx
; CHECK-NEXT: movl $48, %ecx ; CHECK-NEXT: movl $48, %ecx
; CHECK-NEXT: calll memcpy ; CHECK-NEXT: calll memcpy
; CHECK-NEXT: movl %esi, %eax ; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: popl %esi ; CHECK-NEXT: popl %esi
; CHECK-NOT: retl $4 ; CHECK-NOT: retl $4
; CHECK-NEXT: retl ; CHECK-NEXT: retl
define void @ret_large_struct(%struct.st12_t* noalias nocapture sret %agg.result, %struct.st12_t* byval nocapture readonly align 4 %r) #0 { define void @ret_large_struct(%struct.st12_t* noalias nocapture sret %agg.result, %struct.st12_t* nocapture readonly align 4 byval(%struct.st12_t) %r) #0 {
entry: entry:
%0 = bitcast %struct.st12_t* %agg.result to i8* %0 = bitcast %struct.st12_t* %agg.result to i8*
%1 = bitcast %struct.st12_t* %r to i8* %1 = bitcast %struct.st12_t* %r to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 48, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 48, i32 1, i1 false)
ret void ret void
} }
; CHECK-LABEL: var_args: ; CHECK-LABEL: var_args:
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test/CodeGen/X86/misched-aa-colored.ll

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@__PRETTY_FUNCTION__._ZN4llvm16DAGTypeLegalizer16GetWidenedVectorENS_7SDValueE = external hidden unnamed_addr constant [70 x i8], align 1 @__PRETTY_FUNCTION__._ZN4llvm16DAGTypeLegalizer16GetWidenedVectorENS_7SDValueE = external hidden unnamed_addr constant [70 x i8], align 1
@.str98 = external hidden unnamed_addr constant [46 x i8], align 1 @.str98 = external hidden unnamed_addr constant [46 x i8], align 1
@__PRETTY_FUNCTION__._ZNK4llvm6SDNode12getValueTypeEj = external hidden unnamed_addr constant [57 x i8], align 1 @__PRETTY_FUNCTION__._ZNK4llvm6SDNode12getValueTypeEj = external hidden unnamed_addr constant [57 x i8], align 1
@.str99 = external hidden unnamed_addr constant [19 x i8], align 1 @.str99 = external hidden unnamed_addr constant [19 x i8], align 1
@__PRETTY_FUNCTION__._ZN4llvm5SDLocC2EPKNS_6SDNodeE = external hidden unnamed_addr constant [41 x i8], align 1 @__PRETTY_FUNCTION__._ZN4llvm5SDLocC2EPKNS_6SDNodeE = external hidden unnamed_addr constant [41 x i8], align 1
@.str100 = external hidden unnamed_addr constant [50 x i8], align 1 @.str100 = external hidden unnamed_addr constant [50 x i8], align 1
@__PRETTY_FUNCTION__._ZNK4llvm6SDNode10getOperandEj = external hidden unnamed_addr constant [66 x i8], align 1 @__PRETTY_FUNCTION__._ZNK4llvm6SDNode10getOperandEj = external hidden unnamed_addr constant [66 x i8], align 1
declare { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } @_ZN4llvm12SelectionDAG7getNodeEjNS_5SDLocENS_3EVTENS_7SDValueES3_(%"class.llvm::SelectionDAG.104.704.1064.2024.2144.2384.4184"*, i32, i8*, i32, i32, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"*, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* byval align 8, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* byval align 8) declare { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } @_ZN4llvm12SelectionDAG7getNodeEjNS_5SDLocENS_3EVTENS_7SDValueES3_(%"class.llvm::SelectionDAG.104.704.1064.2024.2144.2384.4184"*, i32, i8*, i32, i32, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"*, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* align 8 byval(%"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"), %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* align 8 byval(%"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"))
; Function Attrs: noreturn nounwind ; Function Attrs: noreturn nounwind
declare void @__assert_fail(i8*, i8*, i32, i8*) #0 declare void @__assert_fail(i8*, i8*, i32, i8*) #0
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) #1 declare void @llvm.lifetime.start(i64, i8* nocapture) #1
; Function Attrs: nounwind ; Function Attrs: nounwind
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; CHECK: movl (%rax), %eax ; CHECK: movl (%rax), %eax
; CHECK-NOT: movl %eax, {{[0-9]+}}(%rsp) ; CHECK-NOT: movl %eax, {{[0-9]+}}(%rsp)
; CHECK: movl [[OFF:[0-9]+]](%rsp), %r8d ; CHECK: movl [[OFF:[0-9]+]](%rsp), %r8d
; CHECK: movl %eax, [[OFF]](%rsp) ; CHECK: movl %eax, [[OFF]](%rsp)
; CHECK: movl $-1, %ecx ; CHECK: movl $-1, %ecx
; CHECK: callq _ZN4llvm12SelectionDAG7getNodeEjNS_5SDLocENS_3EVTENS_7SDValueES3_ ; CHECK: callq _ZN4llvm12SelectionDAG7getNodeEjNS_5SDLocENS_3EVTENS_7SDValueES3_
%call18 = call { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } @_ZN4llvm12SelectionDAG7getNodeEjNS_5SDLocENS_3EVTENS_7SDValueES3_(%"class.llvm::SelectionDAG.104.704.1064.2024.2144.2384.4184"* undef, i32 undef, i8* undef, i32 -1, i32 %retval.sroa.0.0.copyload.i37, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"* undef, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* byval align 8 undef, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* byval align 8 undef) #1 %call18 = call { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } @_ZN4llvm12SelectionDAG7getNodeEjNS_5SDLocENS_3EVTENS_7SDValueES3_(%"class.llvm::SelectionDAG.104.704.1064.2024.2144.2384.4184"* undef, i32 undef, i8* undef, i32 -1, i32 %retval.sroa.0.0.copyload.i37, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"* undef, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* align 8 byval(%"class.llvm::SDValue.3.603.963.1923.2043.2283.4083") undef, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* align 8 byval(%"class.llvm::SDValue.3.603.963.1923.2043.2283.4083") undef) #1
ret { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } %call18 ret { %"class.llvm::SDNode.10.610.970.1930.2050.2290.4090"*, i32 } %call18
} }
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
declare hidden %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* @_ZN4llvm12DenseMapBaseINS_13SmallDenseMapINS_7SDValueES2_Lj8ENS_12DenseMapInfoIS2_EEEES2_S2_S4_EixERKS2_(%"class.llvm::DenseMapBase.73.118.718.1078.2038.2158.2398.4198"*, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* nocapture readonly) #2 align 2 declare hidden %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* @_ZN4llvm12DenseMapBaseINS_13SmallDenseMapINS_7SDValueES2_Lj8ENS_12DenseMapInfoIS2_EEEES2_S2_S4_EixERKS2_(%"class.llvm::DenseMapBase.73.118.718.1078.2038.2158.2398.4198"*, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"* nocapture readonly) #2 align 2
declare hidden void @_ZN4llvm16DAGTypeLegalizer10RemapValueERNS_7SDValueE(%"class.llvm::DAGTypeLegalizer.117.717.1077.2037.2157.2397.4197"*, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"*) declare hidden void @_ZN4llvm16DAGTypeLegalizer10RemapValueERNS_7SDValueE(%"class.llvm::DAGTypeLegalizer.117.717.1077.2037.2157.2397.4197"*, %"class.llvm::SDValue.3.603.963.1923.2043.2283.4083"*)
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
declare hidden void @_ZNK4llvm18TargetLoweringBase17getTypeConversionERNS_11LLVMContextENS_3EVTE(%"struct.std::pair.112.119.719.1079.2039.2159.2399.4199"* noalias sret, %"class.llvm::TargetLoweringBase.50.650.1010.1970.2090.2330.4130"* readonly, %"class.llvm::LLVMContext.6.606.966.1926.2046.2286.4086"*, i32, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"*) #2 align 2 declare hidden void @_ZNK4llvm18TargetLoweringBase17getTypeConversionERNS_11LLVMContextENS_3EVTE(%"struct.std::pair.112.119.719.1079.2039.2159.2399.4199"* noalias sret, %"class.llvm::TargetLoweringBase.50.650.1010.1970.2090.2330.4130"* readonly, %"class.llvm::LLVMContext.6.606.966.1926.2046.2286.4086"*, i32, %"class.llvm::Type.7.607.967.1927.2047.2287.4087"*) #2 align 2
attributes #0 = { noreturn nounwind } attributes #0 = { noreturn nounwind }
attributes #1 = { nounwind } attributes #1 = { nounwind }
attributes #2 = { nounwind uwtable } attributes #2 = { nounwind uwtable }

test/CodeGen/X86/movtopush.ll

; RUN: llc < %s -mtriple=i686-windows | FileCheck %s -check-prefix=NORMAL ; RUN: llc < %s -mtriple=i686-windows | FileCheck %s -check-prefix=NORMAL
; RUN: llc < %s -mtriple=x86_64-windows | FileCheck %s -check-prefix=X64 ; RUN: llc < %s -mtriple=x86_64-windows | FileCheck %s -check-prefix=X64
; RUN: llc < %s -mtriple=i686-windows -stackrealign -stack-alignment=32 | FileCheck %s -check-prefix=ALIGNED ; RUN: llc < %s -mtriple=i686-windows -stackrealign -stack-alignment=32 | FileCheck %s -check-prefix=ALIGNED
%class.Class = type { i32 } %class.Class = type { i32 }
%struct.s = type { i64 } %struct.s = type { i64 }
declare void @good(i32 %a, i32 %b, i32 %c, i32 %d) declare void @good(i32 %a, i32 %b, i32 %c, i32 %d)
declare void @inreg(i32 %a, i32 inreg %b, i32 %c, i32 %d) declare void @inreg(i32 %a, i32 inreg %b, i32 %c, i32 %d)
declare x86_thiscallcc void @thiscall(%class.Class* %class, i32 %a, i32 %b, i32 %c, i32 %d) declare x86_thiscallcc void @thiscall(%class.Class* %class, i32 %a, i32 %b, i32 %c, i32 %d)
declare void @oneparam(i32 %a) declare void @oneparam(i32 %a)
declare void @eightparams(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) declare void @eightparams(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h)
declare void @struct(%struct.s* byval %a, i32 %b, i32 %c, i32 %d) declare void @struct(%struct.s* byval(%struct.s) %a, i32 %b, i32 %c, i32 %d)
; Here, we should have a reserved frame, so we don't expect pushes ; Here, we should have a reserved frame, so we don't expect pushes
; NORMAL-LABEL: test1: ; NORMAL-LABEL: test1:
; NORMAL: subl $16, %esp ; NORMAL: subl $16, %esp
; NORMAL-NEXT: movl $4, 12(%esp) ; NORMAL-NEXT: movl $4, 12(%esp)
; NORMAL-NEXT: movl $3, 8(%esp) ; NORMAL-NEXT: movl $3, 8(%esp)
; NORMAL-NEXT: movl $2, 4(%esp) ; NORMAL-NEXT: movl $2, 4(%esp)
; NORMAL-NEXT: movl $1, (%esp) ; NORMAL-NEXT: movl $1, (%esp)
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define void @test9() optsize { define void @test9() optsize {
entry: entry:
%p = alloca i32, align 4 %p = alloca i32, align 4
%q = alloca i32, align 4 %q = alloca i32, align 4
%s = alloca %struct.s, align 4 %s = alloca %struct.s, align 4
call void @good(i32 1, i32 2, i32 3, i32 4) call void @good(i32 1, i32 2, i32 3, i32 4)
%pv = ptrtoint i32* %p to i32 %pv = ptrtoint i32* %p to i32
%qv = ptrtoint i32* %q to i32 %qv = ptrtoint i32* %q to i32
call void @struct(%struct.s* byval %s, i32 6, i32 %qv, i32 %pv) call void @struct(%struct.s* byval(%struct.s) %s, i32 6, i32 %qv, i32 %pv)
ret void ret void
} }
; We can end up with an indirect call which gets reloaded on the spot. ; We can end up with an indirect call which gets reloaded on the spot.
; Make sure we reference the correct stack slot - we spill into (%esp) ; Make sure we reference the correct stack slot - we spill into (%esp)
; and reload from 16(%esp) due to the pushes. ; and reload from 16(%esp) due to the pushes.
; NORMAL-LABEL: test10: ; NORMAL-LABEL: test10:
; NORMAL: movl $_good, [[ALLOC:.*]] ; NORMAL: movl $_good, [[ALLOC:.*]]
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test/CodeGen/X86/negate-add-zero.ll

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declare void @_ZmlI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RKS3_RK9SubMatrixIT0_E(%struct.Mat3* noalias sret, %struct.Mat3*, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*) declare void @_ZmlI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RKS3_RK9SubMatrixIT0_E(%struct.Mat3* noalias sret, %struct.Mat3*, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*)
declare void @_ZmlI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RK9SubMatrixIT0_ERKS3_(%struct.Mat3* noalias sret, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*, %struct.Mat3*) declare void @_ZmlI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RK9SubMatrixIT0_ERKS3_(%struct.Mat3* noalias sret, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*, %struct.Mat3*)
declare void @_ZmiI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RK9SubMatrixIT0_ERKS3_(%struct.Mat3* noalias sret, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*, %struct.Mat3*) declare void @_ZmiI4Mat311FixedMatrixIdLi6ELi6ELi0ELi0EEET_RK9SubMatrixIT0_ERKS3_(%struct.Mat3* noalias sret, %"struct.SubMatrix<FixedMatrix<double, 6, 6, 0, 0> >"*, %struct.Mat3*)
declare %"struct.FixedMatrixBase<double,6,6>"* @_ZN15FixedMatrixBaseIdLi6ELi6EEmIERKS0_(%"struct.FixedMatrixBase<double,6,6>"*, %"struct.FixedMatrixBase<double,6,6>"*) declare %"struct.FixedMatrixBase<double,6,6>"* @_ZN15FixedMatrixBaseIdLi6ELi6EEmIERKS0_(%"struct.FixedMatrixBase<double,6,6>"*, %"struct.FixedMatrixBase<double,6,6>"*)
declare void @_ZN13CDSVectorBaseI4Vec3N3CDS12DefaultAllocEEC2EiS2_(%"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>"*, i32, %"struct.CDS::DefaultAlloc"* byval align 4) declare void @_ZN13CDSVectorBaseI4Vec3N3CDS12DefaultAllocEEC2EiS2_(%"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>"*, i32, %"struct.CDS::DefaultAlloc"* align 4 byval(%"struct.CDS::DefaultAlloc"))
declare void @_ZN13CDSVectorBaseI4Vec3N3CDS12DefaultAllocEED2Ev(%"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>"*) declare void @_ZN13CDSVectorBaseI4Vec3N3CDS12DefaultAllocEED2Ev(%"struct.CDSVectorBase<Vec3,CDS::DefaultAlloc>"*)
declare void @_ZN12HNodeTorsionD0Ev(%struct.HNodeTorsion*) declare void @_ZN12HNodeTorsionD0Ev(%struct.HNodeTorsion*)
declare void @_ZN12HNodeTorsionD1Ev(%struct.HNodeTorsion*) declare void @_ZN12HNodeTorsionD1Ev(%struct.HNodeTorsion*)
declare void @_ZN12HNodeRotate3D0Ev(%struct.HNodeRotate3*) declare void @_ZN12HNodeRotate3D0Ev(%struct.HNodeRotate3*)
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test/CodeGen/X86/pr2656.ll

; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
; PR2656 ; PR2656
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin9.4.0" target triple = "i686-apple-darwin9.4.0"
%struct.anon = type <{ float, float }> %struct.anon = type <{ float, float }>
@.str = internal constant [17 x i8] c"pt: %.0f, %.0f\0A\00\00" ; <[17 x i8]*> [#uses=1] @.str = internal constant [17 x i8] c"pt: %.0f, %.0f\0A\00\00" ; <[17 x i8]*> [#uses=1]
; We can not fold either stack load into an 'xor' instruction because that ; We can not fold either stack load into an 'xor' instruction because that
; would change what should be a 4-byte load into a 16-byte load. ; would change what should be a 4-byte load into a 16-byte load.
; We can fold the 16-byte constant load into either 'xor' instruction, ; We can fold the 16-byte constant load into either 'xor' instruction,
; but we do not. It has more than one use, so it gets loaded into a register. ; but we do not. It has more than one use, so it gets loaded into a register.
define void @foo(%struct.anon* byval %p) nounwind { define void @foo(%struct.anon* byval(%struct.anon) %p) nounwind {
; CHECK-LABEL: foo: ; CHECK-LABEL: foo:
; CHECK: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: movaps {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648] ; CHECK-NEXT: movaps {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
; CHECK-NEXT: xorps %xmm2, %xmm0 ; CHECK-NEXT: xorps %xmm2, %xmm0
; CHECK-NEXT: cvtss2sd %xmm0, %xmm0 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0
; CHECK-NEXT: xorps %xmm2, %xmm1 ; CHECK-NEXT: xorps %xmm2, %xmm1
entry: entry:
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test/CodeGen/X86/sibcall-byval.ll

; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=32 ; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s -check-prefix=32
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=64 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=64
%struct.p = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.p = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
define i32 @f(%struct.p* byval align 4 %q) nounwind ssp { define i32 @f(%struct.p* align 4 byval(%struct.p) %q) nounwind ssp {
entry: entry:
; 32: _f: ; 32: _f:
; 32: jmp L_g$stub ; 32: jmp L_g$stub
; 64: _f: ; 64: _f:
; 64: jmp _g ; 64: jmp _g
%call = tail call i32 @g(%struct.p* byval align 4 %q) nounwind %call = tail call i32 @g(%struct.p* align 4 byval(%struct.p) %q) nounwind
ret i32 %call ret i32 %call
} }
declare i32 @g(%struct.p* byval align 4) declare i32 @g(%struct.p* align 4 byval(%struct.p))
define i32 @h(%struct.p* byval align 4 %q, i32 %r) nounwind ssp { define i32 @h(%struct.p* align 4 byval(%struct.p) %q, i32 %r) nounwind ssp {
entry: entry:
; 32: _h: ; 32: _h:
; 32: jmp L_i$stub ; 32: jmp L_i$stub
; 64: _h: ; 64: _h:
; 64: jmp _i ; 64: jmp _i
%call = tail call i32 @i(%struct.p* byval align 4 %q, i32 %r) nounwind %call = tail call i32 @i(%struct.p* align 4 byval(%struct.p) %q, i32 %r) nounwind
ret i32 %call ret i32 %call
} }
declare i32 @i(%struct.p* byval align 4, i32) declare i32 @i(%struct.p* align 4 byval(%struct.p), i32)

test/CodeGen/X86/sibcall.ll

Show First 20 Lines • Show All 208 Lines • ▼ Show 20 Lines
bb6: bb6:
ret i32 0 ret i32 0
} }
declare i32 @foo5(i32, i32, i32, i32, i32) declare i32 @foo5(i32, i32, i32, i32, i32)
%struct.t = type { i32, i32, i32, i32, i32 } %struct.t = type { i32, i32, i32, i32, i32 }
define i32 @t12(i32 %x, i32 %y, %struct.t* byval align 4 %z) nounwind ssp { define i32 @t12(i32 %x, i32 %y, %struct.t* align 4 byval(%struct.t) %z) nounwind ssp {
; 32-LABEL: t12: ; 32-LABEL: t12:
; 32-NOT: subl ${{[0-9]+}}, %esp ; 32-NOT: subl ${{[0-9]+}}, %esp
; 32-NOT: addl ${{[0-9]+}}, %esp ; 32-NOT: addl ${{[0-9]+}}, %esp
; 32: jmp {{_?}}foo6 ; 32: jmp {{_?}}foo6
; 64-LABEL: t12: ; 64-LABEL: t12:
; 64-NOT: subq ${{[0-9]+}}, %rsp ; 64-NOT: subq ${{[0-9]+}}, %rsp
; 64-NOT: addq ${{[0-9]+}}, %rsp ; 64-NOT: addq ${{[0-9]+}}, %rsp
; 64: jmp {{_?}}foo6 ; 64: jmp {{_?}}foo6
; X32ABI-LABEL: t12: ; X32ABI-LABEL: t12:
; X32ABI-NOT: subl ${{[0-9]+}}, %esp ; X32ABI-NOT: subl ${{[0-9]+}}, %esp
; X32ABI-NOT: addl ${{[0-9]+}}, %esp ; X32ABI-NOT: addl ${{[0-9]+}}, %esp
; X32ABI: jmp {{_?}}foo6 ; X32ABI: jmp {{_?}}foo6
entry: entry:
%0 = icmp eq i32 %x, 0 %0 = icmp eq i32 %x, 0
br i1 %0, label %bb2, label %bb br i1 %0, label %bb2, label %bb
bb: bb:
%1 = tail call i32 @foo6(i32 %x, i32 %y, %struct.t* byval align 4 %z) nounwind %1 = tail call i32 @foo6(i32 %x, i32 %y, %struct.t* align 4 byval(%struct.t) %z) nounwind
ret i32 %1 ret i32 %1
bb2: bb2:
ret i32 0 ret i32 0
} }
declare i32 @foo6(i32, i32, %struct.t* byval align 4) declare i32 @foo6(i32, i32, %struct.t* align 4 byval(%struct.t))
; rdar://r7717598 ; rdar://r7717598
%struct.ns = type { i32, i32 } %struct.ns = type { i32, i32 }
%struct.cp = type { float, float, float, float, float } %struct.cp = type { float, float, float, float, float }
define %struct.ns* @t13(%struct.cp* %yy) nounwind ssp { define %struct.ns* @t13(%struct.cp* %yy) nounwind ssp {
; 32-LABEL: t13: ; 32-LABEL: t13:
; 32-NOT: jmp ; 32-NOT: jmp
; 32: calll ; 32: calll
; 32: ret ; 32: ret
; 64-LABEL: t13: ; 64-LABEL: t13:
; 64-NOT: jmp ; 64-NOT: jmp
; 64: callq ; 64: callq
; 64: ret ; 64: ret
; X32ABI-LABEL: t13: ; X32ABI-LABEL: t13:
; X32ABI-NOT: jmp ; X32ABI-NOT: jmp
; X32ABI: callq ; X32ABI: callq
; X32ABI: ret ; X32ABI: ret
entry: entry:
%0 = tail call fastcc %struct.ns* @foo7(%struct.cp* byval align 4 %yy, i8 signext 0) nounwind %0 = tail call fastcc %struct.ns* @foo7(%struct.cp* align 4 byval(%struct.cp) %yy, i8 signext 0) nounwind
ret %struct.ns* %0 ret %struct.ns* %0
} }
; rdar://6195379 ; rdar://6195379
; llvm can't do sibcall for this in 32-bit mode (yet). ; llvm can't do sibcall for this in 32-bit mode (yet).
declare fastcc %struct.ns* @foo7(%struct.cp* byval align 4, i8 signext) nounwind ssp declare fastcc %struct.ns* @foo7(%struct.cp* align 4 byval(%struct.cp), i8 signext) nounwind ssp
%struct.__block_descriptor = type { i64, i64 } %struct.__block_descriptor = type { i64, i64 }
%struct.__block_descriptor_withcopydispose = type { i64, i64, i8*, i8* } %struct.__block_descriptor_withcopydispose = type { i64, i64, i8*, i8* }
%struct.__block_literal_1 = type { i8*, i32, i32, i8*, %struct.__block_descriptor* } %struct.__block_literal_1 = type { i8*, i32, i32, i8*, %struct.__block_descriptor* }
%struct.__block_literal_2 = type { i8*, i32, i32, i8*, %struct.__block_descriptor_withcopydispose*, void ()* } %struct.__block_literal_2 = type { i8*, i32, i32, i8*, %struct.__block_descriptor_withcopydispose*, void ()* }
define void @t14(%struct.__block_literal_2* nocapture %.block_descriptor) nounwind ssp { define void @t14(%struct.__block_literal_2* nocapture %.block_descriptor) nounwind ssp {
entry: entry:
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test/CodeGen/X86/sjlj-baseptr.ll

; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X86 %s ; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X86 %s
; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X64 %s ; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X64 %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
%Foo = type { [125 x i8] } %Foo = type { [125 x i8] }
declare i32 @llvm.eh.sjlj.setjmp(i8*) nounwind declare i32 @llvm.eh.sjlj.setjmp(i8*) nounwind
declare void @whatever(i64, %Foo*, i8**, i8*, i8*, i32) #0 declare void @whatever(i64, %Foo*, i8**, i8*, i8*, i32) #0
attributes #0 = { nounwind uwtable "no-frame-pointer-elim"="true" } attributes #0 = { nounwind uwtable "no-frame-pointer-elim"="true" }
define i32 @test1(i64 %n, %Foo* byval nocapture readnone align 8 %f) #0 { define i32 @test1(i64 %n, %Foo* nocapture readnone align 8 byval(%Foo) %f) #0 {
entry: entry:
%buf = alloca [5 x i8*], align 16 %buf = alloca [5 x i8*], align 16
%p = alloca i8*, align 8 %p = alloca i8*, align 8
%q = alloca i8, align 64 %q = alloca i8, align 64
%r = bitcast [5 x i8*]* %buf to i8* %r = bitcast [5 x i8*]* %buf to i8*
%s = alloca i8, i64 %n, align 1 %s = alloca i8, i64 %n, align 1
store i8* %s, i8** %p, align 8 store i8* %s, i8** %p, align 8
%t = call i32 @llvm.eh.sjlj.setjmp(i8* %s) %t = call i32 @llvm.eh.sjlj.setjmp(i8* %s)
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test/CodeGen/X86/ssp-data-layout.ll

Show First 20 Lines • Show All 159 Lines • ▼ Show 20 Lines; CHECK: call{{l|q}} end_struct_small_nonchar
%3 = bitcast [8 x i8]* %coerce.dive to i64* %3 = bitcast [8 x i8]* %coerce.dive to i64*
%4 = load i64, i64* %3, align 1 %4 = load i64, i64* %3, align 1
%coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0 %coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0
%5 = bitcast [2 x i8]* %coerce.dive25 to i16* %5 = bitcast [2 x i8]* %coerce.dive25 to i16*
%6 = load i16, i16* %5, align 1 %6 = load i16, i16* %5, align 1
%coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0 %coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0
%7 = bitcast [2 x i16]* %coerce.dive26 to i32* %7 = bitcast [2 x i16]* %coerce.dive26 to i32*
%8 = load i32, i32* %7, align 1 %8 = load i32, i32* %7, align 1
call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* byval align 8 %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2) call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* align 8 byval(%struct.struct_large_nonchar) %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2)
ret void ret void
} }
define void @layout_sspstrong() nounwind uwtable sspstrong { define void @layout_sspstrong() nounwind uwtable sspstrong {
entry: entry:
; Expected stack layout for sspstrong is ; Expected stack layout for sspstrong is
; -48 large_nonchar . Group 1, nested arrays, ; -48 large_nonchar . Group 1, nested arrays,
; -56 large_char . arrays >= ssp-buffer-size ; -56 large_char . arrays >= ssp-buffer-size
▲ Show 20 Lines • Show All 127 Lines • ▼ Show 20 Lines; CHECK: call{{l|q}} end_struct_small_nonchar
%3 = bitcast [8 x i8]* %coerce.dive to i64* %3 = bitcast [8 x i8]* %coerce.dive to i64*
%4 = load i64, i64* %3, align 1 %4 = load i64, i64* %3, align 1
%coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0 %coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0
%5 = bitcast [2 x i8]* %coerce.dive25 to i16* %5 = bitcast [2 x i8]* %coerce.dive25 to i16*
%6 = load i16, i16* %5, align 1 %6 = load i16, i16* %5, align 1
%coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0 %coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0
%7 = bitcast [2 x i16]* %coerce.dive26 to i32* %7 = bitcast [2 x i16]* %coerce.dive26 to i32*
%8 = load i32, i32* %7, align 1 %8 = load i32, i32* %7, align 1
call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* byval align 8 %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2) call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* align 8 byval(%struct.struct_large_nonchar) %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2)
ret void ret void
} }
define void @layout_sspreq() nounwind uwtable sspreq { define void @layout_sspreq() nounwind uwtable sspreq {
entry: entry:
; Expected stack layout for sspreq is the same as sspstrong ; Expected stack layout for sspreq is the same as sspstrong
; ;
; CHECK: layout_sspreq: ; CHECK: layout_sspreq:
▲ Show 20 Lines • Show All 115 Lines • ▼ Show 20 Lines; CHECK: call{{l|q}} end_struct_small_nonchar
%3 = bitcast [8 x i8]* %coerce.dive to i64* %3 = bitcast [8 x i8]* %coerce.dive to i64*
%4 = load i64, i64* %3, align 1 %4 = load i64, i64* %3, align 1
%coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0 %coerce.dive25 = getelementptr %struct.struct_small_char, %struct.struct_small_char* %b, i32 0, i32 0
%5 = bitcast [2 x i8]* %coerce.dive25 to i16* %5 = bitcast [2 x i8]* %coerce.dive25 to i16*
%6 = load i16, i16* %5, align 1 %6 = load i16, i16* %5, align 1
%coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0 %coerce.dive26 = getelementptr %struct.struct_small_nonchar, %struct.struct_small_nonchar* %d, i32 0, i32 0
%7 = bitcast [2 x i16]* %coerce.dive26 to i32* %7 = bitcast [2 x i16]* %coerce.dive26 to i32*
%8 = load i32, i32* %7, align 1 %8 = load i32, i32* %7, align 1
call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* byval align 8 %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2) call void @takes_all(i64 %4, i16 %6, %struct.struct_large_nonchar* align 8 byval(%struct.struct_large_nonchar) %c, i32 %8, i8* %arraydecay, i8* %arraydecay22, i32* %arraydecay23, i16* %arraydecay24, i32* %ptr, i32 %0, i32 %1, i32 %2)
ret void ret void
} }
define void @fast_non_linux() ssp { define void @fast_non_linux() ssp {
entry: entry:
; FAST-NON-LIN: fast_non_linux: ; FAST-NON-LIN: fast_non_linux:
; FAST-NON-LIN: call{{l|q}} get_scalar1 ; FAST-NON-LIN: call{{l|q}} get_scalar1
; FAST-NON-LIN: movl %eax, -20( ; FAST-NON-LIN: movl %eax, -20(
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declare void @end_struct_small_char() declare void @end_struct_small_char()
declare i32 @get_struct_large_nonchar() declare i32 @get_struct_large_nonchar()
declare void @end_struct_large_nonchar() declare void @end_struct_large_nonchar()
declare signext i16 @get_struct_small_nonchar() declare signext i16 @get_struct_small_nonchar()
declare void @end_struct_small_nonchar() declare void @end_struct_small_nonchar()
declare void @takes_all(i64, i16, %struct.struct_large_nonchar* byval align 8, i32, i8*, i8*, i32*, i16*, i32*, i32, i32, i32) declare void @takes_all(i64, i16, %struct.struct_large_nonchar* align 8 byval(%struct.struct_large_nonchar), i32, i8*, i8*, i32*, i16*, i32*, i32, i32, i32)
declare void @takes_two(i32, i8*) declare void @takes_two(i32, i8*)

test/CodeGen/X86/stack-align-memcpy.ll

; RUN: llc < %s -stackrealign -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s ; RUN: llc < %s -stackrealign -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s
%struct.foo = type { [88 x i8] } %struct.foo = type { [88 x i8] }
declare void @bar(i8* nocapture, %struct.foo* align 4 byval) nounwind declare void @bar(i8* nocapture, %struct.foo* align 4 byval(%struct.foo)) nounwind
declare void @baz(i8*) nounwind declare void @baz(i8*) nounwind
; PR15249 ; PR15249
; We can't use rep;movsl here because it clobbers the base pointer in %esi. ; We can't use rep;movsl here because it clobbers the base pointer in %esi.
define void @test1(%struct.foo* nocapture %x, i32 %y) nounwind { define void @test1(%struct.foo* nocapture %x, i32 %y) nounwind {
%dynalloc = alloca i8, i32 %y, align 1 %dynalloc = alloca i8, i32 %y, align 1
call void @bar(i8* %dynalloc, %struct.foo* align 4 byval %x) call void @bar(i8* %dynalloc, %struct.foo* align 4 byval(%struct.foo) %x)
ret void ret void
; CHECK-LABEL: test1: ; CHECK-LABEL: test1:
; CHECK: andl $-16, %esp ; CHECK: andl $-16, %esp
; CHECK: movl %esp, %esi ; CHECK: movl %esp, %esi
; CHECK-NOT: rep;movsl ; CHECK-NOT: rep;movsl
} }
; PR19012 ; PR19012
; Also don't clobber %esi if the dynamic alloca comes after the memcpy. ; Also don't clobber %esi if the dynamic alloca comes after the memcpy.
define void @test2(%struct.foo* nocapture %x, i32 %y, i8* %z) nounwind { define void @test2(%struct.foo* nocapture %x, i32 %y, i8* %z) nounwind {
call void @bar(i8* %z, %struct.foo* align 4 byval %x) call void @bar(i8* %z, %struct.foo* align 4 byval(%struct.foo) %x)
%dynalloc = alloca i8, i32 %y, align 1 %dynalloc = alloca i8, i32 %y, align 1
call void @baz(i8* %dynalloc) call void @baz(i8* %dynalloc)
ret void ret void
; CHECK-LABEL: test2: ; CHECK-LABEL: test2:
; CHECK: movl %esp, %esi ; CHECK: movl %esp, %esi
; CHECK-NOT: rep;movsl ; CHECK-NOT: rep;movsl
} }
; Check that we do use rep movs if we make the alloca static. ; Check that we do use rep movs if we make the alloca static.
define void @test3(%struct.foo* nocapture %x, i32 %y, i8* %z) nounwind { define void @test3(%struct.foo* nocapture %x, i32 %y, i8* %z) nounwind {
call void @bar(i8* %z, %struct.foo* align 4 byval %x) call void @bar(i8* %z, %struct.foo* align 4 byval(%struct.foo) %x)
%statalloc = alloca i8, i32 8, align 1 %statalloc = alloca i8, i32 8, align 1
call void @baz(i8* %statalloc) call void @baz(i8* %statalloc)
ret void ret void
; CHECK-LABEL: test3: ; CHECK-LABEL: test3:
; CHECK: rep;movsl ; CHECK: rep;movsl
} }

test/CodeGen/X86/stack-align.ll

; RUN: llc < %s -relocation-model=static -mcpu=yonah | FileCheck %s ; RUN: llc < %s -relocation-model=static -mcpu=yonah | FileCheck %s
; The double argument is at 4(esp) which is 16-byte aligned, but we ; The double argument is at 4(esp) which is 16-byte aligned, but we
; are required to read in extra bytes of memory in order to fold the ; are required to read in extra bytes of memory in order to fold the
; load. Bad Things may happen when reading/processing undefined bytes, ; load. Bad Things may happen when reading/processing undefined bytes,
; so don't fold the load. ; so don't fold the load.
; PR22371 / http://reviews.llvm.org/D7474 ; PR22371 / http://reviews.llvm.org/D7474
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8" target triple = "i686-apple-darwin8"
@G = external global double @G = external global double
define void @test({ double, double }* byval %z, double* %P) nounwind { define void @test({ double, double }* byval({ double, double }) %z, double* %P) nounwind {
entry: entry:
%tmp3 = load double, double* @G, align 16 ; <double> [#uses=1] %tmp3 = load double, double* @G, align 16 ; <double> [#uses=1]
%tmp4 = tail call double @fabs( double %tmp3 ) readnone ; <double> [#uses=1] %tmp4 = tail call double @fabs( double %tmp3 ) readnone ; <double> [#uses=1]
store volatile double %tmp4, double* %P store volatile double %tmp4, double* %P
%tmp = getelementptr { double, double }, { double, double }* %z, i32 0, i32 0 ; <double*> [#uses=1] %tmp = getelementptr { double, double }, { double, double }* %z, i32 0, i32 0 ; <double*> [#uses=1]
%tmp1 = load volatile double, double* %tmp, align 8 ; <double> [#uses=1] %tmp1 = load volatile double, double* %tmp, align 8 ; <double> [#uses=1]
%tmp2 = tail call double @fabs( double %tmp1 ) readnone ; <double> [#uses=1] %tmp2 = tail call double @fabs( double %tmp1 ) readnone ; <double> [#uses=1]
%tmp6 = fadd double %tmp4, %tmp2 ; <double> [#uses=1] %tmp6 = fadd double %tmp4, %tmp2 ; <double> [#uses=1]
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test/CodeGen/X86/tailcallbyval.ll

; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | FileCheck %s ; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | FileCheck %s
%struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32, %struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32 } i32, i32, i32, i32, i32, i32, i32, i32 }
define fastcc i32 @tailcallee(%struct.s* byval %a) nounwind { define fastcc i32 @tailcallee(%struct.s* byval(%struct.s) %a) nounwind {
entry: entry:
%tmp2 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 0 %tmp2 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 0
%tmp3 = load i32, i32* %tmp2 %tmp3 = load i32, i32* %tmp2
ret i32 %tmp3 ret i32 %tmp3
; CHECK: tailcallee ; CHECK: tailcallee
; CHECK: movl 4(%esp), %eax ; CHECK: movl 4(%esp), %eax
} }
define fastcc i32 @tailcaller(%struct.s* byval %a) nounwind { define fastcc i32 @tailcaller(%struct.s* byval(%struct.s) %a) nounwind {
entry: entry:
%tmp4 = tail call fastcc i32 @tailcallee(%struct.s* byval %a ) %tmp4 = tail call fastcc i32 @tailcallee(%struct.s* byval(%struct.s) %a )
ret i32 %tmp4 ret i32 %tmp4
; CHECK: tailcaller ; CHECK: tailcaller
; CHECK: jmp tailcallee ; CHECK: jmp tailcallee
} }

test/CodeGen/X86/tailcallbyval64.ll

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; Expect the trailer. ; Expect the trailer.
; CHECK: .size tailcaller ; CHECK: .size tailcaller
%struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64, %struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64,
i64, i64, i64, i64, i64, i64, i64, i64 } i64, i64, i64, i64, i64, i64, i64, i64 }
declare fastcc i64 @tailcallee(%struct.s* byval %a, i64 %val, i64 %val2, i64 %val3, i64 %val4, i64 %val5) declare fastcc i64 @tailcallee(%struct.s* byval(%struct.s) %a, i64 %val, i64 %val2, i64 %val3, i64 %val4, i64 %val5)
define fastcc i64 @tailcaller(i64 %b, %struct.s* byval %a) { define fastcc i64 @tailcaller(i64 %b, %struct.s* byval(%struct.s) %a) {
entry: entry:
%tmp2 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 1 %tmp2 = getelementptr %struct.s, %struct.s* %a, i32 0, i32 1
%tmp3 = load i64, i64* %tmp2, align 8 %tmp3 = load i64, i64* %tmp2, align 8
%tmp4 = tail call fastcc i64 @tailcallee(%struct.s* byval %a , i64 %tmp3, i64 %b, i64 7, i64 13, i64 17) %tmp4 = tail call fastcc i64 @tailcallee(%struct.s* byval(%struct.s) %a , i64 %tmp3, i64 %b, i64 7, i64 13, i64 17)
ret i64 %tmp4 ret i64 %tmp4
} }

test/CodeGen/XCore/byVal.ll

; RUN: llc < %s -march=xcore | FileCheck %s ; RUN: llc < %s -march=xcore | FileCheck %s
; CHECK-LABEL: f0Test ; CHECK-LABEL: f0Test
; CHECK: entsp 1 ; CHECK: entsp 1
; CHECK: bl f0 ; CHECK: bl f0
; CHECK: retsp 1 ; CHECK: retsp 1
%struct.st0 = type { [0 x i32] } %struct.st0 = type { [0 x i32] }
declare void @f0(%struct.st0*) nounwind declare void @f0(%struct.st0*) nounwind
define void @f0Test(%struct.st0* byval %s0) nounwind { define void @f0Test(%struct.st0* byval(%struct.st0) %s0) nounwind {
entry: entry:
call void @f0(%struct.st0* %s0) nounwind call void @f0(%struct.st0* %s0) nounwind
ret void ret void
} }
; CHECK-LABEL: f1Test ; CHECK-LABEL: f1Test
; CHECK: entsp 13 ; CHECK: entsp 13
; CHECK: stw r4, sp[12] ; CHECK: stw r4, sp[12]
; CHECK: stw r5, sp[11] ; CHECK: stw r5, sp[11]
; CHECK: mov r4, r0 ; CHECK: mov r4, r0
; CHECK: ldaw r5, sp[1] ; CHECK: ldaw r5, sp[1]
; CHECK: ldc r2, 40 ; CHECK: ldc r2, 40
; CHECK: mov r0, r5 ; CHECK: mov r0, r5
; CHECK: bl __memcpy_4 ; CHECK: bl __memcpy_4
; CHECK: mov r0, r5 ; CHECK: mov r0, r5
; CHECK: bl f1 ; CHECK: bl f1
; CHECK: mov r0, r4 ; CHECK: mov r0, r4
; CHECK: ldw r5, sp[11] ; CHECK: ldw r5, sp[11]
; CHECK: ldw r4, sp[12] ; CHECK: ldw r4, sp[12]
; CHECK: retsp 13 ; CHECK: retsp 13
%struct.st1 = type { [10 x i32] } %struct.st1 = type { [10 x i32] }
declare void @f1(%struct.st1*) nounwind declare void @f1(%struct.st1*) nounwind
define i32 @f1Test(i32 %i, %struct.st1* byval %s1) nounwind { define i32 @f1Test(i32 %i, %struct.st1* byval(%struct.st1) %s1) nounwind {
entry: entry:
call void @f1(%struct.st1* %s1) nounwind call void @f1(%struct.st1* %s1) nounwind
ret i32 %i ret i32 %i
} }
; CHECK-LABEL: f2Test ; CHECK-LABEL: f2Test
; CHECK: extsp 4 ; CHECK: extsp 4
; CHECK: stw lr, sp[1] ; CHECK: stw lr, sp[1]
; CHECK: stw r2, sp[3] ; CHECK: stw r2, sp[3]
; CHECK: stw r3, sp[4] ; CHECK: stw r3, sp[4]
; CHECK: ldw r0, r0[0] ; CHECK: ldw r0, r0[0]
; CHECK: stw r0, sp[2] ; CHECK: stw r0, sp[2]
; CHECK: ldaw r2, sp[2] ; CHECK: ldaw r2, sp[2]
; CHECK: mov r0, r1 ; CHECK: mov r0, r1
; CHECK: mov r1, r2 ; CHECK: mov r1, r2
; CHECK: bl f2 ; CHECK: bl f2
; CHECK: ldw lr, sp[1] ; CHECK: ldw lr, sp[1]
; CHECK: ldaw sp, sp[4] ; CHECK: ldaw sp, sp[4]
; CHECK: retsp 0 ; CHECK: retsp 0
%struct.st2 = type { i32 } %struct.st2 = type { i32 }
declare void @f2(i32, %struct.st2*) nounwind declare void @f2(i32, %struct.st2*) nounwind
define void @f2Test(%struct.st2* byval %s2, i32 %i, ...) nounwind { define void @f2Test(%struct.st2* byval(%struct.st2) %s2, i32 %i, ...) nounwind {
entry: entry:
call void @f2(i32 %i, %struct.st2* %s2) call void @f2(i32 %i, %struct.st2* %s2)
ret void ret void
} }
; CHECK-LABEL: f3Test ; CHECK-LABEL: f3Test
; CHECK: entsp 2 ; CHECK: entsp 2
; CHECK: ldc r1, 0 ; CHECK: ldc r1, 0
; CHECK: ld8u r2, r0[r1] ; CHECK: ld8u r2, r0[r1]
; CHECK: ldaw r0, sp[1] ; CHECK: ldaw r0, sp[1]
; CHECK: st8 r2, r0[r1] ; CHECK: st8 r2, r0[r1]
; CHECK: bl f ; CHECK: bl f
; CHECK: retsp 2 ; CHECK: retsp 2
declare void @f3(i8*) nounwind declare void @f3(i8*) nounwind
define void @f3Test(i8* byval %v) nounwind { define void @f3Test(i8* byval(i8) %v) nounwind {
entry: entry:
call void @f3(i8* %v) nounwind call void @f3(i8* %v) nounwind
ret void ret void
} }

test/DebugInfo/Generic/2010-10-01-crash.ll

; RUN: llc -O0 %s -o /dev/null ; RUN: llc -O0 %s -o /dev/null
define void @CGRectStandardize(i32* sret %agg.result, i32* byval %rect) nounwind ssp !dbg !0 { define void @CGRectStandardize(i32* sret %agg.result, i32* byval(i32) %rect) nounwind ssp !dbg !0 {
entry: entry:
call void @llvm.dbg.declare(metadata i32* %rect, metadata !23, metadata !DIExpression()), !dbg !24 call void @llvm.dbg.declare(metadata i32* %rect, metadata !23, metadata !DIExpression()), !dbg !24
ret void ret void
} }
declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
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test/DebugInfo/X86/byvalstruct.ll

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@"\01L_OBJC_METH_VAR_NAME_" = internal global [32 x i8] c"initWithCopy:andInfo:andLength:\00", section "__TEXT,__objc_methname,cstring_literals", align 1 @"\01L_OBJC_METH_VAR_NAME_" = internal global [32 x i8] c"initWithCopy:andInfo:andLength:\00", section "__TEXT,__objc_methname,cstring_literals", align 1
@"\01L_OBJC_METH_VAR_TYPE_" = internal global [23 x i8] c"@56@0:8@16{?=QQd}24Q48\00", section "__TEXT,__objc_methtype,cstring_literals", align 1 @"\01L_OBJC_METH_VAR_TYPE_" = internal global [23 x i8] c"@56@0:8@16{?=QQd}24Q48\00", section "__TEXT,__objc_methtype,cstring_literals", align 1
@"\01l_OBJC_$_INSTANCE_METHODS_Bitmap" = internal global { i32, i32, [1 x %struct._objc_method] } { i32 24, i32 1, [1 x %struct._objc_method] [%struct._objc_method { i8* getelementptr inbounds ([32 x i8], [32 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @"\01L_OBJC_METH_VAR_TYPE_", i32 0, i32 0), i8* bitcast (i8* (%0*, i8*, %0*, %struct.ImageInfo*, i64)* @"\01-[Bitmap initWithCopy:andInfo:andLength:]" to i8*) }] }, section "__DATA, __objc_const", align 8 @"\01l_OBJC_$_INSTANCE_METHODS_Bitmap" = internal global { i32, i32, [1 x %struct._objc_method] } { i32 24, i32 1, [1 x %struct._objc_method] [%struct._objc_method { i8* getelementptr inbounds ([32 x i8], [32 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @"\01L_OBJC_METH_VAR_TYPE_", i32 0, i32 0), i8* bitcast (i8* (%0*, i8*, %0*, %struct.ImageInfo*, i64)* @"\01-[Bitmap initWithCopy:andInfo:andLength:]" to i8*) }] }, section "__DATA, __objc_const", align 8
@"\01l_OBJC_CLASS_RO_$_Bitmap" = internal global %struct._class_ro_t { i32 2, i32 0, i32 0, i8* null, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @"\01L_OBJC_CLASS_NAME_", i32 0, i32 0), %struct.__method_list_t* bitcast ({ i32, i32, [1 x %struct._objc_method] }* @"\01l_OBJC_$_INSTANCE_METHODS_Bitmap" to %struct.__method_list_t*), %struct._objc_protocol_list* null, %struct._ivar_list_t* null, i8* null, %struct._prop_list_t* null }, section "__DATA, __objc_const", align 8 @"\01l_OBJC_CLASS_RO_$_Bitmap" = internal global %struct._class_ro_t { i32 2, i32 0, i32 0, i8* null, i8* getelementptr inbounds ([7 x i8], [7 x i8]* @"\01L_OBJC_CLASS_NAME_", i32 0, i32 0), %struct.__method_list_t* bitcast ({ i32, i32, [1 x %struct._objc_method] }* @"\01l_OBJC_$_INSTANCE_METHODS_Bitmap" to %struct.__method_list_t*), %struct._objc_protocol_list* null, %struct._ivar_list_t* null, i8* null, %struct._prop_list_t* null }, section "__DATA, __objc_const", align 8
@"\01L_OBJC_LABEL_CLASS_$" = internal global [1 x i8*] [i8* bitcast (%struct._class_t* @"OBJC_CLASS_$_Bitmap" to i8*)], section "__DATA, __objc_classlist, regular, no_dead_strip", align 8 @"\01L_OBJC_LABEL_CLASS_$" = internal global [1 x i8*] [i8* bitcast (%struct._class_t* @"OBJC_CLASS_$_Bitmap" to i8*)], section "__DATA, __objc_classlist, regular, no_dead_strip", align 8
@llvm.used = appending global [5 x i8*] [i8* getelementptr inbounds ([7 x i8], [7 x i8]* @"\01L_OBJC_CLASS_NAME_", i32 0, i32 0), i8* getelementptr inbounds ([32 x i8], [32 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @"\01L_OBJC_METH_VAR_TYPE_", i32 0, i32 0), i8* bitcast ({ i32, i32, [1 x %struct._objc_method] }* @"\01l_OBJC_$_INSTANCE_METHODS_Bitmap" to i8*), i8* bitcast ([1 x i8*]* @"\01L_OBJC_LABEL_CLASS_$" to i8*)], section "llvm.metadata" @llvm.used = appending global [5 x i8*] [i8* getelementptr inbounds ([7 x i8], [7 x i8]* @"\01L_OBJC_CLASS_NAME_", i32 0, i32 0), i8* getelementptr inbounds ([32 x i8], [32 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* getelementptr inbounds ([23 x i8], [23 x i8]* @"\01L_OBJC_METH_VAR_TYPE_", i32 0, i32 0), i8* bitcast ({ i32, i32, [1 x %struct._objc_method] }* @"\01l_OBJC_$_INSTANCE_METHODS_Bitmap" to i8*), i8* bitcast ([1 x i8*]* @"\01L_OBJC_LABEL_CLASS_$" to i8*)], section "llvm.metadata"
; Function Attrs: ssp uwtable ; Function Attrs: ssp uwtable
define internal i8* @"\01-[Bitmap initWithCopy:andInfo:andLength:]"(%0* %self, i8* %_cmd, %0* %otherBitmap, %struct.ImageInfo* byval align 8 %info, i64 %length) #0 !dbg !7 { define internal i8* @"\01-[Bitmap initWithCopy:andInfo:andLength:]"(%0* %self, i8* %_cmd, %0* %otherBitmap, %struct.ImageInfo* align 8 byval(%struct.ImageInfo) %info, i64 %length) #0 !dbg !7 {
entry: entry:
%retval = alloca i8*, align 8 %retval = alloca i8*, align 8
%self.addr = alloca %0*, align 8 %self.addr = alloca %0*, align 8
%_cmd.addr = alloca i8*, align 8 %_cmd.addr = alloca i8*, align 8
%otherBitmap.addr = alloca %0*, align 8 %otherBitmap.addr = alloca %0*, align 8
%length.addr = alloca i64, align 8 %length.addr = alloca i64, align 8
store %0* %self, %0** %self.addr, align 8 store %0* %self, %0** %self.addr, align 8
call void @llvm.dbg.declare(metadata %0** %self.addr, metadata !28, metadata !DIExpression()), !dbg !29 call void @llvm.dbg.declare(metadata %0** %self.addr, metadata !28, metadata !DIExpression()), !dbg !29
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test/DebugInfo/X86/dbg-byval-parameter.ll

; RUN: %llc_dwarf -march=x86 -asm-verbose < %s | grep DW_TAG_formal_parameter ; RUN: %llc_dwarf -march=x86 -asm-verbose < %s | grep DW_TAG_formal_parameter
%struct.Pt = type { double, double } %struct.Pt = type { double, double }
%struct.Rect = type { %struct.Pt, %struct.Pt } %struct.Rect = type { %struct.Pt, %struct.Pt }
define double @foo(%struct.Rect* byval %my_r0) nounwind ssp !dbg !1 { define double @foo(%struct.Rect* byval(%struct.Rect) %my_r0) nounwind ssp !dbg !1 {
entry: entry:
%retval = alloca double ; <double*> [#uses=2] %retval = alloca double ; <double*> [#uses=2]
%0 = alloca double ; <double*> [#uses=2] %0 = alloca double ; <double*> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
call void @llvm.dbg.declare(metadata %struct.Rect* %my_r0, metadata !0, metadata !DIExpression()), !dbg !15 call void @llvm.dbg.declare(metadata %struct.Rect* %my_r0, metadata !0, metadata !DIExpression()), !dbg !15
%1 = getelementptr inbounds %struct.Rect, %struct.Rect* %my_r0, i32 0, i32 0, !dbg !16 ; <%struct.Pt*> [#uses=1] %1 = getelementptr inbounds %struct.Rect, %struct.Rect* %my_r0, i32 0, i32 0, !dbg !16 ; <%struct.Pt*> [#uses=1]
%2 = getelementptr inbounds %struct.Pt, %struct.Pt* %1, i32 0, i32 0, !dbg !16 ; <double*> [#uses=1] %2 = getelementptr inbounds %struct.Pt, %struct.Pt* %1, i32 0, i32 0, !dbg !16 ; <double*> [#uses=1]
%3 = load double, double* %2, align 8, !dbg !16 ; <double> [#uses=1] %3 = load double, double* %2, align 8, !dbg !16 ; <double> [#uses=1]
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test/DebugInfo/X86/pieces-2.ll

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; ModuleID = '/Volumes/Data/llvm/test/DebugInfo/X86/sroasplit-1.ll' ; ModuleID = '/Volumes/Data/llvm/test/DebugInfo/X86/sroasplit-1.ll'
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.9.0" target triple = "x86_64-apple-macosx10.9.0"
%struct.Outer = type { [2 x %struct.Inner] } %struct.Outer = type { [2 x %struct.Inner] }
%struct.Inner = type { i32, i64 } %struct.Inner = type { i32, i64 }
; Function Attrs: nounwind ssp uwtable ; Function Attrs: nounwind ssp uwtable
define i32 @foo(%struct.Outer* byval align 8 %outer) #0 !dbg !4 { define i32 @foo(%struct.Outer* align 8 byval(%struct.Outer) %outer) #0 !dbg !4 {
entry: entry:
call void @llvm.dbg.declare(metadata %struct.Outer* %outer, metadata !25, metadata !DIExpression()), !dbg !26 call void @llvm.dbg.declare(metadata %struct.Outer* %outer, metadata !25, metadata !DIExpression()), !dbg !26
%i1.sroa.0.0..sroa_idx = getelementptr inbounds %struct.Outer, %struct.Outer* %outer, i64 0, i32 0, i64 1, i32 0, !dbg !27 %i1.sroa.0.0..sroa_idx = getelementptr inbounds %struct.Outer, %struct.Outer* %outer, i64 0, i32 0, i64 1, i32 0, !dbg !27
%i1.sroa.0.0.copyload = load i32, i32* %i1.sroa.0.0..sroa_idx, align 8, !dbg !27 %i1.sroa.0.0.copyload = load i32, i32* %i1.sroa.0.0..sroa_idx, align 8, !dbg !27
call void @llvm.dbg.value(metadata i32 %i1.sroa.0.0.copyload, i64 0, metadata !28, metadata !29), !dbg !27 call void @llvm.dbg.value(metadata i32 %i1.sroa.0.0.copyload, i64 0, metadata !28, metadata !29), !dbg !27
%i1.sroa.2.0..sroa_raw_cast = bitcast %struct.Outer* %outer to i8*, !dbg !27 %i1.sroa.2.0..sroa_raw_cast = bitcast %struct.Outer* %outer to i8*, !dbg !27
%i1.sroa.2.0..sroa_raw_idx = getelementptr inbounds i8, i8* %i1.sroa.2.0..sroa_raw_cast, i64 20, !dbg !27 %i1.sroa.2.0..sroa_raw_idx = getelementptr inbounds i8, i8* %i1.sroa.2.0..sroa_raw_cast, i64 20, !dbg !27
ret i32 %i1.sroa.0.0.copyload, !dbg !32 ret i32 %i1.sroa.0.0.copyload, !dbg !32
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test/DebugInfo/X86/safestack-byval.ll

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; CHECK: ![[ZZZ_EXPR:.*]] = !DIExpression(DW_OP_deref, DW_OP_minus, 400) ; CHECK: ![[ZZZ_EXPR:.*]] = !DIExpression(DW_OP_deref, DW_OP_minus, 400)
; CHECK: DBG_VALUE {{.*}} ![[ZZZ]], ![[ZZZ_EXPR]] ; CHECK: DBG_VALUE {{.*}} ![[ZZZ]], ![[ZZZ_EXPR]]
%struct.S = type { [100 x i32] } %struct.S = type { [100 x i32] }
@__safestack_unsafe_stack_ptr = external thread_local(initialexec) global i8* @__safestack_unsafe_stack_ptr = external thread_local(initialexec) global i8*
; Function Attrs: norecurse nounwind readonly safestack uwtable ; Function Attrs: norecurse nounwind readonly safestack uwtable
define i32 @_Z1f1Sm(%struct.S* byval nocapture readonly align 8 %zzz, i64 %len) #0 !dbg !12 { define i32 @_Z1f1Sm(%struct.S* nocapture readonly align 8 byval(%struct.S) %zzz, i64 %len) #0 !dbg !12 {
entry: entry:
%unsafe_stack_ptr = load i8*, i8** @__safestack_unsafe_stack_ptr, !dbg !22 %unsafe_stack_ptr = load i8*, i8** @__safestack_unsafe_stack_ptr, !dbg !22
%unsafe_stack_static_top = getelementptr i8, i8* %unsafe_stack_ptr, i32 -400, !dbg !22 %unsafe_stack_static_top = getelementptr i8, i8* %unsafe_stack_ptr, i32 -400, !dbg !22
store i8* %unsafe_stack_static_top, i8** @__safestack_unsafe_stack_ptr, !dbg !22 store i8* %unsafe_stack_static_top, i8** @__safestack_unsafe_stack_ptr, !dbg !22
; !17 describes "zzz" ; !17 describes "zzz"
call void @llvm.dbg.declare(metadata i8* %unsafe_stack_ptr, metadata !17, metadata !23), !dbg !22 call void @llvm.dbg.declare(metadata i8* %unsafe_stack_ptr, metadata !17, metadata !23), !dbg !22
%0 = getelementptr i8, i8* %unsafe_stack_ptr, i32 -400, !dbg !22 %0 = getelementptr i8, i8* %unsafe_stack_ptr, i32 -400, !dbg !22
%zzz.unsafe-byval = bitcast i8* %0 to %struct.S*, !dbg !22 %zzz.unsafe-byval = bitcast i8* %0 to %struct.S*, !dbg !22
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test/DebugInfo/X86/sroasplit-1.ll

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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.9.0" target triple = "x86_64-apple-macosx10.9.0"
%struct.Outer = type { [2 x %struct.Inner] } %struct.Outer = type { [2 x %struct.Inner] }
%struct.Inner = type { i32, i64 } %struct.Inner = type { i32, i64 }
; Function Attrs: nounwind ssp uwtable ; Function Attrs: nounwind ssp uwtable
define i32 @foo(%struct.Outer* byval align 8 %outer) #0 !dbg !4 { define i32 @foo(%struct.Outer* align 8 byval(%struct.Outer) %outer) #0 !dbg !4 {
entry: entry:
%i1 = alloca %struct.Inner, align 8 %i1 = alloca %struct.Inner, align 8
call void @llvm.dbg.declare(metadata %struct.Outer* %outer, metadata !25, metadata !2), !dbg !26 call void @llvm.dbg.declare(metadata %struct.Outer* %outer, metadata !25, metadata !2), !dbg !26
call void @llvm.dbg.declare(metadata %struct.Inner* %i1, metadata !27, metadata !2), !dbg !28 call void @llvm.dbg.declare(metadata %struct.Inner* %i1, metadata !27, metadata !2), !dbg !28
%inner = getelementptr inbounds %struct.Outer, %struct.Outer* %outer, i32 0, i32 0, !dbg !28 %inner = getelementptr inbounds %struct.Outer, %struct.Outer* %outer, i32 0, i32 0, !dbg !28
%arrayidx = getelementptr inbounds [2 x %struct.Inner], [2 x %struct.Inner]* %inner, i32 0, i64 1, !dbg !28 %arrayidx = getelementptr inbounds [2 x %struct.Inner], [2 x %struct.Inner]* %inner, i32 0, i64 1, !dbg !28
%0 = bitcast %struct.Inner* %i1 to i8*, !dbg !28 %0 = bitcast %struct.Inner* %i1 to i8*, !dbg !28
%1 = bitcast %struct.Inner* %arrayidx to i8*, !dbg !28 %1 = bitcast %struct.Inner* %arrayidx to i8*, !dbg !28
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test/DebugInfo/X86/sroasplit-4.ll

Show First 20 Lines • Show All 76 Lines • ▼ Show 20 Linesif.end: ; preds = %entry
store i64 0, i64* %t2, align 8, !dbg !32 store i64 0, i64* %t2, align 8, !dbg !32
%y3 = getelementptr inbounds %struct.r, %struct.r* %r, i32 0, i32 2, !dbg !32 %y3 = getelementptr inbounds %struct.r, %struct.r* %r, i32 0, i32 2, !dbg !32
%2 = bitcast %struct.p* %y3 to i8*, !dbg !32 %2 = bitcast %struct.p* %y3 to i8*, !dbg !32
%3 = bitcast %struct.p* %y to i8*, !dbg !32 %3 = bitcast %struct.p* %y to i8*, !dbg !32
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %3, i64 16, i32 8, i1 false), !dbg !32 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %3, i64 16, i32 8, i1 false), !dbg !32
%4 = bitcast %struct.r* %agg.tmp to i8*, !dbg !33 %4 = bitcast %struct.r* %agg.tmp to i8*, !dbg !33
%5 = bitcast %struct.r* %r to i8*, !dbg !33 %5 = bitcast %struct.r* %r to i8*, !dbg !33
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* %5, i64 40, i32 8, i1 false), !dbg !33 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %4, i8* %5, i64 40, i32 8, i1 false), !dbg !33
%call4 = call i32 @_Z7call_me1r(%struct.r* byval align 8 %agg.tmp), !dbg !33 %call4 = call i32 @_Z7call_me1r(%struct.r* align 8 byval(%struct.r) %agg.tmp), !dbg !33
store i32 %call4, i32* %retval, !dbg !33 store i32 %call4, i32* %retval, !dbg !33
br label %return, !dbg !33 br label %return, !dbg !33
return: ; preds = %if.end, %if.then return: ; preds = %if.end, %if.then
%6 = load i32, i32* %retval, !dbg !34 %6 = load i32, i32* %retval, !dbg !34
ret i32 %6, !dbg !34 ret i32 %6, !dbg !34
} }
declare i32 @_Z5maybev() declare i32 @_Z5maybev()
; Function Attrs: nounwind readnone ; Function Attrs: nounwind readnone
declare void @llvm.dbg.declare(metadata, metadata, metadata) #2 declare void @llvm.dbg.declare(metadata, metadata, metadata) #2
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #3 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #3
declare i32 @_Z7call_me1r(%struct.r* byval align 8) declare i32 @_Z7call_me1r(%struct.r* align 8 byval(%struct.r))
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #2 = { nounwind readnone } attributes #2 = { nounwind readnone }
attributes #3 = { nounwind } attributes #3 = { nounwind }
!llvm.dbg.cu = !{!0} !llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!21, !22} !llvm.module.flags = !{!21, !22}
!llvm.ident = !{!23} !llvm.ident = !{!23}
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test/Instrumentation/BoundsChecking/simple.ll

Show First 20 Lines • Show All 116 Lines • ▼ Show 20 Lines
; CHECK: select ; CHECK: select
; CHECK: select ; CHECK: select
; CHECK: trap ; CHECK: trap
%4 = load i128, i128* %3, align 4 %4 = load i128, i128* %3, align 4
ret void ret void
} }
; CHECK: @f11 ; CHECK: @f11
define void @f11(i128* byval %x) nounwind { define void @f11(i128* byval(i128) %x) nounwind {
%1 = bitcast i128* %x to i8* %1 = bitcast i128* %x to i8*
%2 = getelementptr inbounds i8, i8* %1, i64 16 %2 = getelementptr inbounds i8, i8* %1, i64 16
; CHECK: br label ; CHECK: br label
%3 = load i8, i8* %2, align 4 %3 = load i8, i8* %2, align 4
ret void ret void
} }
; CHECK: @f11_as1 ; CHECK: @f11_as1
define void @f11_as1(i128 addrspace(1)* byval %x) nounwind { define void @f11_as1(i128 addrspace(1)* byval(i128) %x) nounwind {
%1 = bitcast i128 addrspace(1)* %x to i8 addrspace(1)* %1 = bitcast i128 addrspace(1)* %x to i8 addrspace(1)*
%2 = getelementptr inbounds i8, i8 addrspace(1)* %1, i16 16 %2 = getelementptr inbounds i8, i8 addrspace(1)* %1, i16 16
; CHECK: br label ; CHECK: br label
%3 = load i8, i8 addrspace(1)* %2, align 4 %3 = load i8, i8 addrspace(1)* %2, align 4
ret void ret void
} }
; CHECK: @f12 ; CHECK: @f12
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test/Instrumentation/MemorySanitizer/byval-alignment.ll

; Test that copy alignment for byval arguments is limited by param-tls slot alignment. ; Test that copy alignment for byval arguments is limited by param-tls slot alignment.
; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s ; RUN: opt < %s -msan -msan-check-access-address=0 -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
%struct.S = type { i64, i64, i64, [8 x i8] } %struct.S = type { i64, i64, i64, [8 x i8] }
; CHECK: [[A:%.*]] = bitcast i64* {{.*}} add {{.*}} ptrtoint {{.*}} @__msan_param_tls {{.*}} i64 8) ; CHECK: [[A:%.*]] = bitcast i64* {{.*}} add {{.*}} ptrtoint {{.*}} @__msan_param_tls {{.*}} i64 8)
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[A]], i8* {{.*}}, i64 32, i32 8, i1 false) ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* [[A]], i8* {{.*}}, i64 32, i32 8, i1 false)
define void @Caller() sanitize_memory { define void @Caller() sanitize_memory {
entry: entry:
%agg.tmp = alloca %struct.S, align 16 %agg.tmp = alloca %struct.S, align 16
call void @Callee(i32 1, %struct.S* byval align 16 %agg.tmp) call void @Callee(i32 1, %struct.S* align 16 byval(%struct.S) %agg.tmp)
ret void ret void
} }
declare void @Callee(i32, %struct.S* byval align 16) declare void @Callee(i32, %struct.S* align 16 byval(%struct.S))

test/Instrumentation/MemorySanitizer/check_access_address.ll

; RUN: opt < %s -msan -msan-check-access-address=1 -S | FileCheck %s ; RUN: opt < %s -msan -msan-check-access-address=1 -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
; Test byval argument shadow alignment ; Test byval argument shadow alignment
define <2 x i64> @ByValArgumentShadowLargeAlignment(<2 x i64>* byval %p) sanitize_memory { define <2 x i64> @ByValArgumentShadowLargeAlignment(<2 x i64>* byval(<2 x i64>) %p) sanitize_memory {
entry: entry:
%x = load <2 x i64>, <2 x i64>* %p %x = load <2 x i64>, <2 x i64>* %p
ret <2 x i64> %x ret <2 x i64> %x
} }
; CHECK-LABEL: @ByValArgumentShadowLargeAlignment ; CHECK-LABEL: @ByValArgumentShadowLargeAlignment
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 16, i32 8, i1 false) ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 16, i32 8, i1 false)
; CHECK: ret <2 x i64> ; CHECK: ret <2 x i64>
define i16 @ByValArgumentShadowSmallAlignment(i16* byval %p) sanitize_memory { define i16 @ByValArgumentShadowSmallAlignment(i16* byval(i16) %p) sanitize_memory {
entry: entry:
%x = load i16, i16* %p %x = load i16, i16* %p
ret i16 %x ret i16 %x
} }
; CHECK-LABEL: @ByValArgumentShadowSmallAlignment ; CHECK-LABEL: @ByValArgumentShadowSmallAlignment
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 2, i32 2, i1 false) ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 2, i32 2, i1 false)
; CHECK: ret i16 ; CHECK: ret i16

test/Instrumentation/MemorySanitizer/msan_basic.ll

Show First 20 Lines • Show All 900 Lines • ▼ Show 20 Linesentry:
%0 = bitcast %struct.StructByVal* %s to i8* %0 = bitcast %struct.StructByVal* %s to i8*
%agg.tmp.sroa.0.0..sroa_cast = bitcast %struct.StructByVal* %s to i64* %agg.tmp.sroa.0.0..sroa_cast = bitcast %struct.StructByVal* %s to i64*
%agg.tmp.sroa.0.0.copyload = load i64, i64* %agg.tmp.sroa.0.0..sroa_cast, align 4 %agg.tmp.sroa.0.0.copyload = load i64, i64* %agg.tmp.sroa.0.0..sroa_cast, align 4
%agg.tmp.sroa.2.0..sroa_idx = getelementptr inbounds %struct.StructByVal, %struct.StructByVal* %s, i64 0, i32 2 %agg.tmp.sroa.2.0..sroa_idx = getelementptr inbounds %struct.StructByVal, %struct.StructByVal* %s, i64 0, i32 2
%agg.tmp.sroa.2.0..sroa_cast = bitcast i32* %agg.tmp.sroa.2.0..sroa_idx to i64* %agg.tmp.sroa.2.0..sroa_cast = bitcast i32* %agg.tmp.sroa.2.0..sroa_idx to i64*
%agg.tmp.sroa.2.0.copyload = load i64, i64* %agg.tmp.sroa.2.0..sroa_cast, align 4 %agg.tmp.sroa.2.0.copyload = load i64, i64* %agg.tmp.sroa.2.0..sroa_cast, align 4
%1 = bitcast %struct.StructByVal* %agg.tmp2 to i8* %1 = bitcast %struct.StructByVal* %agg.tmp2 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* %0, i64 16, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %1, i8* %0, i64 16, i32 4, i1 false)
call void (i32, ...) @VAArgStructFn(i32 undef, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, %struct.StructByVal* byval align 8 %agg.tmp2) call void (i32, ...) @VAArgStructFn(i32 undef, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, i64 %agg.tmp.sroa.0.0.copyload, i64 %agg.tmp.sroa.2.0.copyload, %struct.StructByVal* align 8 byval(%struct.StructByVal) %agg.tmp2)
ret void ret void
} }
; "undef" and the first 2 structs go to general purpose registers; ; "undef" and the first 2 structs go to general purpose registers;
; the third struct goes to the overflow area byval ; the third struct goes to the overflow area byval
; CHECK-LABEL: @VAArgStruct ; CHECK-LABEL: @VAArgStruct
; undef ; undef
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test/Linker/func-attrs-a.ll

; RUN: llvm-link %s %p/func-attrs-b.ll -S -o - | FileCheck %s ; RUN: llvm-link %s %p/func-attrs-b.ll -S -o - | FileCheck %s
; PR2382 ; PR2382
; CHECK: call void @check0(%struct.S0* sret null, %struct.S0* byval align 4 null, %struct.S0* align 4 null, %struct.S0* byval align 4 null) ; CHECK: call void @check0(%struct.S0* sret null, %struct.S0* align 4 byval(%struct.S0) null, %struct.S0* align 4 null, %struct.S0* align 4 byval(%struct.S0) null)
; CHECK: define void @check0(%struct.S0* sret %agg.result, %struct.S0* byval %arg0, %struct.S0* %arg1, %struct.S0* byval %arg2) ; CHECK: define void @check0(%struct.S0* sret %agg.result, %struct.S0* byval(%struct.S0) %arg0, %struct.S0* %arg1, %struct.S0* byval(%struct.S0) %arg2)
%struct.S0 = type <{ i8, i8, i8, i8 }> %struct.S0 = type <{ i8, i8, i8, i8 }>
define void @a() { define void @a() {
call void @check0(%struct.S0* sret null, %struct.S0* byval align 4 null, %struct.S0* align 4 null, %struct.S0* byval align 4 null) call void @check0(%struct.S0* sret null, %struct.S0* align 4 byval(%struct.S0) null, %struct.S0* align 4 null, %struct.S0* align 4 byval(%struct.S0) null)
ret void ret void
} }
declare void @check0(%struct.S0*, %struct.S0*, %struct.S0*, %struct.S0*) declare void @check0(%struct.S0*, %struct.S0*, %struct.S0*, %struct.S0*)

test/Linker/func-attrs-b.ll

; This file is used with func-attrs-a.ll ; This file is used with func-attrs-a.ll
; RUN: true ; RUN: true
%struct.S0 = type <{ i8, i8, i8, i8 }> %struct.S0 = type <{ i8, i8, i8, i8 }>
define void @check0(%struct.S0* sret %agg.result, %struct.S0* byval %arg0, %struct.S0* %arg1, %struct.S0* byval %arg2) { define void @check0(%struct.S0* sret %agg.result, %struct.S0* byval(%struct.S0) %arg0, %struct.S0* %arg1, %struct.S0* byval(%struct.S0) %arg2) {
ret void ret void
} }

test/Transforms/ArgumentPromotion/attrs.ll

; RUN: opt < %s -argpromotion -S | grep zeroext ; RUN: opt < %s -argpromotion -S | grep zeroext
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
define internal void @f(%struct.ss* byval %b, i32* byval %X, i32 %i) nounwind { define internal void @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X, i32 %i) nounwind {
entry: entry:
%tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 %tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0
%tmp1 = load i32, i32* %tmp, align 4 %tmp1 = load i32, i32* %tmp, align 4
%tmp2 = add i32 %tmp1, 1 %tmp2 = add i32 %tmp1, 1
store i32 %tmp2, i32* %tmp, align 4 store i32 %tmp2, i32* %tmp, align 4
store i32 0, i32* %X store i32 0, i32* %X
ret void ret void
} }
define i32 @test(i32* %X) { define i32 @test(i32* %X) {
entry: entry:
%S = alloca %struct.ss ; <%struct.ss*> [#uses=4] %S = alloca %struct.ss ; <%struct.ss*> [#uses=4]
%tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] %tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1]
store i32 1, i32* %tmp1, align 8 store i32 1, i32* %tmp1, align 8
%tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1] %tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
store i64 2, i64* %tmp4, align 4 store i64 2, i64* %tmp4, align 4
call void @f( %struct.ss* byval %S, i32* byval %X, i32 zeroext 0) call void @f( %struct.ss* byval(%struct.ss) %S, i32* byval(i32) %X, i32 zeroext 0)
ret i32 0 ret i32 0
} }

test/Transforms/ArgumentPromotion/byval-2.ll

; RUN: opt < %s -argpromotion -S | FileCheck %s ; RUN: opt < %s -argpromotion -S | FileCheck %s
; Arg promotion eliminates the struct argument. ; Arg promotion eliminates the struct argument.
; FIXME: Should it eliminate the i32* argument? ; FIXME: Should it eliminate the i32* argument?
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
define internal void @f(%struct.ss* byval %b, i32* byval %X) nounwind { define internal void @f(%struct.ss* byval(%struct.ss) %b, i32* byval(i32) %X) nounwind {
; CHECK-LABEL: define internal void @f(i32 %b.0, i64 %b.1, i32* byval %X) ; CHECK-LABEL: define internal void @f(i32 %b.0, i64 %b.1, i32* byval(i32) %X)
entry: entry:
%tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 %tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0
%tmp1 = load i32, i32* %tmp, align 4 %tmp1 = load i32, i32* %tmp, align 4
%tmp2 = add i32 %tmp1, 1 %tmp2 = add i32 %tmp1, 1
store i32 %tmp2, i32* %tmp, align 4 store i32 %tmp2, i32* %tmp, align 4
store i32 0, i32* %X store i32 0, i32* %X
ret void ret void
} }
define i32 @test(i32* %X) { define i32 @test(i32* %X) {
; CHECK-LABEL: define i32 @test ; CHECK-LABEL: define i32 @test
entry: entry:
%S = alloca %struct.ss %S = alloca %struct.ss
%tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 %tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0
store i32 1, i32* %tmp1, align 8 store i32 1, i32* %tmp1, align 8
%tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 %tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1
store i64 2, i64* %tmp4, align 4 store i64 2, i64* %tmp4, align 4
call void @f( %struct.ss* byval %S, i32* byval %X) call void @f( %struct.ss* byval(%struct.ss) %S, i32* byval(i32) %X)
; CHECK: call void @f(i32 %{{.*}}, i64 %{{.*}}, i32* byval %{{.*}}) ; CHECK: call void @f(i32 %{{.*}}, i64 %{{.*}}, i32* byval(i32) %{{.*}})
ret i32 0 ret i32 0
} }

test/Transforms/ArgumentPromotion/byval.ll

; RUN: opt < %s -argpromotion -S | FileCheck %s ; RUN: opt < %s -argpromotion -S | FileCheck %s
target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
define internal void @f(%struct.ss* byval %b) nounwind { define internal void @f(%struct.ss* byval(%struct.ss) %b) nounwind {
; CHECK-LABEL: define internal void @f(i32 %b.0, i64 %b.1) ; CHECK-LABEL: define internal void @f(i32 %b.0, i64 %b.1)
entry: entry:
%tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2] %tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2]
%tmp1 = load i32, i32* %tmp, align 4 ; <i32> [#uses=1] %tmp1 = load i32, i32* %tmp, align 4 ; <i32> [#uses=1]
%tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1] %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1]
store i32 %tmp2, i32* %tmp, align 4 store i32 %tmp2, i32* %tmp, align 4
ret void ret void
} }
define i32 @main() nounwind { define i32 @main() nounwind {
; CHECK-LABEL: define i32 @main ; CHECK-LABEL: define i32 @main
entry: entry:
%S = alloca %struct.ss ; <%struct.ss*> [#uses=4] %S = alloca %struct.ss ; <%struct.ss*> [#uses=4]
%tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] %tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1]
store i32 1, i32* %tmp1, align 8 store i32 1, i32* %tmp1, align 8
%tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1] %tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
store i64 2, i64* %tmp4, align 4 store i64 2, i64* %tmp4, align 4
call void @f( %struct.ss* byval %S ) nounwind call void @f( %struct.ss* byval(%struct.ss) %S ) nounwind
; CHECK: call void @f(i32 %{{.*}}, i64 %{{.*}}) ; CHECK: call void @f(i32 %{{.*}}, i64 %{{.*}})
ret i32 0 ret i32 0
} }

test/Transforms/ArgumentPromotion/fp80.ll

; RUN: opt < %s -argpromotion -S | FileCheck %s ; RUN: opt < %s -argpromotion -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
%union.u = type { x86_fp80 } %union.u = type { x86_fp80 }
%struct.s = type { double, i16, i8, [5 x i8] } %struct.s = type { double, i16, i8, [5 x i8] }
@b = internal global %struct.s { double 3.14, i16 9439, i8 25, [5 x i8] undef }, align 16 @b = internal global %struct.s { double 3.14, i16 9439, i8 25, [5 x i8] undef }, align 16
%struct.Foo = type { i32, i64 } %struct.Foo = type { i32, i64 }
@a = internal global %struct.Foo { i32 1, i64 2 }, align 8 @a = internal global %struct.Foo { i32 1, i64 2 }, align 8
define void @run() { define void @run() {
entry: entry:
tail call i8 @UseLongDoubleUnsafely(%union.u* byval align 16 bitcast (%struct.s* @b to %union.u*)) tail call i8 @UseLongDoubleUnsafely(%union.u* align 16 byval(%union.u) bitcast (%struct.s* @b to %union.u*))
tail call x86_fp80 @UseLongDoubleSafely(%union.u* byval align 16 bitcast (%struct.s* @b to %union.u*)) tail call x86_fp80 @UseLongDoubleSafely(%union.u* align 16 byval(%union.u) bitcast (%struct.s* @b to %union.u*))
call i64 @AccessPaddingOfStruct(%struct.Foo* @a) call i64 @AccessPaddingOfStruct(%struct.Foo* @a)
call i64 @CaptureAStruct(%struct.Foo* @a) call i64 @CaptureAStruct(%struct.Foo* @a)
ret void ret void
} }
; CHECK: internal i8 @UseLongDoubleUnsafely(%union.u* byval align 16 %arg) { ; CHECK: internal i8 @UseLongDoubleUnsafely(%union.u* align 16 byval(%union.u) %arg) {
define internal i8 @UseLongDoubleUnsafely(%union.u* byval align 16 %arg) { define internal i8 @UseLongDoubleUnsafely(%union.u* align 16 byval(%union.u) %arg) {
entry: entry:
%bitcast = bitcast %union.u* %arg to %struct.s* %bitcast = bitcast %union.u* %arg to %struct.s*
%gep = getelementptr inbounds %struct.s, %struct.s* %bitcast, i64 0, i32 2 %gep = getelementptr inbounds %struct.s, %struct.s* %bitcast, i64 0, i32 2
%result = load i8, i8* %gep %result = load i8, i8* %gep
ret i8 %result ret i8 %result
} }
; CHECK: internal x86_fp80 @UseLongDoubleSafely(x86_fp80 {{%.*}}) { ; CHECK: internal x86_fp80 @UseLongDoubleSafely(x86_fp80 {{%.*}}) {
define internal x86_fp80 @UseLongDoubleSafely(%union.u* byval align 16 %arg) { define internal x86_fp80 @UseLongDoubleSafely(%union.u* align 16 byval(%union.u) %arg) {
%gep = getelementptr inbounds %union.u, %union.u* %arg, i64 0, i32 0 %gep = getelementptr inbounds %union.u, %union.u* %arg, i64 0, i32 0
%fp80 = load x86_fp80, x86_fp80* %gep %fp80 = load x86_fp80, x86_fp80* %gep
ret x86_fp80 %fp80 ret x86_fp80 %fp80
} }
; CHECK: define internal i64 @AccessPaddingOfStruct(%struct.Foo* byval %a) { ; CHECK: define internal i64 @AccessPaddingOfStruct(%struct.Foo* byval(%struct.Foo) %a) {
define internal i64 @AccessPaddingOfStruct(%struct.Foo* byval %a) { define internal i64 @AccessPaddingOfStruct(%struct.Foo* byval(%struct.Foo) %a) {
%p = bitcast %struct.Foo* %a to i64* %p = bitcast %struct.Foo* %a to i64*
%v = load i64, i64* %p %v = load i64, i64* %p
ret i64 %v ret i64 %v
} }
; CHECK: define internal i64 @CaptureAStruct(%struct.Foo* byval %a) { ; CHECK: define internal i64 @CaptureAStruct(%struct.Foo* byval(%struct.Foo) %a) {
define internal i64 @CaptureAStruct(%struct.Foo* byval %a) { define internal i64 @CaptureAStruct(%struct.Foo* byval(%struct.Foo) %a) {
entry: entry:
%a_ptr = alloca %struct.Foo* %a_ptr = alloca %struct.Foo*
br label %loop br label %loop
loop: loop:
%phi = phi %struct.Foo* [ null, %entry ], [ %gep, %loop ] %phi = phi %struct.Foo* [ null, %entry ], [ %gep, %loop ]
%0 = phi %struct.Foo* [ %a, %entry ], [ %0, %loop ] %0 = phi %struct.Foo* [ %a, %entry ], [ %0, %loop ]
store %struct.Foo* %phi, %struct.Foo** %a_ptr store %struct.Foo* %phi, %struct.Foo** %a_ptr
%gep = getelementptr %struct.Foo, %struct.Foo* %a, i64 0 %gep = getelementptr %struct.Foo, %struct.Foo* %a, i64 0
br label %loop br label %loop
} }

test/Transforms/ArgumentPromotion/tail.ll

; RUN: opt %s -argpromotion -S -o - | FileCheck %s ; RUN: opt %s -argpromotion -S -o - | FileCheck %s
; PR14710 ; PR14710
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
%pair = type { i32, i32 } %pair = type { i32, i32 }
declare i8* @foo(%pair*) declare i8* @foo(%pair*)
define internal void @bar(%pair* byval %Data) { define internal void @bar(%pair* byval(%pair) %Data) {
; CHECK: define internal void @bar(i32 %Data.0, i32 %Data.1) ; CHECK: define internal void @bar(i32 %Data.0, i32 %Data.1)
; CHECK: %Data = alloca %pair ; CHECK: %Data = alloca %pair
; CHECK-NOT: tail ; CHECK-NOT: tail
; CHECK: call i8* @foo(%pair* %Data) ; CHECK: call i8* @foo(%pair* %Data)
tail call i8* @foo(%pair* %Data) tail call i8* @foo(%pair* %Data)
ret void ret void
} }
define void @zed(%pair* byval %Data) { define void @zed(%pair* byval(%pair) %Data) {
call void @bar(%pair* byval %Data) call void @bar(%pair* byval(%pair) %Data)
ret void ret void
} }

test/Transforms/ArgumentPromotion/variadic.ll

Show All 9 Lines
%struct.tt0 = type { i64, i64 } %struct.tt0 = type { i64, i64 }
%struct.__va_list_tag = type { i32, i32, i8*, i8* } %struct.__va_list_tag = type { i32, i32, i8*, i8* }
@t45 = internal global %struct.tt0 { i64 1335139741, i64 438042995 }, align 8 @t45 = internal global %struct.tt0 { i64 1335139741, i64 438042995 }, align 8
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 { define i32 @main(i32 %argc, i8** nocapture readnone %argv) #0 {
entry: entry:
tail call void (i8*, i8*, i8*, i8*, i8*, ...) @callee_t0f(i8* undef, i8* undef, i8* undef, i8* undef, i8* undef, %struct.tt0* byval align 8 @t45) tail call void (i8*, i8*, i8*, i8*, i8*, ...) @callee_t0f(i8* undef, i8* undef, i8* undef, i8* undef, i8* undef, %struct.tt0* align 8 byval(%struct.tt0) @t45)
ret i32 0 ret i32 0
} }
; Function Attrs: nounwind uwtable ; Function Attrs: nounwind uwtable
define internal void @callee_t0f(i8* nocapture readnone %tp13, i8* nocapture readnone %tp14, i8* nocapture readnone %tp15, i8* nocapture readnone %tp16, i8* nocapture readnone %tp17, ...) { define internal void @callee_t0f(i8* nocapture readnone %tp13, i8* nocapture readnone %tp14, i8* nocapture readnone %tp15, i8* nocapture readnone %tp16, i8* nocapture readnone %tp17, ...) {
entry: entry:
ret void ret void
} }
; CHECK-LABEL: define internal void @callee_t0f(i8* nocapture readnone %tp13, i8* nocapture readnone %tp14, i8* nocapture readnone %tp15, i8* nocapture readnone %tp16, i8* nocapture readnone %tp17, ...) ; CHECK-LABEL: define internal void @callee_t0f(i8* nocapture readnone %tp13, i8* nocapture readnone %tp14, i8* nocapture readnone %tp15, i8* nocapture readnone %tp16, i8* nocapture readnone %tp17, ...)

test/Transforms/BBVectorize/X86/wr-aliases.ll

; RUN: opt -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx -disable-basicaa -bb-vectorize -S < %s | FileCheck %s ; RUN: opt -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx -disable-basicaa -bb-vectorize -S < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
%class.QBezier.15 = type { double, double, double, double, double, double, double, double } %class.QBezier.15 = type { double, double, double, double, double, double, double, double }
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #0 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture readonly, i64, i32, i1) #0
; Function Attrs: uwtable ; Function Attrs: uwtable
declare fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* byval nocapture readonly align 8) #1 declare fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* nocapture readonly align 8 byval(%class.QBezier.15)) #1
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.lifetime.start(i64, i8* nocapture) #0 declare void @llvm.lifetime.start(i64, i8* nocapture) #0
; Function Attrs: nounwind ; Function Attrs: nounwind
declare void @llvm.lifetime.end(i64, i8* nocapture) #0 declare void @llvm.lifetime.end(i64, i8* nocapture) #0
define void @main_arrayctor.cont([10 x %class.QBezier.15]* %beziers, %class.QBezier.15* %agg.tmp.i, %class.QBezier.15* %agg.tmp55.i, %class.QBezier.15* %agg.tmp56.i) { define void @main_arrayctor.cont([10 x %class.QBezier.15]* %beziers, %class.QBezier.15* %agg.tmp.i, %class.QBezier.15* %agg.tmp55.i, %class.QBezier.15* %agg.tmp56.i) {
Show All 31 Linesarrayctor.cont: ; preds = %newFuncRoot
%v0 = bitcast %class.QBezier.15* %agg.tmp.i to i8* %v0 = bitcast %class.QBezier.15* %agg.tmp.i to i8*
call void @llvm.lifetime.start(i64 64, i8* %v0) call void @llvm.lifetime.start(i64 64, i8* %v0)
%v1 = bitcast %class.QBezier.15* %agg.tmp55.i to i8* %v1 = bitcast %class.QBezier.15* %agg.tmp55.i to i8*
call void @llvm.lifetime.start(i64 64, i8* %v1) call void @llvm.lifetime.start(i64 64, i8* %v1)
%v2 = bitcast %class.QBezier.15* %agg.tmp56.i to i8* %v2 = bitcast %class.QBezier.15* %agg.tmp56.i to i8*
call void @llvm.lifetime.start(i64 64, i8* %v2) call void @llvm.lifetime.start(i64 64, i8* %v2)
%v3 = bitcast [10 x %class.QBezier.15]* %beziers to i8* %v3 = bitcast [10 x %class.QBezier.15]* %beziers to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %v0, i8* %v3, i64 64, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %v0, i8* %v3, i64 64, i32 8, i1 false)
call fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* byval align 8 %agg.tmp.i) call fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* align 8 byval(%class.QBezier.15) %agg.tmp.i)
%x2.i = getelementptr inbounds [10 x %class.QBezier.15], [10 x %class.QBezier.15]* %beziers, i64 0, i64 0, i32 2 %x2.i = getelementptr inbounds [10 x %class.QBezier.15], [10 x %class.QBezier.15]* %beziers, i64 0, i64 0, i32 2
%v4 = load double, double* %x2.i, align 16 %v4 = load double, double* %x2.i, align 16
%x3.i = getelementptr inbounds [10 x %class.QBezier.15], [10 x %class.QBezier.15]* %beziers, i64 0, i64 0, i32 4 %x3.i = getelementptr inbounds [10 x %class.QBezier.15], [10 x %class.QBezier.15]* %beziers, i64 0, i64 0, i32 4
%v5 = load double, double* %x3.i, align 16 %v5 = load double, double* %x3.i, align 16
%add.i = fadd double %v4, %v5 %add.i = fadd double %v4, %v5
%mul.i = fmul double 5.000000e-01, %add.i %mul.i = fmul double 5.000000e-01, %add.i
%x1.i = getelementptr inbounds [10 x %class.QBezier.15], [10 x %class.QBezier.15]* %beziers, i64 0, i64 0, i32 0 %x1.i = getelementptr inbounds [10 x %class.QBezier.15], [10 x %class.QBezier.15]* %beziers, i64 0, i64 0, i32 0
%v6 = load double, double* %x1.i, align 16 %v6 = load double, double* %x1.i, align 16
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Linesarrayctor.cont: ; preds = %newFuncRoot
%v21 = load double, double* %y344.i, align 8 %v21 = load double, double* %y344.i, align 8
%add51.i = fadd double %v21, %mul47.i %add51.i = fadd double %v21, %mul47.i
%mul52.i = fmul double 5.000000e-01, %add51.i %mul52.i = fmul double 5.000000e-01, %add51.i
store double %mul52.i, double* %y1.i, align 8 store double %mul52.i, double* %y1.i, align 8
%y454.i = getelementptr inbounds [10 x %class.QBezier.15], [10 x %class.QBezier.15]* %beziers, i64 0, i64 1, i32 7 %y454.i = getelementptr inbounds [10 x %class.QBezier.15], [10 x %class.QBezier.15]* %beziers, i64 0, i64 1, i32 7
store double %mul52.i, double* %y454.i, align 8 store double %mul52.i, double* %y454.i, align 8
%v22 = bitcast %class.QBezier.15* %add.ptr to i8* %v22 = bitcast %class.QBezier.15* %add.ptr to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %v1, i8* %v22, i64 64, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %v1, i8* %v22, i64 64, i32 8, i1 false)
call fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* byval align 8 %agg.tmp55.i) call fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* align 8 byval(%class.QBezier.15) %agg.tmp55.i)
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %v2, i8* %v3, i64 64, i32 8, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %v2, i8* %v3, i64 64, i32 8, i1 false)
call fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* byval align 8 %agg.tmp56.i) call fastcc void @_ZL12printQBezier7QBezier(%class.QBezier.15* align 8 byval(%class.QBezier.15) %agg.tmp56.i)
call void @llvm.lifetime.end(i64 64, i8* %v0) call void @llvm.lifetime.end(i64 64, i8* %v0)
call void @llvm.lifetime.end(i64 64, i8* %v1) call void @llvm.lifetime.end(i64 64, i8* %v1)
call void @llvm.lifetime.end(i64 64, i8* %v2) call void @llvm.lifetime.end(i64 64, i8* %v2)
br label %arrayctor.cont.ret.exitStub br label %arrayctor.cont.ret.exitStub
} }
attributes #0 = { nounwind } attributes #0 = { nounwind }
attributes #1 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

test/Transforms/DeadArgElim/2007-12-20-ParamAttrs.ll

; RUN: opt < %s -deadargelim -S | FileCheck %s ; RUN: opt < %s -deadargelim -S | FileCheck %s
%struct = type { } %struct = type { }
@g = global i8 0 @g = global i8 0
; CHECK: define internal void @foo(i8 signext %y) [[NUW:#[0-9]+]] ; CHECK: define internal void @foo(i8 signext %y) [[NUW:#[0-9]+]]
define internal zeroext i8 @foo(i8* inreg %p, i8 signext %y, ... ) nounwind { define internal zeroext i8 @foo(i8* inreg %p, i8 signext %y, ... ) nounwind {
store i8 %y, i8* @g store i8 %y, i8* @g
ret i8 0 ret i8 0
} }
define i32 @bar() { define i32 @bar() {
; CHECK: call void @foo(i8 signext 1) [[NUW]] ; CHECK: call void @foo(i8 signext 1) [[NUW]]
%A = call zeroext i8(i8*, i8, ...) @foo(i8* inreg null, i8 signext 1, %struct* byval null ) nounwind %A = call zeroext i8(i8*, i8, ...) @foo(i8* inreg null, i8 signext 1, %struct* byval(%struct) null ) nounwind
ret i32 0 ret i32 0
} }
; CHECK: attributes [[NUW]] = { nounwind } ; CHECK: attributes [[NUW]] = { nounwind }

test/Transforms/DeadArgElim/2008-01-16-VarargsParamAttrs.ll

Show All 17 Lines
declare void @llvm.va_start(i8*) nounwind declare void @llvm.va_start(i8*) nounwind
declare void @llvm.va_end(i8*) nounwind declare void @llvm.va_end(i8*) nounwind
define i32 @main() { define i32 @main() {
entry: entry:
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
%tmp = getelementptr [4 x %struct.point], [4 x %struct.point]* @pts, i32 0, i32 0 ; <%struct.point*> [#uses=1] %tmp = getelementptr [4 x %struct.point], [4 x %struct.point]* @pts, i32 0, i32 0 ; <%struct.point*> [#uses=1]
%tmp1 = call i32 (i32, ...) @va1( i32 1, %struct.point* byval %tmp ) nounwind ; <i32> [#uses=0] %tmp1 = call i32 (i32, ...) @va1( i32 1, %struct.point* byval(%struct.point) %tmp ) nounwind ; <i32> [#uses=0]
call void @exit( i32 0 ) noreturn nounwind call void @exit( i32 0 ) noreturn nounwind
unreachable unreachable
} }
declare void @exit(i32) noreturn nounwind declare void @exit(i32) noreturn nounwind

test/Transforms/DeadArgElim/variadic_safety.ll

Show All 11 Lines
; Function derived from AArch64 ABI, where 8 integer arguments go in ; Function derived from AArch64 ABI, where 8 integer arguments go in
; registers but the 9th goes on the stack. We really don't want to put ; registers but the 9th goes on the stack. We really don't want to put
; just 7 args in registers and then start on the stack since any ; just 7 args in registers and then start on the stack since any
; va_arg implementation already present in va_func won't be expecting ; va_arg implementation already present in va_func won't be expecting
; it. ; it.
define i32 @call_va(i32 %in) { define i32 @call_va(i32 %in) {
%stacked = alloca i32 %stacked = alloca i32
store i32 42, i32* %stacked store i32 42, i32* %stacked
%res = call i32(i32, i32, ...) @va_func(i32 %in, i32 %in, [6 x i32] undef, i32* byval %stacked) %res = call i32(i32, i32, ...) @va_func(i32 %in, i32 %in, [6 x i32] undef, i32* byval(i32) %stacked)
ret i32 %res ret i32 %res
; CHECK: call i32 (i32, i32, ...) @va_func(i32 undef, i32 %in, [6 x i32] undef, i32* byval %stacked) ; CHECK: call i32 (i32, i32, ...) @va_func(i32 undef, i32 %in, [6 x i32] undef, i32* byval(i32) %stacked)
} }
define internal i32 @va_deadret_func(i32 %a, i32 %b, ...) { define internal i32 @va_deadret_func(i32 %a, i32 %b, ...) {
%valist = alloca i8 %valist = alloca i8
call void @llvm.va_start(i8* %valist) call void @llvm.va_start(i8* %valist)
ret i32 %a ret i32 %a
} }
define void @call_deadret(i32 %in) { define void @call_deadret(i32 %in) {
%stacked = alloca i32 %stacked = alloca i32
store i32 42, i32* %stacked store i32 42, i32* %stacked
call i32 (i32, i32, ...) @va_deadret_func(i32 undef, i32 %in, [6 x i32] undef, i32* byval %stacked) call i32 (i32, i32, ...) @va_deadret_func(i32 undef, i32 %in, [6 x i32] undef, i32* byval(i32) %stacked)
ret void ret void
; CHECK: call void (i32, i32, ...) @va_deadret_func(i32 undef, i32 undef, [6 x i32] undef, i32* byval %stacked) ; CHECK: call void (i32, i32, ...) @va_deadret_func(i32 undef, i32 undef, [6 x i32] undef, i32* byval(i32) %stacked)
} }

test/Transforms/DeadStoreElimination/simple.ll

Show First 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @test8( ; CHECK-LABEL: @test8(
; CHECK: store i32 1234567 ; CHECK: store i32 1234567
} }
; Test for byval handling. ; Test for byval handling.
%struct.x = type { i32, i32, i32, i32 } %struct.x = type { i32, i32, i32, i32 }
define void @test9(%struct.x* byval %a) nounwind { define void @test9(%struct.x* byval(%struct.x) %a) nounwind {
%tmp2 = getelementptr %struct.x, %struct.x* %a, i32 0, i32 0 %tmp2 = getelementptr %struct.x, %struct.x* %a, i32 0, i32 0
store i32 1, i32* %tmp2, align 4 store i32 1, i32* %tmp2, align 4
ret void ret void
; CHECK-LABEL: @test9( ; CHECK-LABEL: @test9(
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
} }
; Test for inalloca handling. ; Test for inalloca handling.
▲ Show 20 Lines • Show All 149 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @test18( ; CHECK-LABEL: @test18(
; CHECK-NEXT: call void @llvm.memcpy ; CHECK-NEXT: call void @llvm.memcpy
; CHECK-NEXT: call void @llvm.memcpy ; CHECK-NEXT: call void @llvm.memcpy
; CHECK-NEXT: ret ; CHECK-NEXT: ret
} }
; The store here is not dead because the byval call reads it. ; The store here is not dead because the byval call reads it.
declare void @test19f({i32}* byval align 4 %P) declare void @test19f({i32}* align 4 byval({i32}) %P)
define void @test19({i32} * nocapture byval align 4 %arg5) nounwind ssp { define void @test19({i32} * nocapture align 4 byval({i32}) %arg5) nounwind ssp {
bb: bb:
%tmp7 = getelementptr inbounds {i32}, {i32}* %arg5, i32 0, i32 0 %tmp7 = getelementptr inbounds {i32}, {i32}* %arg5, i32 0, i32 0
store i32 912, i32* %tmp7 store i32 912, i32* %tmp7
call void @test19f({i32}* byval align 4 %arg5) call void @test19f({i32}* align 4 byval({i32}) %arg5)
ret void ret void
; CHECK-LABEL: @test19( ; CHECK-LABEL: @test19(
; CHECK: store i32 912 ; CHECK: store i32 912
; CHECK: call void @test19f ; CHECK: call void @test19f
} }
define void @test20() { define void @test20() {
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test/Transforms/GVN/pr17852.ll

; RUN: opt < %s -basicaa -gvn ; RUN: opt < %s -basicaa -gvn
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
%struct.S0 = type { [2 x i8], [2 x i8], [4 x i8], [2 x i8], i32, i32, i32, i32 } %struct.S0 = type { [2 x i8], [2 x i8], [4 x i8], [2 x i8], i32, i32, i32, i32 }
define void @fn1(%struct.S0* byval align 8 %p1) { define void @fn1(%struct.S0* align 8 byval(%struct.S0) %p1) {
br label %for.cond br label %for.cond
for.cond: ; preds = %1, %0 for.cond: ; preds = %1, %0
br label %for.end br label %for.end
%f2 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 2 %f2 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 2
%f9 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 7 %f9 = getelementptr inbounds %struct.S0, %struct.S0* %p1, i64 0, i32 7
br label %for.cond br label %for.cond
for.end: ; preds = %for.cond for.end: ; preds = %for.cond
br i1 true, label %if.else, label %if.then br i1 true, label %if.else, label %if.then
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test/Transforms/IPConstantProp/2009-09-24-byval-ptr.ll

; RUN: opt < %s -ipsccp -S | FileCheck %s ; RUN: opt < %s -ipsccp -S | FileCheck %s
; Don't constant-propagate byval pointers, since they are not pointers! ; Don't constant-propagate byval pointers, since they are not pointers!
; PR5038 ; PR5038
%struct.MYstr = type { i8, i32 } %struct.MYstr = type { i8, i32 }
@mystr = internal global %struct.MYstr zeroinitializer ; <%struct.MYstr*> [#uses=3] @mystr = internal global %struct.MYstr zeroinitializer ; <%struct.MYstr*> [#uses=3]
define internal void @vfu1(%struct.MYstr* byval align 4 %u) nounwind { define internal void @vfu1(%struct.MYstr* align 4 byval(%struct.MYstr) %u) nounwind {
entry: entry:
%0 = getelementptr %struct.MYstr, %struct.MYstr* %u, i32 0, i32 1 ; <i32*> [#uses=1] %0 = getelementptr %struct.MYstr, %struct.MYstr* %u, i32 0, i32 1 ; <i32*> [#uses=1]
store i32 99, i32* %0, align 4 store i32 99, i32* %0, align 4
; CHECK: %struct.MYstr* %u ; CHECK: %struct.MYstr* %u
%1 = getelementptr %struct.MYstr, %struct.MYstr* %u, i32 0, i32 0 ; <i8*> [#uses=1] %1 = getelementptr %struct.MYstr, %struct.MYstr* %u, i32 0, i32 0 ; <i8*> [#uses=1]
store i8 97, i8* %1, align 4 store i8 97, i8* %1, align 4
; CHECK: %struct.MYstr* %u ; CHECK: %struct.MYstr* %u
br label %return br label %return
return: ; preds = %entry return: ; preds = %entry
ret void ret void
} }
define internal i32 @vfu2(%struct.MYstr* byval align 4 %u) nounwind readonly { define internal i32 @vfu2(%struct.MYstr* align 4 byval(%struct.MYstr) %u) nounwind readonly {
entry: entry:
%0 = getelementptr %struct.MYstr, %struct.MYstr* %u, i32 0, i32 1 ; <i32*> [#uses=1] %0 = getelementptr %struct.MYstr, %struct.MYstr* %u, i32 0, i32 1 ; <i32*> [#uses=1]
%1 = load i32, i32* %0 %1 = load i32, i32* %0
; CHECK: load i32, i32* getelementptr inbounds (%struct.MYstr, %struct.MYstr* @mystr, i32 0, i32 1) ; CHECK: load i32, i32* getelementptr inbounds (%struct.MYstr, %struct.MYstr* @mystr, i32 0, i32 1)
%2 = getelementptr %struct.MYstr, %struct.MYstr* %u, i32 0, i32 0 ; <i8*> [#uses=1] %2 = getelementptr %struct.MYstr, %struct.MYstr* %u, i32 0, i32 0 ; <i8*> [#uses=1]
%3 = load i8, i8* %2 %3 = load i8, i8* %2
; CHECK: load i8, i8* getelementptr inbounds (%struct.MYstr, %struct.MYstr* @mystr, i32 0, i32 0) ; CHECK: load i8, i8* getelementptr inbounds (%struct.MYstr, %struct.MYstr* @mystr, i32 0, i32 0)
%4 = zext i8 %3 to i32 %4 = zext i8 %3 to i32
%5 = add i32 %4, %1 %5 = add i32 %4, %1
ret i32 %5 ret i32 %5
} }
define i32 @unions() nounwind { define i32 @unions() nounwind {
entry: entry:
call void @vfu1(%struct.MYstr* byval align 4 @mystr) nounwind call void @vfu1(%struct.MYstr* align 4 byval(%struct.MYstr) @mystr) nounwind
%result = call i32 @vfu2(%struct.MYstr* byval align 4 @mystr) nounwind %result = call i32 @vfu2(%struct.MYstr* align 4 byval(%struct.MYstr) @mystr) nounwind
ret i32 %result ret i32 %result
} }

test/Transforms/IndVarSimplify/loop_evaluate9.ll

Show First 20 Lines • Show All 66 Lines • ▼ Show 20 Linesbb1: ; preds = %cc70a02__complex_multiplication.170.exit
ret void ret void
return: ; preds = %cc70a02__complex_multiplication.170.exit return: ; preds = %cc70a02__complex_multiplication.170.exit
ret void ret void
} }
declare fastcc void @cc70a02__complex_integers__complex.164(%struct.cc70a02__complex_integers__complex_type* noalias nocapture sret, i8 signext, i8 signext) nounwind declare fastcc void @cc70a02__complex_integers__complex.164(%struct.cc70a02__complex_integers__complex_type* noalias nocapture sret, i8 signext, i8 signext) nounwind
declare fastcc void @cc70a02__complex_integers__Osubtract.149(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4) declare fastcc void @cc70a02__complex_integers__Osubtract.149(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* align 4 byval(%struct.cc70a02__complex_integers__complex_type))
declare fastcc void @cc70a02__complex_integers__Oadd.153(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4, %struct.cc70a02__complex_integers__complex_type* byval align 4) declare fastcc void @cc70a02__complex_integers__Oadd.153(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* align 4 byval(%struct.cc70a02__complex_integers__complex_type), %struct.cc70a02__complex_integers__complex_type* align 4 byval(%struct.cc70a02__complex_integers__complex_type))
declare fastcc void @cc70a02__complex_multiplication.170(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* byval align 4) declare fastcc void @cc70a02__complex_multiplication.170(%struct.cc70a02__complex_integers__complex_type* noalias sret, %struct.cc70a02__complex_integers__complex_type* align 4 byval(%struct.cc70a02__complex_integers__complex_type))
declare void @__gnat_rcheck_12(i8*, i32) noreturn declare void @__gnat_rcheck_12(i8*, i32) noreturn
declare void @exit(i32) declare void @exit(i32)

test/Transforms/Inline/alloca-merge-align.ll

; RUN: opt < %s -inline -S | FileCheck %s ; RUN: opt < %s -inline -S | FileCheck %s
target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
target triple = "powerpc64-unknown-linux-gnu" target triple = "powerpc64-unknown-linux-gnu"
%struct.s = type { i32, i32 } %struct.s = type { i32, i32 }
define void @foo(%struct.s* byval nocapture readonly %a) { define void @foo(%struct.s* nocapture readonly byval(%struct.s) %a) {
entry: entry:
%x = alloca [2 x i32], align 4 %x = alloca [2 x i32], align 4
%a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0
%0 = load i32, i32* %a1, align 4 %0 = load i32, i32* %a1, align 4
%arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0 %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0
store i32 %0, i32* %arrayidx, align 4 store i32 %0, i32* %arrayidx, align 4
%b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1
%1 = load i32, i32* %b, align 4 %1 = load i32, i32* %b, align 4
%arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 1 %arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 1
store i32 %1, i32* %arrayidx2, align 4 store i32 %1, i32* %arrayidx2, align 4
call void @bar(i32* %arrayidx) #2 call void @bar(i32* %arrayidx) #2
ret void ret void
} }
define void @foo0(%struct.s* byval nocapture readonly %a) { define void @foo0(%struct.s* nocapture readonly byval(%struct.s) %a) {
entry: entry:
%x = alloca [2 x i32] %x = alloca [2 x i32]
%a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0
%0 = load i32, i32* %a1, align 4 %0 = load i32, i32* %a1, align 4
%arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0 %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0
store i32 %0, i32* %arrayidx, align 4 store i32 %0, i32* %arrayidx, align 4
%b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1
%1 = load i32, i32* %b, align 4 %1 = load i32, i32* %b, align 4
%arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 1 %arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 1
store i32 %1, i32* %arrayidx2, align 4 store i32 %1, i32* %arrayidx2, align 4
call void @bar(i32* %arrayidx) #2 call void @bar(i32* %arrayidx) #2
ret void ret void
} }
define void @foo1(%struct.s* byval nocapture readonly %a) { define void @foo1(%struct.s* nocapture readonly byval(%struct.s) %a) {
entry: entry:
%x = alloca [2 x i32], align 1 %x = alloca [2 x i32], align 1
%a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0
%0 = load i32, i32* %a1, align 4 %0 = load i32, i32* %a1, align 4
%arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0 %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0
store i32 %0, i32* %arrayidx, align 4 store i32 %0, i32* %arrayidx, align 4
%b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1
%1 = load i32, i32* %b, align 4 %1 = load i32, i32* %b, align 4
%arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 1 %arrayidx2 = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 1
store i32 %1, i32* %arrayidx2, align 4 store i32 %1, i32* %arrayidx2, align 4
call void @bar(i32* %arrayidx) #2 call void @bar(i32* %arrayidx) #2
ret void ret void
} }
declare void @bar(i32*) #1 declare void @bar(i32*) #1
define void @goo(%struct.s* byval nocapture readonly %a) { define void @goo(%struct.s* nocapture readonly byval(%struct.s) %a) {
entry: entry:
%x = alloca [2 x i32], align 32 %x = alloca [2 x i32], align 32
%a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0 %a1 = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 0
%0 = load i32, i32* %a1, align 4 %0 = load i32, i32* %a1, align 4
%arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0 %arrayidx = getelementptr inbounds [2 x i32], [2 x i32]* %x, i64 0, i64 0
store i32 %0, i32* %arrayidx, align 32 store i32 %0, i32* %arrayidx, align 32
%b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1 %b = getelementptr inbounds %struct.s, %struct.s* %a, i64 0, i32 1
%1 = load i32, i32* %b, align 4 %1 = load i32, i32* %b, align 4
Show All 10 Lines
define signext i32 @main() { define signext i32 @main() {
entry: entry:
%a = alloca i64, align 8 %a = alloca i64, align 8
%tmpcast = bitcast i64* %a to %struct.s* %tmpcast = bitcast i64* %a to %struct.s*
store i64 0, i64* %a, align 8 store i64 0, i64* %a, align 8
%a1 = bitcast i64* %a to i32* %a1 = bitcast i64* %a to i32*
store i32 1, i32* %a1, align 8 store i32 1, i32* %a1, align 8
call void @foo(%struct.s* byval %tmpcast) call void @foo(%struct.s* byval(%struct.s) %tmpcast)
store i32 2, i32* %a1, align 8 store i32 2, i32* %a1, align 8
call void @goo(%struct.s* byval %tmpcast) call void @goo(%struct.s* byval(%struct.s) %tmpcast)
ret i32 0 ret i32 0
} }
; CHECK-LABEL: @test0 ; CHECK-LABEL: @test0
; CHECK: alloca [2 x i32], align 32 ; CHECK: alloca [2 x i32], align 32
; CHECK-NOT: alloca [2 x i32] ; CHECK-NOT: alloca [2 x i32]
; CHECK: ret i32 0 ; CHECK: ret i32 0
define signext i32 @test0() { define signext i32 @test0() {
entry: entry:
%a = alloca i64, align 8 %a = alloca i64, align 8
%tmpcast = bitcast i64* %a to %struct.s* %tmpcast = bitcast i64* %a to %struct.s*
store i64 0, i64* %a, align 8 store i64 0, i64* %a, align 8
%a1 = bitcast i64* %a to i32* %a1 = bitcast i64* %a to i32*
store i32 1, i32* %a1, align 8 store i32 1, i32* %a1, align 8
call void @foo0(%struct.s* byval %tmpcast) call void @foo0(%struct.s* byval(%struct.s) %tmpcast)
store i32 2, i32* %a1, align 8 store i32 2, i32* %a1, align 8
call void @goo(%struct.s* byval %tmpcast) call void @goo(%struct.s* byval(%struct.s) %tmpcast)
ret i32 0 ret i32 0
} }

test/Transforms/Inline/byval-tail-call.ll

; RUN: opt < %s -basicaa -tailcallelim -inline -instcombine -dse -S | FileCheck %s ; RUN: opt < %s -basicaa -tailcallelim -inline -instcombine -dse -S | FileCheck %s
; PR7272 ; PR7272
; Calls that capture byval parameters cannot be marked as tail calls. Other ; Calls that capture byval parameters cannot be marked as tail calls. Other
; tails that don't capture byval parameters can still be tail calls. ; tails that don't capture byval parameters can still be tail calls.
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-pc-linux-gnu" target triple = "i386-pc-linux-gnu"
declare void @ext(i32*) declare void @ext(i32*)
define void @bar(i32* byval %x) { define void @bar(i32* byval(i32) %x) {
call void @ext(i32* %x) call void @ext(i32* %x)
ret void ret void
} }
define void @foo(i32* %x) { define void @foo(i32* %x) {
; CHECK-LABEL: define void @foo( ; CHECK-LABEL: define void @foo(
; CHECK: llvm.lifetime.start ; CHECK: llvm.lifetime.start
; CHECK: store i32 %2, i32* %x ; CHECK: store i32 %2, i32* %x
call void @bar(i32* byval %x) call void @bar(i32* byval(i32) %x)
ret void ret void
} }
define internal void @qux(i32* byval %x) { define internal void @qux(i32* byval(i32) %x) {
call void @ext(i32* %x) call void @ext(i32* %x)
tail call void @ext(i32* null) tail call void @ext(i32* null)
ret void ret void
} }
define void @frob(i32* %x) { define void @frob(i32* %x) {
; CHECK-LABEL: define void @frob( ; CHECK-LABEL: define void @frob(
; CHECK: %[[POS:.*]] = alloca i32 ; CHECK: %[[POS:.*]] = alloca i32
; CHECK: %[[VAL:.*]] = load i32, i32* %x ; CHECK: %[[VAL:.*]] = load i32, i32* %x
; CHECK: store i32 %[[VAL]], i32* %[[POS]] ; CHECK: store i32 %[[VAL]], i32* %[[POS]]
; CHECK: {{^ *}}call void @ext(i32* nonnull %[[POS]] ; CHECK: {{^ *}}call void @ext(i32* nonnull %[[POS]]
; CHECK: tail call void @ext(i32* null) ; CHECK: tail call void @ext(i32* null)
; CHECK: ret void ; CHECK: ret void
tail call void @qux(i32* byval %x) tail call void @qux(i32* byval(i32) %x)
ret void ret void
} }

test/Transforms/Inline/byval.ll

; RUN: opt < %s -inline -S | FileCheck %s ; RUN: opt < %s -inline -S | FileCheck %s
; Inlining a byval struct should cause an explicit copy into an alloca. ; Inlining a byval struct should cause an explicit copy into an alloca.
%struct.ss = type { i32, i64 } %struct.ss = type { i32, i64 }
@.str = internal constant [10 x i8] c"%d, %lld\0A\00" ; <[10 x i8]*> [#uses=1] @.str = internal constant [10 x i8] c"%d, %lld\0A\00" ; <[10 x i8]*> [#uses=1]
define internal void @f(%struct.ss* byval %b) nounwind { define internal void @f(%struct.ss* byval(%struct.ss) %b) nounwind {
entry: entry:
%tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2] %tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2]
%tmp1 = load i32, i32* %tmp, align 4 ; <i32> [#uses=1] %tmp1 = load i32, i32* %tmp, align 4 ; <i32> [#uses=1]
%tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1] %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1]
store i32 %tmp2, i32* %tmp, align 4 store i32 %tmp2, i32* %tmp, align 4
ret void ret void
} }
declare i32 @printf(i8*, ...) nounwind declare i32 @printf(i8*, ...) nounwind
define i32 @test1() nounwind { define i32 @test1() nounwind {
entry: entry:
%S = alloca %struct.ss ; <%struct.ss*> [#uses=4] %S = alloca %struct.ss ; <%struct.ss*> [#uses=4]
%tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] %tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1]
store i32 1, i32* %tmp1, align 8 store i32 1, i32* %tmp1, align 8
%tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1] %tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
store i64 2, i64* %tmp4, align 4 store i64 2, i64* %tmp4, align 4
call void @f( %struct.ss* byval %S ) nounwind call void @f( %struct.ss* byval(%struct.ss) %S ) nounwind
ret i32 0 ret i32 0
; CHECK: @test1() ; CHECK: @test1()
; CHECK: %S1 = alloca %struct.ss ; CHECK: %S1 = alloca %struct.ss
; CHECK: %S = alloca %struct.ss ; CHECK: %S = alloca %struct.ss
; CHECK: call void @llvm.memcpy ; CHECK: call void @llvm.memcpy
; CHECK: ret i32 0 ; CHECK: ret i32 0
} }
; Inlining a byval struct should NOT cause an explicit copy ; Inlining a byval struct should NOT cause an explicit copy
; into an alloca if the function is readonly ; into an alloca if the function is readonly
define internal i32 @f2(%struct.ss* byval %b) nounwind readonly { define internal i32 @f2(%struct.ss* byval(%struct.ss) %b) nounwind readonly {
entry: entry:
%tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2] %tmp = getelementptr %struct.ss, %struct.ss* %b, i32 0, i32 0 ; <i32*> [#uses=2]
%tmp1 = load i32, i32* %tmp, align 4 ; <i32> [#uses=1] %tmp1 = load i32, i32* %tmp, align 4 ; <i32> [#uses=1]
%tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1] %tmp2 = add i32 %tmp1, 1 ; <i32> [#uses=1]
ret i32 %tmp2 ret i32 %tmp2
} }
define i32 @test2() nounwind { define i32 @test2() nounwind {
entry: entry:
%S = alloca %struct.ss ; <%struct.ss*> [#uses=4] %S = alloca %struct.ss ; <%struct.ss*> [#uses=4]
%tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1] %tmp1 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 0 ; <i32*> [#uses=1]
store i32 1, i32* %tmp1, align 8 store i32 1, i32* %tmp1, align 8
%tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1] %tmp4 = getelementptr %struct.ss, %struct.ss* %S, i32 0, i32 1 ; <i64*> [#uses=1]
store i64 2, i64* %tmp4, align 4 store i64 2, i64* %tmp4, align 4
%X = call i32 @f2( %struct.ss* byval %S ) nounwind %X = call i32 @f2( %struct.ss* byval(%struct.ss) %S ) nounwind
ret i32 %X ret i32 %X
; CHECK: @test2() ; CHECK: @test2()
; CHECK: %S = alloca %struct.ss ; CHECK: %S = alloca %struct.ss
; CHECK-NOT: call void @llvm.memcpy ; CHECK-NOT: call void @llvm.memcpy
; CHECK: ret i32 ; CHECK: ret i32
} }
; Inlining a byval with an explicit alignment needs to use *at least* that ; Inlining a byval with an explicit alignment needs to use *at least* that
; alignment on the generated alloca. ; alignment on the generated alloca.
; PR8769 ; PR8769
declare void @g3(%struct.ss* %p) declare void @g3(%struct.ss* %p)
define internal void @f3(%struct.ss* byval align 64 %b) nounwind { define internal void @f3(%struct.ss* align 64 byval(%struct.ss) %b) nounwind {
call void @g3(%struct.ss* %b) ;; Could make alignment assumptions! call void @g3(%struct.ss* %b) ;; Could make alignment assumptions!
ret void ret void
} }
define void @test3() nounwind { define void @test3() nounwind {
entry: entry:
%S = alloca %struct.ss, align 1 ;; May not be aligned. %S = alloca %struct.ss, align 1 ;; May not be aligned.
call void @f3( %struct.ss* byval align 64 %S) nounwind call void @f3( %struct.ss* align 64 byval(%struct.ss) %S) nounwind
ret void ret void
; CHECK: @test3() ; CHECK: @test3()
; CHECK: %S1 = alloca %struct.ss, align 64 ; CHECK: %S1 = alloca %struct.ss, align 64
; CHECK: %S = alloca %struct.ss ; CHECK: %S = alloca %struct.ss
; CHECK: call void @llvm.memcpy ; CHECK: call void @llvm.memcpy
; CHECK: call void @g3(%struct.ss* %S1) ; CHECK: call void @g3(%struct.ss* %S1)
; CHECK: ret void ; CHECK: ret void
} }
; Inlining a byval struct should NOT cause an explicit copy ; Inlining a byval struct should NOT cause an explicit copy
; into an alloca if the function is readonly, but should increase an alloca's ; into an alloca if the function is readonly, but should increase an alloca's
; alignment to satisfy an explicit alignment request. ; alignment to satisfy an explicit alignment request.
define internal i32 @f4(%struct.ss* byval align 64 %b) nounwind readonly { define internal i32 @f4(%struct.ss* align 64 byval(%struct.ss) %b) nounwind readonly {
call void @g3(%struct.ss* %b) call void @g3(%struct.ss* %b)
ret i32 4 ret i32 4
} }
define i32 @test4() nounwind { define i32 @test4() nounwind {
entry: entry:
%S = alloca %struct.ss, align 2 ; <%struct.ss*> [#uses=4] %S = alloca %struct.ss, align 2 ; <%struct.ss*> [#uses=4]
%X = call i32 @f4( %struct.ss* byval align 64 %S ) nounwind %X = call i32 @f4( %struct.ss* align 64 byval(%struct.ss) %S ) nounwind
ret i32 %X ret i32 %X
; CHECK: @test4() ; CHECK: @test4()
; CHECK: %S = alloca %struct.ss, align 64 ; CHECK: %S = alloca %struct.ss, align 64
; CHECK-NOT: call void @llvm.memcpy ; CHECK-NOT: call void @llvm.memcpy
; CHECK: call void @g3 ; CHECK: call void @g3
; CHECK: ret i32 4 ; CHECK: ret i32 4
} }
%struct.S0 = type { i32 } %struct.S0 = type { i32 }
@b = global %struct.S0 { i32 1 }, align 4 @b = global %struct.S0 { i32 1 }, align 4
@a = common global i32 0, align 4 @a = common global i32 0, align 4
define internal void @f5(%struct.S0* byval nocapture readonly align 4 %p) { define internal void @f5(%struct.S0* nocapture readonly align 4 byval(%struct.S0) %p) {
entry: entry:
store i32 0, i32* getelementptr inbounds (%struct.S0, %struct.S0* @b, i64 0, i32 0), align 4 store i32 0, i32* getelementptr inbounds (%struct.S0, %struct.S0* @b, i64 0, i32 0), align 4
%f2 = getelementptr inbounds %struct.S0, %struct.S0* %p, i64 0, i32 0 %f2 = getelementptr inbounds %struct.S0, %struct.S0* %p, i64 0, i32 0
%0 = load i32, i32* %f2, align 4 %0 = load i32, i32* %f2, align 4
store i32 %0, i32* @a, align 4 store i32 %0, i32* @a, align 4
ret void ret void
} }
define i32 @test5() { define i32 @test5() {
entry: entry:
tail call void @f5(%struct.S0* byval align 4 @b) tail call void @f5(%struct.S0* align 4 byval(%struct.S0) @b)
%0 = load i32, i32* @a, align 4 %0 = load i32, i32* @a, align 4
ret i32 %0 ret i32 %0
; CHECK: @test5() ; CHECK: @test5()
; CHECK: store i32 0, i32* getelementptr inbounds (%struct.S0, %struct.S0* @b, i64 0, i32 0), align 4 ; CHECK: store i32 0, i32* getelementptr inbounds (%struct.S0, %struct.S0* @b, i64 0, i32 0), align 4
; CHECK-NOT: load i32, i32* getelementptr inbounds (%struct.S0, %struct.S0* @b, i64 0, i32 0), align 4 ; CHECK-NOT: load i32, i32* getelementptr inbounds (%struct.S0, %struct.S0* @b, i64 0, i32 0), align 4
} }

test/Transforms/Inline/byval_lifetime.ll

; RUN: opt -S -inline < %s | FileCheck %s ; RUN: opt -S -inline < %s | FileCheck %s
; END. ; END.
; By inlining foo, an alloca is created in main to hold the byval argument, so ; By inlining foo, an alloca is created in main to hold the byval argument, so
; a lifetime marker should be generated as well by default. ; a lifetime marker should be generated as well by default.
%struct.foo = type { i32, [16 x i32] } %struct.foo = type { i32, [16 x i32] }
@gFoo = global %struct.foo zeroinitializer, align 8 @gFoo = global %struct.foo zeroinitializer, align 8
define i32 @foo(%struct.foo* byval align 8 %f, i32 %a) { define i32 @foo(%struct.foo* align 8 byval(%struct.foo) %f, i32 %a) {
entry: entry:
%a1 = getelementptr inbounds %struct.foo, %struct.foo* %f, i32 0, i32 1 %a1 = getelementptr inbounds %struct.foo, %struct.foo* %f, i32 0, i32 1
%arrayidx = getelementptr inbounds [16 x i32], [16 x i32]* %a1, i32 0, i32 %a %arrayidx = getelementptr inbounds [16 x i32], [16 x i32]* %a1, i32 0, i32 %a
%tmp2 = load i32, i32* %arrayidx, align 1 %tmp2 = load i32, i32* %arrayidx, align 1
ret i32 %tmp2 ret i32 %tmp2
} }
define i32 @main(i32 %argc, i8** %argv) { define i32 @main(i32 %argc, i8** %argv) {
; CHECK-LABEL: @main ; CHECK-LABEL: @main
; CHECK: llvm.lifetime.start ; CHECK: llvm.lifetime.start
; CHECK: memcpy ; CHECK: memcpy
entry: entry:
%call = call i32 @foo(%struct.foo* byval align 8 @gFoo, i32 %argc) %call = call i32 @foo(%struct.foo* align 8 byval(%struct.foo) @gFoo, i32 %argc)
ret i32 %call ret i32 %call
} }

test/Transforms/Inline/inline-byval-bonus.ll

Show All 12 Lines
%struct.material = type { %struct.vec3, double, double } %struct.material = type { %struct.vec3, double, double }
%struct.ray = type { %struct.vec3, %struct.vec3 } %struct.ray = type { %struct.vec3, %struct.vec3 }
%struct.spoint = type { %struct.vec3, %struct.vec3, %struct.vec3, double } %struct.spoint = type { %struct.vec3, %struct.vec3, %struct.vec3, double }
define i32 @caller(%struct.sphere* %i) { define i32 @caller(%struct.sphere* %i) {
%shadow_ray = alloca %struct.ray, align 8 %shadow_ray = alloca %struct.ray, align 8
call void @fix(%struct.ray* %shadow_ray) call void @fix(%struct.ray* %shadow_ray)
%call = call i32 @ray_sphere(%struct.sphere* %i, %struct.ray* byval align 8 %shadow_ray, %struct.spoint* null) %call = call i32 @ray_sphere(%struct.sphere* %i, %struct.ray* align 8 byval(%struct.ray) %shadow_ray, %struct.spoint* null)
ret i32 %call ret i32 %call
; CHECK-LABEL: @caller( ; CHECK-LABEL: @caller(
; CHECK-NOT: call i32 @ray_sphere ; CHECK-NOT: call i32 @ray_sphere
; CHECK: ret i32 ; CHECK: ret i32
} }
declare void @fix(%struct.ray*) declare void @fix(%struct.ray*)
define i32 @ray_sphere(%struct.sphere* nocapture %sph, %struct.ray* nocapture byval align 8 %ray, %struct.spoint* %sp) nounwind uwtable ssp { define i32 @ray_sphere(%struct.sphere* nocapture %sph, %struct.ray* nocapture align 8 byval(%struct.ray) %ray, %struct.spoint* %sp) nounwind uwtable ssp {
%1 = getelementptr inbounds %struct.ray, %struct.ray* %ray, i64 0, i32 1, i32 0 %1 = getelementptr inbounds %struct.ray, %struct.ray* %ray, i64 0, i32 1, i32 0
%2 = load double, double* %1, align 8 %2 = load double, double* %1, align 8
%3 = fmul double %2, %2 %3 = fmul double %2, %2
%4 = getelementptr inbounds %struct.ray, %struct.ray* %ray, i64 0, i32 1, i32 1 %4 = getelementptr inbounds %struct.ray, %struct.ray* %ray, i64 0, i32 1, i32 1
%5 = load double, double* %4, align 8 %5 = load double, double* %4, align 8
%6 = fmul double %5, %5 %6 = fmul double %5, %5
%7 = fadd double %3, %6 %7 = fadd double %3, %6
%8 = getelementptr inbounds %struct.ray, %struct.ray* %ray, i64 0, i32 1, i32 2 %8 = getelementptr inbounds %struct.ray, %struct.ray* %ray, i64 0, i32 1, i32 2
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test/Transforms/Inline/inline-tail.ll

Show First 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
} }
; Don't insert lifetime end markers here, the lifetime is trivially over due ; Don't insert lifetime end markers here, the lifetime is trivially over due
; the return. ; the return.
; CHECK: define void @test_byval_a( ; CHECK: define void @test_byval_a(
; CHECK: musttail call void @test_byval_c( ; CHECK: musttail call void @test_byval_c(
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
declare void @test_byval_c(i32* byval %p) declare void @test_byval_c(i32* byval(i32) %p)
define internal void @test_byval_b(i32* byval %p) { define internal void @test_byval_b(i32* byval(i32) %p) {
musttail call void @test_byval_c(i32* byval %p) musttail call void @test_byval_c(i32* byval(i32) %p)
ret void ret void
} }
define void @test_byval_a(i32* byval %p) { define void @test_byval_a(i32* byval(i32) %p) {
musttail call void @test_byval_b(i32* byval %p) musttail call void @test_byval_b(i32* byval(i32) %p)
ret void ret void
} }
; Don't insert a stack restore, we're about to return. ; Don't insert a stack restore, we're about to return.
; CHECK: define void @test_dynalloca_a( ; CHECK: define void @test_dynalloca_a(
; CHECK: call i8* @llvm.stacksave( ; CHECK: call i8* @llvm.stacksave(
; CHECK: alloca i8, i32 %n ; CHECK: alloca i8, i32 %n
; CHECK: musttail call void @test_dynalloca_c( ; CHECK: musttail call void @test_dynalloca_c(
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
declare void @escape(i8* %buf) declare void @escape(i8* %buf)
declare void @test_dynalloca_c(i32* byval %p, i32 %n) declare void @test_dynalloca_c(i32* byval(i32) %p, i32 %n)
define internal void @test_dynalloca_b(i32* byval %p, i32 %n) alwaysinline { define internal void @test_dynalloca_b(i32* byval(i32) %p, i32 %n) alwaysinline {
%buf = alloca i8, i32 %n ; dynamic alloca %buf = alloca i8, i32 %n ; dynamic alloca
call void @escape(i8* %buf) ; escape it call void @escape(i8* %buf) ; escape it
musttail call void @test_dynalloca_c(i32* byval %p, i32 %n) musttail call void @test_dynalloca_c(i32* byval(i32) %p, i32 %n)
ret void ret void
} }
define void @test_dynalloca_a(i32* byval %p, i32 %n) { define void @test_dynalloca_a(i32* byval(i32) %p, i32 %n) {
musttail call void @test_dynalloca_b(i32* byval %p, i32 %n) musttail call void @test_dynalloca_b(i32* byval(i32) %p, i32 %n)
ret void ret void
} }
; We can't merge the returns. ; We can't merge the returns.
; CHECK: define void @test_multiret_a( ; CHECK: define void @test_multiret_a(
; CHECK: musttail call void @test_multiret_c( ; CHECK: musttail call void @test_multiret_c(
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; CHECK: musttail call void @test_multiret_d( ; CHECK: musttail call void @test_multiret_d(
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test/Transforms/InstCombine/2008-04-22-ByValBitcast.ll

;; The bitcast cannot be eliminated because byval arguments need ;; The bitcast cannot be eliminated because byval arguments need
;; the correct type, or at least a type of the correct size. ;; the correct type, or at least a type of the correct size.
; RUN: opt < %s -instcombine -S | grep bitcast ; RUN: opt < %s -instcombine -S | grep bitcast
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9" target triple = "i386-apple-darwin9"
%struct.NSRect = type { [4 x float] } %struct.NSRect = type { [4 x float] }
define void @foo(i8* %context) nounwind { define void @foo(i8* %context) nounwind {
entry: entry:
%tmp1 = bitcast i8* %context to %struct.NSRect* ; <%struct.NSRect*> [#uses=1] %tmp1 = bitcast i8* %context to %struct.NSRect* ; <%struct.NSRect*> [#uses=1]
call void (i32, ...) @bar( i32 3, %struct.NSRect* byval align 4 %tmp1 ) nounwind call void (i32, ...) @bar( i32 3, %struct.NSRect* align 4 byval(%struct.NSRect) %tmp1 ) nounwind
ret void ret void
} }
declare void @bar(i32, ...) declare void @bar(i32, ...)

test/Transforms/InstCombine/2009-01-08-AlignAlloca.ll

Show All 14 Linesentry:
%0 = getelementptr %struct.Key, %struct.Key* %iospec, i32 0, i32 0 ; <{ i32, i32 }*> [#uses=2] %0 = getelementptr %struct.Key, %struct.Key* %iospec, i32 0, i32 0 ; <{ i32, i32 }*> [#uses=2]
%1 = getelementptr { i32, i32 }, { i32, i32 }* %0, i32 0, i32 0 ; <i32*> [#uses=1] %1 = getelementptr { i32, i32 }, { i32, i32 }* %0, i32 0, i32 0 ; <i32*> [#uses=1]
store i32 0, i32* %1, align 4 store i32 0, i32* %1, align 4
%2 = getelementptr { i32, i32 }, { i32, i32 }* %0, i32 0, i32 1 ; <i32*> [#uses=1] %2 = getelementptr { i32, i32 }, { i32, i32 }* %0, i32 0, i32 1 ; <i32*> [#uses=1]
store i32 0, i32* %2, align 4 store i32 0, i32* %2, align 4
%3 = getelementptr %struct.Key, %struct.Key* %iospec, i32 0, i32 0 ; <{ i32, i32 }*> [#uses=1] %3 = getelementptr %struct.Key, %struct.Key* %iospec, i32 0, i32 0 ; <{ i32, i32 }*> [#uses=1]
%4 = bitcast { i32, i32 }* %3 to i64* ; <i64*> [#uses=1] %4 = bitcast { i32, i32 }* %3 to i64* ; <i64*> [#uses=1]
store i64 %key_token2, i64* %4, align 4 store i64 %key_token2, i64* %4, align 4
%5 = call i32 (...) @foo(%struct.Key* byval align 4 %iospec, i32* %ret) nounwind ; <i32> [#uses=0] %5 = call i32 (...) @foo(%struct.Key* align 4 byval(%struct.Key) %iospec, i32* %ret) nounwind ; <i32> [#uses=0]
%6 = load i32, i32* %ret, align 4 ; <i32> [#uses=1] %6 = load i32, i32* %ret, align 4 ; <i32> [#uses=1]
ret i32 %6 ret i32 %6
} }
declare i32 @foo(...) declare i32 @foo(...)

test/Transforms/InstCombine/call-cast-target.ll

Show First 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; CHECK-LABEL: @test4 ; CHECK-LABEL: @test4
; CHECK: %[[call:.*]] = tail call i32 bitcast (i32 (i32)* @fn4 to i32 (i32*)*)(i32* %a) ; CHECK: %[[call:.*]] = tail call i32 bitcast (i32 (i32)* @fn4 to i32 (i32*)*)(i32* %a)
; CHECK-NEXT: ret i32 %[[call]] ; CHECK-NEXT: ret i32 %[[call]]
entry: entry:
%call = tail call i32 bitcast (i32 (i32)* @fn4 to i32 (i32*)*)(i32* %a) %call = tail call i32 bitcast (i32 (i32)* @fn4 to i32 (i32*)*)(i32* %a)
ret i32 %call ret i32 %call
} }
declare i1 @fn5({ i32, i32 }* byval align 4 %r) declare i1 @fn5({ i32, i32 }* align 4 byval({ i32, i32 }) %r)
define i1 @test5() { define i1 @test5() {
; CHECK-LABEL: @test5 ; CHECK-LABEL: @test5
; CHECK: %[[call:.*]] = call i1 bitcast (i1 ({ i32, i32 }*)* @fn5 to i1 (i32, i32)*)(i32 {{.*}}, i32 {{.*}}) ; CHECK: %[[call:.*]] = call i1 bitcast (i1 ({ i32, i32 }*)* @fn5 to i1 (i32, i32)*)(i32 {{.*}}, i32 {{.*}})
; CHECK-NEXT: ret i1 %[[call]] ; CHECK-NEXT: ret i1 %[[call]]
%1 = alloca { i32, i32 }, align 4 %1 = alloca { i32, i32 }, align 4
%2 = getelementptr inbounds { i32, i32 }, { i32, i32 }* %1, i32 0, i32 0 %2 = getelementptr inbounds { i32, i32 }, { i32, i32 }* %1, i32 0, i32 0
%3 = load i32, i32* %2, align 4 %3 = load i32, i32* %2, align 4
%4 = getelementptr inbounds { i32, i32 }, { i32, i32 }* %1, i32 0, i32 1 %4 = getelementptr inbounds { i32, i32 }, { i32, i32 }* %1, i32 0, i32 1
%5 = load i32, i32* %4, align 4 %5 = load i32, i32* %4, align 4
%6 = call i1 bitcast (i1 ({ i32, i32 }*)* @fn5 to i1 (i32, i32)*)(i32 %3, i32 %5) %6 = call i1 bitcast (i1 ({ i32, i32 }*)* @fn5 to i1 (i32, i32)*)(i32 %3, i32 %5)
ret i1 %6 ret i1 %6
} }

test/Transforms/InstCombine/crash.ll

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; PR8807 ; PR8807
declare i32 @test14f(i8* (i8*)*) nounwind declare i32 @test14f(i8* (i8*)*) nounwind
define void @test14() nounwind readnone { define void @test14() nounwind readnone {
entry: entry:
%tmp = bitcast i32 (i8* (i8*)*)* @test14f to i32 (i32*)* %tmp = bitcast i32 (i8* (i8*)*)* @test14f to i32 (i32*)*
%call10 = call i32 %tmp(i32* byval undef) %call10 = call i32 %tmp(i32* byval(i32) undef)
ret void ret void
} }
; PR8896 ; PR8896
@g_54 = external global [7 x i16] @g_54 = external global [7 x i16]
define void @test15(i32* %p_92) nounwind { define void @test15(i32* %p_92) nounwind {
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test/Transforms/InstCombine/memcpy-from-global.ll

Show First 20 Lines • Show All 114 Lines • ▼ Show 20 Lines; CHECK-NEXT: call void @bar(i8* getelementptr inbounds (%T, %T* @G, i64 0, i32 0))
ret void ret void
} }
define void @test4() { define void @test4() {
%A = alloca %T %A = alloca %T
%a = bitcast %T* %A to i8* %a = bitcast %T* %A to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false)
call void @baz(i8* byval %a) call void @baz(i8* byval(i8) %a)
; CHECK-LABEL: @test4( ; CHECK-LABEL: @test4(
; CHECK-NEXT: call void @baz(i8* byval getelementptr inbounds (%T, %T* @G, i64 0, i32 0)) ; CHECK-NEXT: call void @baz(i8* byval(i8) getelementptr inbounds (%T, %T* @G, i64 0, i32 0))
ret void ret void
} }
declare void @llvm.lifetime.start(i64, i8*) declare void @llvm.lifetime.start(i64, i8*)
define void @test5() { define void @test5() {
%A = alloca %T %A = alloca %T
%a = bitcast %T* %A to i8* %a = bitcast %T* %A to i8*
call void @llvm.lifetime.start(i64 -1, i8* %a) call void @llvm.lifetime.start(i64 -1, i8* %a)
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false)
call void @baz(i8* byval %a) call void @baz(i8* byval(i8) %a)
; CHECK-LABEL: @test5( ; CHECK-LABEL: @test5(
; CHECK-NEXT: call void @baz(i8* byval getelementptr inbounds (%T, %T* @G, i64 0, i32 0)) ; CHECK-NEXT: call void @baz(i8* byval(i8) getelementptr inbounds (%T, %T* @G, i64 0, i32 0))
ret void ret void
} }
declare void @baz(i8* byval) declare void @baz(i8* byval(i8))
define void @test6() { define void @test6() {
%A = alloca %U, align 16 %A = alloca %U, align 16
%a = bitcast %U* %A to i8* %a = bitcast %U* %A to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast ([2 x %U]* @H to i8*), i64 20, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast ([2 x %U]* @H to i8*), i64 20, i32 16, i1 false)
call void @bar(i8* %a) readonly call void @bar(i8* %a) readonly
; CHECK-LABEL: @test6( ; CHECK-LABEL: @test6(
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test/Transforms/MemCpyOpt/memcpy.ll

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} }
; PR8644 ; PR8644
define void @test4(i8 *%P) { define void @test4(i8 *%P) {
%A = alloca %1 %A = alloca %1
%a = bitcast %1* %A to i8* %a = bitcast %1* %A to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %P, i64 8, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* %P, i64 8, i32 4, i1 false)
call void @test4a(i8* align 1 byval %a) call void @test4a(i8* align 1 byval(i8) %a)
ret void ret void
; CHECK-LABEL: @test4( ; CHECK-LABEL: @test4(
; CHECK-NEXT: call void @test4a( ; CHECK-NEXT: call void @test4a(
} }
declare void @test4a(i8* align 1 byval) declare void @test4a(i8* align 1 byval(i8))
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* nocapture, i8 addrspace(1)* nocapture, i64, i32, i1) nounwind
%struct.S = type { i128, [4 x i8]} %struct.S = type { i128, [4 x i8]}
@sS = external global %struct.S, align 16 @sS = external global %struct.S, align 16
declare void @test5a(%struct.S* align 16 byval) nounwind ssp declare void @test5a(%struct.S* align 16 byval(%struct.S)) nounwind ssp
; rdar://8713376 - This memcpy can't be eliminated. ; rdar://8713376 - This memcpy can't be eliminated.
define i32 @test5(i32 %x) nounwind ssp { define i32 @test5(i32 %x) nounwind ssp {
entry: entry:
%y = alloca %struct.S, align 16 %y = alloca %struct.S, align 16
%tmp = bitcast %struct.S* %y to i8* %tmp = bitcast %struct.S* %y to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp, i8* bitcast (%struct.S* @sS to i8*), i64 32, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp, i8* bitcast (%struct.S* @sS to i8*), i64 32, i32 16, i1 false)
%a = getelementptr %struct.S, %struct.S* %y, i64 0, i32 1, i64 0 %a = getelementptr %struct.S, %struct.S* %y, i64 0, i32 1, i64 0
store i8 4, i8* %a store i8 4, i8* %a
call void @test5a(%struct.S* align 16 byval %y) call void @test5a(%struct.S* align 16 byval(%struct.S) %y)
ret i32 0 ret i32 0
; CHECK-LABEL: @test5( ; CHECK-LABEL: @test5(
; CHECK: store i8 4 ; CHECK: store i8 4
; CHECK: call void @test5a(%struct.S* byval align 16 %y) ; CHECK: call void @test5a(%struct.S* align 16 byval(%struct.S) %y)
} }
;; Noop memcpy should be zapped. ;; Noop memcpy should be zapped.
define void @test6(i8 *%P) { define void @test6(i8 *%P) {
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %P, i64 8, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %P, i64 8, i32 4, i1 false)
ret void ret void
; CHECK-LABEL: @test6( ; CHECK-LABEL: @test6(
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
} }
; PR9794 - Should forward memcpy into byval argument even though the memcpy ; PR9794 - Should forward memcpy into byval argument even though the memcpy
; isn't itself 8 byte aligned. ; isn't itself 8 byte aligned.
%struct.p = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.p = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
define i32 @test7(%struct.p* nocapture align 8 byval %q) nounwind ssp { define i32 @test7(%struct.p* nocapture align 8 byval(%struct.p) %q) nounwind ssp {
entry: entry:
%agg.tmp = alloca %struct.p, align 4 %agg.tmp = alloca %struct.p, align 4
%tmp = bitcast %struct.p* %agg.tmp to i8* %tmp = bitcast %struct.p* %agg.tmp to i8*
%tmp1 = bitcast %struct.p* %q to i8* %tmp1 = bitcast %struct.p* %q to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp, i8* %tmp1, i64 48, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp, i8* %tmp1, i64 48, i32 4, i1 false)
%call = call i32 @g(%struct.p* align 8 byval %agg.tmp) nounwind %call = call i32 @g(%struct.p* align 8 byval(%struct.p) %agg.tmp) nounwind
ret i32 %call ret i32 %call
; CHECK-LABEL: @test7( ; CHECK-LABEL: @test7(
; CHECK: call i32 @g(%struct.p* byval align 8 %q) [[NUW:#[0-9]+]] ; CHECK: call i32 @g(%struct.p* align 8 byval(%struct.p) %q) [[NUW:#[0-9]+]]
} }
declare i32 @g(%struct.p* align 8 byval) declare i32 @g(%struct.p* align 8 byval(%struct.p))
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
; PR11142 - When looking for a memcpy-memcpy dependency, don't get stuck on ; PR11142 - When looking for a memcpy-memcpy dependency, don't get stuck on
; instructions between the memcpy's that only affect the destination pointer. ; instructions between the memcpy's that only affect the destination pointer.
@test8.str = internal constant [7 x i8] c"ABCDEF\00" @test8.str = internal constant [7 x i8] c"ABCDEF\00"
define void @test8() { define void @test8() {
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test/Transforms/MemCpyOpt/smaller.ll

; RUN: opt -memcpyopt -S < %s | FileCheck %s ; RUN: opt -memcpyopt -S < %s | FileCheck %s
; rdar://8875553 ; rdar://8875553
; Memcpyopt shouldn't optimize the second memcpy using the first ; Memcpyopt shouldn't optimize the second memcpy using the first
; because the first has a smaller size. ; because the first has a smaller size.
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.s, %struct.s* @cell, i32 0, i32 0, i32 0), i32 16, i32 4, i1 false) ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.s, %struct.s* @cell, i32 0, i32 0, i32 0), i32 16, i32 4, i1 false)
target datalayout = "e-p:32:32:32" target datalayout = "e-p:32:32:32"
%struct.s = type { [11 x i8], i32 } %struct.s = type { [11 x i8], i32 }
@.str = private constant [11 x i8] c"0123456789\00" @.str = private constant [11 x i8] c"0123456789\00"
@cell = external global %struct.s @cell = external global %struct.s
declare void @check(%struct.s* byval %p) nounwind declare void @check(%struct.s* byval(%struct.s) %p) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
define void @foo() nounwind { define void @foo() nounwind {
entry: entry:
%agg.tmp = alloca %struct.s, align 4 %agg.tmp = alloca %struct.s, align 4
store i32 99, i32* getelementptr inbounds (%struct.s, %struct.s* @cell, i32 0, i32 1), align 4 store i32 99, i32* getelementptr inbounds (%struct.s, %struct.s* @cell, i32 0, i32 1), align 4
call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.s, %struct.s* @cell, i32 0, i32 0, i32 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i32 11, i32 1, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* getelementptr inbounds (%struct.s, %struct.s* @cell, i32 0, i32 0, i32 0), i8* getelementptr inbounds ([11 x i8], [11 x i8]* @.str, i32 0, i32 0), i32 11, i32 1, i1 false)
%tmp = getelementptr inbounds %struct.s, %struct.s* %agg.tmp, i32 0, i32 0, i32 0 %tmp = getelementptr inbounds %struct.s, %struct.s* %agg.tmp, i32 0, i32 0, i32 0
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.s, %struct.s* @cell, i32 0, i32 0, i32 0), i32 16, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* getelementptr inbounds (%struct.s, %struct.s* @cell, i32 0, i32 0, i32 0), i32 16, i32 4, i1 false)
call void @check(%struct.s* byval %agg.tmp) call void @check(%struct.s* byval(%struct.s) %agg.tmp)
ret void ret void
} }

test/Transforms/MemCpyOpt/sret.ll

; RUN: opt < %s -basicaa -memcpyopt -S | not grep "call.*memcpy" ; RUN: opt < %s -basicaa -memcpyopt -S | not grep "call.*memcpy"
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin9" target triple = "i686-apple-darwin9"
%0 = type { x86_fp80, x86_fp80 } %0 = type { x86_fp80, x86_fp80 }
define void @ccosl(%0* noalias sret %agg.result, %0* byval align 8 %z) nounwind { define void @ccosl(%0* noalias sret %agg.result, %0* align 8 byval(%0) %z) nounwind {
entry: entry:
%iz = alloca %0 %iz = alloca %0
%memtmp = alloca %0, align 16 %memtmp = alloca %0, align 16
%tmp1 = getelementptr %0, %0* %z, i32 0, i32 1 %tmp1 = getelementptr %0, %0* %z, i32 0, i32 1
%tmp2 = load x86_fp80, x86_fp80* %tmp1, align 16 %tmp2 = load x86_fp80, x86_fp80* %tmp1, align 16
%tmp3 = fsub x86_fp80 0xK80000000000000000000, %tmp2 %tmp3 = fsub x86_fp80 0xK80000000000000000000, %tmp2
%tmp4 = getelementptr %0, %0* %iz, i32 0, i32 1 %tmp4 = getelementptr %0, %0* %iz, i32 0, i32 1
%real = getelementptr %0, %0* %iz, i32 0, i32 0 %real = getelementptr %0, %0* %iz, i32 0, i32 0
%tmp7 = getelementptr %0, %0* %z, i32 0, i32 0 %tmp7 = getelementptr %0, %0* %z, i32 0, i32 0
%tmp8 = load x86_fp80, x86_fp80* %tmp7, align 16 %tmp8 = load x86_fp80, x86_fp80* %tmp7, align 16
store x86_fp80 %tmp3, x86_fp80* %real, align 16 store x86_fp80 %tmp3, x86_fp80* %real, align 16
store x86_fp80 %tmp8, x86_fp80* %tmp4, align 16 store x86_fp80 %tmp8, x86_fp80* %tmp4, align 16
call void @ccoshl(%0* noalias sret %memtmp, %0* byval align 8 %iz) nounwind call void @ccoshl(%0* noalias sret %memtmp, %0* align 8 byval(%0) %iz) nounwind
%memtmp14 = bitcast %0* %memtmp to i8* %memtmp14 = bitcast %0* %memtmp to i8*
%agg.result15 = bitcast %0* %agg.result to i8* %agg.result15 = bitcast %0* %agg.result to i8*
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %agg.result15, i8* %memtmp14, i32 32, i32 16, i1 false) call void @llvm.memcpy.p0i8.p0i8.i32(i8* %agg.result15, i8* %memtmp14, i32 32, i32 16, i1 false)
ret void ret void
} }
declare void @ccoshl(%0* noalias nocapture sret, %0* byval) nounwind declare void @ccoshl(%0* noalias nocapture sret, %0* byval(%0)) nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind

test/Transforms/SafeStack/byval.ll

; RUN: opt -safe-stack -S -mtriple=i386-pc-linux-gnu < %s -o - | FileCheck %s ; RUN: opt -safe-stack -S -mtriple=i386-pc-linux-gnu < %s -o - | FileCheck %s
; RUN: opt -safe-stack -S -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck %s ; RUN: opt -safe-stack -S -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
%struct.S = type { [100 x i32] } %struct.S = type { [100 x i32] }
; Safe access to a byval argument. ; Safe access to a byval argument.
define i32 @ByValSafe(%struct.S* byval nocapture readonly align 8 %zzz) norecurse nounwind readonly safestack uwtable { define i32 @ByValSafe(%struct.S* nocapture readonly align 8 byval(%struct.S) %zzz) norecurse nounwind readonly safestack uwtable {
entry: entry:
; CHECK-LABEL: @ByValSafe ; CHECK-LABEL: @ByValSafe
; CHECK-NOT: __safestack_unsafe_stack_ptr ; CHECK-NOT: __safestack_unsafe_stack_ptr
; CHECK: ret i32 ; CHECK: ret i32
%arrayidx = getelementptr inbounds %struct.S, %struct.S* %zzz, i64 0, i32 0, i64 3 %arrayidx = getelementptr inbounds %struct.S, %struct.S* %zzz, i64 0, i32 0, i64 3
%0 = load i32, i32* %arrayidx, align 4 %0 = load i32, i32* %arrayidx, align 4
ret i32 %0 ret i32 %0
} }
; Unsafe access to a byval argument. ; Unsafe access to a byval argument.
; Argument is copied to the unsafe stack. ; Argument is copied to the unsafe stack.
define i32 @ByValUnsafe(%struct.S* byval nocapture readonly align 8 %zzz, i64 %idx) norecurse nounwind readonly safestack uwtable { define i32 @ByValUnsafe(%struct.S* nocapture readonly align 8 byval(%struct.S) %zzz, i64 %idx) norecurse nounwind readonly safestack uwtable {
entry: entry:
; CHECK-LABEL: @ByValUnsafe ; CHECK-LABEL: @ByValUnsafe
; CHECK: %[[A:.*]] = load {{.*}} @__safestack_unsafe_stack_ptr ; CHECK: %[[A:.*]] = load {{.*}} @__safestack_unsafe_stack_ptr
; CHECK: store {{.*}} @__safestack_unsafe_stack_ptr ; CHECK: store {{.*}} @__safestack_unsafe_stack_ptr
; CHECK: %[[B:.*]] = getelementptr i8, i8* %[[A]], i32 -400 ; CHECK: %[[B:.*]] = getelementptr i8, i8* %[[A]], i32 -400
; CHECK: %[[C:.*]] = bitcast %struct.S* %zzz to i8* ; CHECK: %[[C:.*]] = bitcast %struct.S* %zzz to i8*
; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %[[B]], i8* %[[C]], i64 400, i32 8, i1 false) ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %[[B]], i8* %[[C]], i64 400, i32 8, i1 false)
; CHECK: ret i32 ; CHECK: ret i32
%arrayidx = getelementptr inbounds %struct.S, %struct.S* %zzz, i64 0, i32 0, i64 %idx %arrayidx = getelementptr inbounds %struct.S, %struct.S* %zzz, i64 0, i32 0, i64 %idx
%0 = load i32, i32* %arrayidx, align 4 %0 = load i32, i32* %arrayidx, align 4
ret i32 %0 ret i32 %0
} }
; Highly aligned byval argument. ; Highly aligned byval argument.
define i32 @ByValUnsafeAligned(%struct.S* byval nocapture readonly align 64 %zzz, i64 %idx) norecurse nounwind readonly safestack uwtable { define i32 @ByValUnsafeAligned(%struct.S* nocapture readonly align 64 byval(%struct.S) %zzz, i64 %idx) norecurse nounwind readonly safestack uwtable {
entry: entry:
; CHECK-LABEL: @ByValUnsafeAligned ; CHECK-LABEL: @ByValUnsafeAligned
; CHECK: %[[A:.*]] = load {{.*}} @__safestack_unsafe_stack_ptr ; CHECK: %[[A:.*]] = load {{.*}} @__safestack_unsafe_stack_ptr
; CHECK: %[[B:.*]] = ptrtoint i8* %[[A]] to i64 ; CHECK: %[[B:.*]] = ptrtoint i8* %[[A]] to i64
; CHECK: and i64 %[[B]], -64 ; CHECK: and i64 %[[B]], -64
; CHECK: ret i32 ; CHECK: ret i32
%arrayidx = getelementptr inbounds %struct.S, %struct.S* %zzz, i64 0, i32 0, i64 0 %arrayidx = getelementptr inbounds %struct.S, %struct.S* %zzz, i64 0, i32 0, i64 0
%0 = load i32, i32* %arrayidx, align 64 %0 = load i32, i32* %arrayidx, align 64
%arrayidx2 = getelementptr inbounds %struct.S, %struct.S* %zzz, i64 0, i32 0, i64 %idx %arrayidx2 = getelementptr inbounds %struct.S, %struct.S* %zzz, i64 0, i32 0, i64 %idx
%1 = load i32, i32* %arrayidx2, align 4 %1 = load i32, i32* %arrayidx2, align 4
%add = add nsw i32 %1, %0 %add = add nsw i32 %1, %0
ret i32 %add ret i32 %add
} }

test/Transforms/SafeStack/debug-loc.ll

; RUN: opt -safe-stack -S -mtriple=i386-pc-linux-gnu < %s -o - | FileCheck %s ; RUN: opt -safe-stack -S -mtriple=i386-pc-linux-gnu < %s -o - | FileCheck %s
; Test debug location for the local variables moved onto the unsafe stack. ; Test debug location for the local variables moved onto the unsafe stack.
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu" target triple = "x86_64-unknown-linux-gnu"
%struct.S = type { [100 x i8] } %struct.S = type { [100 x i8] }
; Function Attrs: safestack uwtable ; Function Attrs: safestack uwtable
define void @f(%struct.S* byval align 8 %zzz) #0 !dbg !12 { define void @f(%struct.S* align 8 byval(%struct.S) %zzz) #0 !dbg !12 {
; CHECK: define void @f ; CHECK: define void @f
entry: entry:
; CHECK: %[[USP:.*]] = load i8*, i8** @__safestack_unsafe_stack_ptr ; CHECK: %[[USP:.*]] = load i8*, i8** @__safestack_unsafe_stack_ptr
%xxx = alloca %struct.S, align 1 %xxx = alloca %struct.S, align 1
call void @llvm.dbg.declare(metadata %struct.S* %zzz, metadata !18, metadata !19), !dbg !20 call void @llvm.dbg.declare(metadata %struct.S* %zzz, metadata !18, metadata !19), !dbg !20
call void @llvm.dbg.declare(metadata %struct.S* %xxx, metadata !21, metadata !19), !dbg !22 call void @llvm.dbg.declare(metadata %struct.S* %xxx, metadata !21, metadata !19), !dbg !22
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test/Transforms/ScalarRepl/only-memcpy-uses.ll

; RUN: opt < %s -scalarrepl -S | FileCheck %s ; RUN: opt < %s -scalarrepl -S | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0" target triple = "x86_64-apple-darwin10.0.0"
%struct.S = type { [12 x i32] } %struct.S = type { [12 x i32] }
; CHECK-LABEL: @bar4( ; CHECK-LABEL: @bar4(
define void @bar4(%struct.S* byval %s) nounwind ssp { define void @bar4(%struct.S* byval(%struct.S) %s) nounwind ssp {
entry: entry:
; CHECK: alloca ; CHECK: alloca
; CHECK-NOT: load ; CHECK-NOT: load
; CHECK: memcpy ; CHECK: memcpy
%t = alloca %struct.S, align 4 %t = alloca %struct.S, align 4
%agg.tmp = alloca %struct.S, align 4 %agg.tmp = alloca %struct.S, align 4
%tmp = bitcast %struct.S* %t to i8* %tmp = bitcast %struct.S* %t to i8*
%tmp1 = bitcast %struct.S* %s to i8* %tmp1 = bitcast %struct.S* %s to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp, i8* %tmp1, i64 48, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp, i8* %tmp1, i64 48, i32 4, i1 false)
%tmp2 = bitcast %struct.S* %agg.tmp to i8* %tmp2 = bitcast %struct.S* %agg.tmp to i8*
%tmp3 = bitcast %struct.S* %t to i8* %tmp3 = bitcast %struct.S* %t to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp2, i8* %tmp3, i64 48, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %tmp2, i8* %tmp3, i64 48, i32 4, i1 false)
%call = call i32 (...) @bazz(%struct.S* byval %agg.tmp) %call = call i32 (...) @bazz(%struct.S* byval(%struct.S) %agg.tmp)
ret void ret void
} }
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
declare i32 @bazz(...) declare i32 @bazz(...)

test/Transforms/TailCallElim/basic.ll

Show First 20 Lines • Show All 139 Lines • ▼ Show 20 Linescond_true:
ret i32* null ret i32* null
cond_false: cond_false:
call void @use2_nocapture(i32* %A, i32* %B) call void @use2_nocapture(i32* %A, i32* %B)
call void @noarg() call void @noarg()
ret i32* null ret i32* null
} }
; Don't tail call if a byval arg is captured. ; Don't tail call if a byval arg is captured.
define void @test9(i32* byval %a) { define void @test9(i32* byval(i32) %a) {
; CHECK-LABEL: define void @test9( ; CHECK-LABEL: define void @test9(
; CHECK: {{^ *}}call void @use( ; CHECK: {{^ *}}call void @use(
call void @use(i32* %a) call void @use(i32* %a)
ret void ret void
} }
%struct.X = type { i8* } %struct.X = type { i8* }
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test/Verifier/byval-4.ll

; RUN: llvm-as %s -o /dev/null ; RUN: llvm-as %s -o /dev/null
%struct.foo = type { i64 } %struct.foo = type { i64 }
declare void @h(%struct.foo* byval %num) declare void @h(%struct.foo* byval(%struct.foo) %num)

test/Verifier/inalloca1.ll

; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s ; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s
declare void @a(i64* byval inalloca %p) declare void @a(i64* inalloca byval(i64) %p)
; CHECK: Attributes {{.*}} are incompatible ; CHECK: Attributes {{.*}} are incompatible
declare void @b(i64* inreg inalloca %p) declare void @b(i64* inreg inalloca %p)
; CHECK: Attributes {{.*}} are incompatible ; CHECK: Attributes {{.*}} are incompatible
declare void @c(i64* sret inalloca %p) declare void @c(i64* sret inalloca %p)
; CHECK: Attributes {{.*}} are incompatible ; CHECK: Attributes {{.*}} are incompatible
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test/Verifier/musttail-invalid.ll

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declare { i32, i32, i32 } @mismatched_retty_callee(i32) declare { i32, i32, i32 } @mismatched_retty_callee(i32)
define void @mismatched_retty(i32) { define void @mismatched_retty(i32) {
; CHECK: mismatched return types ; CHECK: mismatched return types
musttail call { i32, i32, i32 } @mismatched_retty_callee(i32 0) musttail call { i32, i32, i32 } @mismatched_retty_callee(i32 0)
ret void ret void
} }
declare void @mismatched_byval_callee({ i32 }*) declare void @mismatched_byval_callee({ i32 }*)
define void @mismatched_byval({ i32 }* byval %a) { define void @mismatched_byval({ i32 }* byval({ i32 }) %a) {
; CHECK: mismatched ABI impacting function attributes ; CHECK: mismatched ABI impacting function attributes
musttail call void @mismatched_byval_callee({ i32 }* %a) musttail call void @mismatched_byval_callee({ i32 }* %a)
ret void ret void
} }
declare void @mismatched_inreg_callee(i32 inreg) declare void @mismatched_inreg_callee(i32 inreg)
define void @mismatched_inreg(i32 %a) { define void @mismatched_inreg(i32 %a) {
; CHECK: mismatched ABI impacting function attributes ; CHECK: mismatched ABI impacting function attributes
musttail call void @mismatched_inreg_callee(i32 inreg %a) musttail call void @mismatched_inreg_callee(i32 inreg %a)
ret void ret void
} }
declare void @mismatched_sret_callee(i32* sret) declare void @mismatched_sret_callee(i32* sret)
define void @mismatched_sret(i32* %a) { define void @mismatched_sret(i32* %a) {
; CHECK: mismatched ABI impacting function attributes ; CHECK: mismatched ABI impacting function attributes
musttail call void @mismatched_sret_callee(i32* sret %a) musttail call void @mismatched_sret_callee(i32* sret %a)
ret void ret void
} }
declare void @mismatched_alignment_callee(i32* byval align 8) declare void @mismatched_alignment_callee(i32* align 8 byval(i32))
define void @mismatched_alignment(i32* byval align 4 %a) { define void @mismatched_alignment(i32* align 4 byval(i32) %a) {
; CHECK: mismatched ABI impacting function attributes ; CHECK: mismatched ABI impacting function attributes
musttail call void @mismatched_alignment_callee(i32* byval align 8 %a) musttail call void @mismatched_alignment_callee(i32* align 8 byval(i32) %a)
ret void ret void
} }
declare i32 @not_tail_pos_callee() declare i32 @not_tail_pos_callee()
define i32 @not_tail_pos() { define i32 @not_tail_pos() {
; CHECK: musttail call must be precede a ret with an optional bitcast ; CHECK: musttail call must be precede a ret with an optional bitcast
%v = musttail call i32 @not_tail_pos_callee() %v = musttail call i32 @not_tail_pos_callee()
%w = add i32 %v, 1 %w = add i32 %v, 1
ret i32 %w ret i32 %w
} }
define void @inline_asm() { define void @inline_asm() {
; CHECK: cannot use musttail call with inline asm ; CHECK: cannot use musttail call with inline asm
musttail call void asm "ret", ""() musttail call void asm "ret", ""()
ret void ret void
} }