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[mips] Allowed la instructions on 64-bit architectures.
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Authored by s.egerton on Jan 22 2016, 1:44 AM.

Details

Summary

This required the isSuperOrSubRegisterEq function in order to avoid
depending on the equality operator when comparing registers. This was
added in http://reviews.llvm.org/rL258400

Diff Detail

Event Timeline

s.egerton updated this revision to Diff 45663.Jan 22 2016, 1:44 AM
s.egerton retitled this revision from to [mips] Allowed la instructions on 64-bit architectures..
s.egerton updated this object.
s.egerton added reviewers: dsanders, vkalintiris.
s.egerton added a subscriber: llvm-commits.
dsanders requested changes to this revision.Feb 3 2016, 7:18 AM
dsanders edited edge metadata.

This change looks correct but it appears to expose a bug. One of the tests in macro-la-64bit.s emits different code to GAS. IAS gives:

2f0:   34068000        li      a2,0x8000
2f4:   00c6302d        daddu   a2,a2,a2

where the li clobbers the third operand of the daddu, whereas GAS emits:

2f0:   34018000        li      at,0x8000
2f4:   0026302d        daddu   a2,at,a2

Could you correct the relevant CHECK lines and fix the bug?

This revision now requires changes to proceed.Feb 3 2016, 7:18 AM
s.egerton updated this revision to Diff 47457.Feb 10 2016, 8:04 AM
s.egerton edited edge metadata.

Added the -gpsize=0 option to the test cases so that the IAS will emit the same code as GAS.

dsanders resigned from this revision.Jul 12 2019, 1:25 PM

Just removing a 3 year old patch from my queue. Feel free to re-add me if this is still needed and you want me to take another look

s.egerton abandoned this revision.Jul 31 2019, 2:24 AM