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X86 processors and features
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Authored by delena on Jan 20 2016, 7:58 AM.

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Summary

Changes in X86.td:

  1. I set features of Intel processors in incremental form: IVB = SNB + X HSW = IVB + X ..
  2. I added Skylake client processor and defined it's features
  3. FeatureADX was missing on KNL
  4. Added some new features to appropriate processors SMAP, IFMA, PREFETCHWT1, VMFUNC and others

Diff Detail

Repository
rL LLVM

Event Timeline

delena updated this revision to Diff 45390.Jan 20 2016, 7:58 AM
delena retitled this revision from to X86 processors and features.
delena updated this object.
delena added reviewers: kbsmith1, DavidKreitzer.
delena set the repository for this revision to rL LLVM.
delena updated this revision to Diff 45493.Jan 21 2016, 12:34 AM
delena removed rL LLVM as the repository for this revision.

Added "Slow-unaligned-memory" feature to IVB, it was in the original version (thanks, Igor).

igorb accepted this revision.Jan 21 2016, 12:43 AM
igorb added a reviewer: igorb.

LGTM

This revision is now accepted and ready to land.Jan 21 2016, 12:43 AM
AsafBadouh accepted this revision.Jan 21 2016, 1:24 AM
AsafBadouh added a reviewer: AsafBadouh.

LGTM

kbsmith1 edited edge metadata.Jan 21 2016, 3:09 PM

Two nits. Up to you whether they are worth changing. Either way LGTM.

../lib/Support/Host.cpp
822 ↗(On Diff #45493)

Seems like it would be nice to move this (821,822) down to after line 835 so that all the ones dependent on ECX could be together.

../test/CodeGen/X86/avx512bw-intrinsics.ll
2914 ↗(On Diff #45493)

It seems unfortunate that the whole output of the routine needs to be duplicated for these two different checks. It looks like only the form of the label, and the input of the kmovd are different between the newly added checks, and the AVX512BW versions, and that seems to apply to most all of the additions in this file.

kbsmith1 accepted this revision.Jan 21 2016, 3:09 PM
kbsmith1 edited edge metadata.
delena marked an inline comment as done.Jan 23 2016, 11:30 PM

Thanks everybody for the review.

../test/CodeGen/X86/avx512bw-intrinsics.ll
2914 ↗(On Diff #45493)

This is an automatic tool that generates these checks. It does not understand that the diff is minor. We check the both 64 and 32 modes, because we have a special lowering for i64 values in 32-bit mode.

This revision was automatically updated to reflect the committed changes.