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DavidKreitzer (David Kreitzer)
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Jun 26 2015, 5:48 AM (181 w, 1 d)

Recent Activity

May 23 2018

DavidKreitzer accepted D47182: [X86] Move all Intel defined intrinsic includes into immintrin.h.

Thanks, Craig. LGTM.

May 23 2018, 11:07 AM
DavidKreitzer added a comment to D47182: [X86] Move all Intel defined intrinsic includes into immintrin.h.

Hi Craig, just one comment on the details. Everything else looks good.

May 23 2018, 9:04 AM

May 22 2018

DavidKreitzer added a comment to D47182: [X86] Move all Intel defined intrinsic includes into immintrin.h.

I agree with the changes in x86intrin.h and immintrin.h. For the others, I question whether we ought to recommend inclusion of x86intrin.h or immintrin.h. The distinction as I understand it is that immintrin.h is used for Intel-specific intrinsics while x86intrin.h covers all intrinsics for x86-based architectures.

May 22 2018, 2:18 PM
DavidKreitzer added a comment to D47174: [X86] Move 128-bit f16c intrinsics to __emmintrin_f16c.h include from emmintrin.h. Move 256-bit f16c intrinsics back to f16cintrin.h.

A bit of history: In icc, the f16<=>f32 conversion intrinsics are a bit of an anomaly in that they can be implemented using either native code or emulation code based on the target architecture switch. See https://godbolt.org/g/bQy7xY (thanks, Craig, for the example code). The emulation code lives in the Intel Math Library.

May 22 2018, 1:51 PM

May 21 2018

DavidKreitzer accepted D46863: [X86] Use __builtin_convertvector to implement some of the packed integer to packed float conversion intrinsics..

I had actually done that as part of my initial review, so LGTM.

May 21 2018, 11:55 AM

May 18 2018

DavidKreitzer added a comment to D47029: [X86] Remove some preprocessor feature checks from intrinsic headers.

Looks right to me, Craig.

May 18 2018, 2:41 PM

May 16 2018

DavidKreitzer added a comment to D46863: [X86] Use __builtin_convertvector to implement some of the packed integer to packed float conversion intrinsics..

This looks good to me, Craig. I am not worried about the constant folding issue, as I think constant folding these conversion intrinsics (assuming round-to-nearest) is a perfectly valid optimization in the absence of FENV_ACCESS. (FWIW, we don't do this constant folding in icc, but that is only because we have never gotten around to implementing it.) I am also not worried about the spurious 'inexact' exceptions that the changes to the mask intrinsics will cause.

May 16 2018, 1:26 PM
DavidKreitzer accepted D43441: [X86][AVX512DQ] Use packed instructions for scalar FP<->i64 conversions on 32-bit targets (PR31630).

Looks good, Craig. And thanks for the explanation on the 64-bit cases. I had forgotten about the VCVTTSx2USI & VCVTUSI2Sx instructions, which we appear to be generating already.

May 16 2018, 5:44 AM

May 15 2018

DavidKreitzer added a comment to D43441: [X86][AVX512DQ] Use packed instructions for scalar FP<->i64 conversions on 32-bit targets (PR31630).

Thanks, Craig.

May 15 2018, 3:36 PM
DavidKreitzer added a comment to D43441: [X86][AVX512DQ] Use packed instructions for scalar FP<->i64 conversions on 32-bit targets (PR31630).

Could you please add full context to the patch, Craig?

May 15 2018, 8:37 AM

Mar 16 2018

DavidKreitzer added a comment to D44583: Quiet unused variable warnings in Release builds.

Thanks, Craig. I noticed it with gcc 4.8.5.

Mar 16 2018, 2:23 PM
DavidKreitzer added a reviewer for D44583: Quiet unused variable warnings in Release builds: jwroorda.
Mar 16 2018, 2:03 PM
DavidKreitzer created D44583: Quiet unused variable warnings in Release builds.
Mar 16 2018, 1:56 PM

Feb 1 2018

DavidKreitzer added a comment to D40975: [LangRef] Reflect the changes in the TBAA info format.

This looks like a nice change.

Feb 1 2018, 5:29 AM

Nov 3 2017

DavidKreitzer added a comment to D39575: [X86] Add subtarget features prefer-avx256 and prefer-avx128 and use them to limit vector width presented by TTI.

This looks reasonable to me, Craig. For testing, the obvious thing would be to test the effect on the LoopVectorizer, since it is the primary consumer of this information.

Nov 3 2017, 7:00 AM

Oct 24 2017

DavidKreitzer added inline comments to D38730: X86: Fix X86CallFrameOptimization to search for the COPY StackPointer.
Oct 24 2017, 8:05 AM

Oct 23 2017

DavidKreitzer added inline comments to D38738: X86CallFrameOptimization: Recognize 'store 0/-1 using and/or' idioms.
Oct 23 2017, 7:57 PM
DavidKreitzer added a comment to D38730: X86: Fix X86CallFrameOptimization to search for the COPY StackPointer.

Just one minor suggestion. Otherwise, this LGTM also.

Oct 23 2017, 7:30 PM
DavidKreitzer accepted D38729: X86: Register the X86CallFrameOptimization pass.

LGTM also.

Oct 23 2017, 7:05 PM

Oct 6 2017

DavidKreitzer added a comment to D37289: [X86] Speculatively load operands of select instruction.

After some internal discussions, we suspect that Sanjay's counter-example may have undefined behavior according to the C standard.

Oct 6 2017, 2:06 PM

Sep 25 2017

DavidKreitzer accepted D38001: [X86] Don't select anyext GR32->GR64 to SUBREG_TO_REG. Use INSERT_SUBREG instead..

I'd recommend going ahead with this, Craig. Even if it isn't possible for this bug to trigger a failure today, it looks like a latent bug that should be fixed.

Sep 25 2017, 1:53 PM

Sep 19 2017

DavidKreitzer added a comment to D38001: [X86] Don't select anyext GR32->GR64 to SUBREG_TO_REG. Use INSERT_SUBREG instead..

This change seems obviously correct. The diffs in the tests all look like tweaks in the register allocation behavior and aren't testing the behavior you are fixing. Is it possible to write a test that miscompiles due to the existing bug?

Sep 19 2017, 5:25 AM

Sep 18 2017

DavidKreitzer accepted D37729: [X86] Make sure we still emit zext for GR32 to GR64 when the source of the zext is AssertZext.

LGTM, Craig.

Sep 18 2017, 1:30 PM

Sep 13 2017

DavidKreitzer added reviewers for D37559: [X86FixupBWInsts] More presise register liveness if no <imp-use> on MOVs.: andrew.w.kaylor, craig.topper.
Sep 13 2017, 5:08 PM

Sep 8 2017

DavidKreitzer added inline comments to D37510: Unsigned saturation subtraction canonicalization.
Sep 8 2017, 5:58 AM

Sep 7 2017

DavidKreitzer added inline comments to D37510: Unsigned saturation subtraction canonicalization.
Sep 7 2017, 2:10 PM

Aug 11 2017

DavidKreitzer accepted D36344: [X86] Don't use fsin/fcos/fsincos instructions ever.

Adding Zvi as an FYI, but I think this is fine to land.

Aug 11 2017, 11:14 AM

Aug 10 2017

DavidKreitzer added a comment to D36414: [X86][X87] Ensure x87 instructions are tagged as altering the FPSW reg.

The change looks correct to me modulo Craig's comment, though I suspect he's right that there is a bug in the Intel documentation for FNOP.

Aug 10 2017, 7:57 AM

Aug 9 2017

DavidKreitzer added a comment to D36344: [X86] Don't use fsin/fcos/fsincos instructions ever.

Just a minor question on the test changes. Otherwise, this LGTM.

Aug 9 2017, 11:43 AM

Aug 1 2017

DavidKreitzer requested changes to D36036: Supported interleaved byte load-pattern of stride:4 VF(8, 16, 32)..

Hi Farhana,

Aug 1 2017, 12:53 PM
DavidKreitzer added inline comments to D35829: [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess (VF16 stride 4)..
Aug 1 2017, 12:17 PM

Jul 24 2017

DavidKreitzer accepted D34601: [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess..

Thanks, Michael. LGTM, again pending @RKSimon's re-review.

Jul 24 2017, 12:27 PM
DavidKreitzer added a comment to D34601: [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess..

Thanks, Michael. This LGTM pending @RKSimon's re-review. But can you please update your sources so that we can see how you merged with https://reviews.llvm.org/D35638, since that will cause conflicts?

Jul 24 2017, 9:05 AM

Jul 21 2017

DavidKreitzer added inline comments to D34601: [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess..
Jul 21 2017, 11:07 AM

Jul 20 2017

DavidKreitzer accepted D35638: A fix for bug33826.

Thanks, Farhana. LGTM.

Jul 20 2017, 4:24 PM
DavidKreitzer added inline comments to D35638: A fix for bug33826.
Jul 20 2017, 7:57 AM

Jul 19 2017

DavidKreitzer added inline comments to D35638: A fix for bug33826.
Jul 19 2017, 2:43 PM
DavidKreitzer added inline comments to D35638: A fix for bug33826.
Jul 19 2017, 12:30 PM
DavidKreitzer added a comment to D34601: [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess..

Hi Michael, I have one small additional comment. Otherwise, this looks good.

This the error I am getting when I try to define the function with a default parameter.
void llvm::scaleShuffleMask(int,llvm::ArrayRef<T>,llvm::SmallVectorImpl<T> &)': could not deduce template argument for 'llvm::ArrayRef<T>' from 'llvm::SmallVector<int,4>'

If you prefer not to touch the CPP file. We can define an overload function in the header file that will explicit set the function signature.

The function in the header will look like:

template <typename t1, unsigned n>
void scaleshufflemask(int scale, typename smallvector<t1, n> mask,
  typename smallvectorimpl<t1> &scaledmask) {
  scaleshufflemask(scale, makearrayref(mask), scaledmask);

This function describe another signature that one of the call in the CPP file uses.

The other option is as I proposed on this review.

What you prefer?

Jul 19 2017, 6:47 AM

Jul 13 2017

DavidKreitzer added a comment to D34601: [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess..

Hi Michael, I have one small additional comment. Otherwise, this looks good.

Jul 13 2017, 3:11 PM

Jul 12 2017

DavidKreitzer added a comment to D34601: [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess..

Thanks for the changes, Michael, and thanks for following up on the perf issue in https://bugs.llvm.org/show_bug.cgi?id=33740.

Jul 12 2017, 6:41 AM

Jul 6 2017

DavidKreitzer added a comment to D34601: [X86][LLVM]Expanding Supports lowerInterleavedStore() in X86InterleavedAccess..

Hi Michael, sorry it took a while for me to get to this. I was on vacation last week.

Jul 6 2017, 1:50 PM

Jun 21 2017

DavidKreitzer accepted D32658: Supports lowerInterleavedStore() in X86InterleavedAccess..

Thanks, Farhana. LGTM.

Jun 21 2017, 3:19 PM

Jun 20 2017

DavidKreitzer added a comment to D32658: Supports lowerInterleavedStore() in X86InterleavedAccess..

Thanks for the fixes, Farhana. Other than a couple typos, this looks good.

Jun 20 2017, 1:52 PM

May 30 2017

DavidKreitzer added a comment to D33684: Added tests for lowerInterleavedStore..

Thanks, Farhana. Please remember to add llvm-commits as a subscriber for LLVM patches. This LGTM unless Simon has additional suggestions.

May 30 2017, 12:51 PM

May 26 2017

DavidKreitzer added inline comments to D32658: Supports lowerInterleavedStore() in X86InterleavedAccess..
May 26 2017, 8:49 AM

May 17 2017

DavidKreitzer added inline comments to D32669: [Nios2] Target registration.
May 17 2017, 6:15 AM

May 10 2017

DavidKreitzer added inline comments to D32658: Supports lowerInterleavedStore() in X86InterleavedAccess..
May 10 2017, 10:26 AM

Mar 15 2017

DavidKreitzer added a comment to D30049: x86 interrupt calling convention: re-align stack pointer on 64-bit if an error code was pushed.

Not from me. Looks good.

Mar 15 2017, 8:59 AM

Mar 13 2017

DavidKreitzer added a comment to D30049: x86 interrupt calling convention: re-align stack pointer on 64-bit if an error code was pushed.

Can we verify how stack is aligned when there is an error code?

Mar 13 2017, 12:37 PM

Feb 17 2017

DavidKreitzer added a comment to D30049: x86 interrupt calling convention: re-align stack pointer on 64-bit if an error code was pushed.

Amjad pointed out to me that the incoming alignment to an interrupt handler is only guaranteed to be 0 mod 8, not 8 mod 16 as is the case with the normal x86-64 ABI. HJ mentions this in 26477.

Feb 17 2017, 2:31 PM
DavidKreitzer added a comment to D30049: x86 interrupt calling convention: re-align stack pointer on 64-bit if an error code was pushed.

Aligning the stack is certainly the right thing to do. But this isn't the only problem with 26413. I will add a note to the report explaining what I mean.

Feb 17 2017, 8:21 AM

Jan 19 2017

DavidKreitzer abandoned D21479: Prototype fix for replacing the SETcc/MOVZX idiom with XOR/SETcc for a 32-bit conditional set of 0,1.
Jan 19 2017, 5:38 AM

Jan 6 2017

DavidKreitzer added a comment to D27028: Add intrinsics for constrained floating point operations.

When frem has a meaningful result, it is always exact, so perhaps we should omit the rounding behavior argument? I think we still need a constrained frem intrinsic, though, to handle the exceptional behavior in cases such as "frem inf, x" and "frem x, 0".

The implementation is slightly simpler if I give the frem intrinsic a rounding argument, even though it isn't needed. Otherwise, that intrinsic couldn't be handled by the same subclass as the others. I realize that's a fairly weak argument, but I just feel like making this one intrinsic different from the others will make the code ugly.

Jan 6 2017, 9:10 AM

Jan 4 2017

DavidKreitzer added a comment to D27028: Add intrinsics for constrained floating point operations.

This all looks pretty good to me, Andy. Regarding

Jan 4 2017, 8:52 AM

Dec 1 2016

DavidKreitzer abandoned D27319: Fix buildbot failure in non-assert-enabled -Werror build due to r288410.

Looks like this was fixed by r288416.

Dec 1 2016, 1:12 PM
DavidKreitzer retitled D27319: Fix buildbot failure in non-assert-enabled -Werror build due to r288410 from to Fix buildbot failure in non-assert-enabled -Werror build due to r288410.
Dec 1 2016, 1:08 PM

Nov 23 2016

DavidKreitzer added a comment to D25986: Re-factorization of X86InterleaveAccess into a class.

Hi Farhana,
I have no further comments. This LGTM too.
-Dave

Nov 23 2016, 9:11 AM

Oct 31 2016

DavidKreitzer added inline comments to D25986: Re-factorization of X86InterleaveAccess into a class.
Oct 31 2016, 2:14 PM

Oct 13 2016

DavidKreitzer added a comment to D25350: [X86] Enable interleaved memory accesses by default.

Hi Michael,

Oct 13 2016, 10:37 AM
DavidKreitzer added a comment to D25566: Fix for PR30687. Avoid dereferencing MBB.end()..

Thanks for taking care of this, Reid! That fix LGTM.

Oct 13 2016, 9:05 AM
DavidKreitzer retitled D25566: Fix for PR30687. Avoid dereferencing MBB.end(). from to Fix for PR30687. Avoid dereferencing MBB.end()..
Oct 13 2016, 8:42 AM

Oct 7 2016

DavidKreitzer accepted D24681: Optimize patterns of vectorized interleaved memory accesses for X86..

This LGTM, but I'd like you to also get approvals from Michael & Elena before proceeding.

Oct 7 2016, 7:06 AM

Oct 6 2016

DavidKreitzer added a comment to D24681: Optimize patterns of vectorized interleaved memory accesses for X86..

Hi Farhana,

Oct 6 2016, 7:38 AM

Oct 3 2016

DavidKreitzer added inline comments to D24681: Optimize patterns of vectorized interleaved memory accesses for X86..
Oct 3 2016, 1:37 PM

Sep 30 2016

DavidKreitzer requested changes to D24681: Optimize patterns of vectorized interleaved memory accesses for X86..

Hi Farhana,

Sep 30 2016, 9:59 AM

Aug 23 2016

DavidKreitzer added a comment to D23253: [X86] Generalized transformation of `definstr gr8; movzx gr32, gr8` to `xor gr32, gr32; definstr gr8`.

Just to clarify, the optimal result is movzbl 2(%rdi), %r10d, not

movb 2(%rdi), %al; movzbl %al, %r10d (which is the status quo)

nor

xorl %r10d, %r10d; movb 2(%rdi), %r10d (which is what this patch does)

Correct?

Aug 23 2016, 6:20 PM

Aug 22 2016

DavidKreitzer added a comment to D23253: [X86] Generalized transformation of `definstr gr8; movzx gr32, gr8` to `xor gr32, gr32; definstr gr8`.

Hi bryant,

Aug 22 2016, 3:23 PM

Jul 28 2016

DavidKreitzer retitled D22941: Fix confusion over x86_64 CMOV semantics in order to avoid unnecessary zero extensions from to Fix confusion over x86_64 CMOV semantics in order to avoid unnecessary zero extensions.
Jul 28 2016, 2:37 PM

Jul 25 2016

DavidKreitzer added a comment to D22045: [X86] Support of no_caller_saved_registers attribute (Clang part).

The example Aaron sent in email is a good one:

void func(int, int, int, int) __attribute__((no_caller_saved_registers, cdecl));
Jul 25 2016, 10:01 AM

Jun 30 2016

DavidKreitzer added a comment to D21774: [X86] Transform setcc + movzbl into xorl + setcc.

I have no objection to this solution. I think it is robust in a functional sense. And we can always change it later if we discover that the worst case MOV32r0 sinking scenario is more common than we think. It would give me the warm fuzzies if we had some experimental evidence to confirm the suspicion that this is a rare case. Do you already have that? If not, maybe it would be a good idea to write a late pass that looks for this kind of pattern and count the number of occurrences on, say, cpu2006?

SETcc r8
xor r32, r32 (or mov $0, r32)
movb r32b, r8

And thanks for the performance data! Once this gets committed, I'll have someone run testing on a broader set of workloads.

Jun 30 2016, 3:58 PM

Jun 28 2016

DavidKreitzer added a comment to D21774: [X86] Transform setcc + movzbl into xorl + setcc.

Hi Michael,

Jun 28 2016, 3:09 PM

Jun 21 2016

DavidKreitzer added a comment to D21560: Relax the clearance calculating for breaking partial register dependency..

I wasn't suggesting that Marina's fixes should replace this one. Sorry for that confusion. My point was simply that this is just one piece of a more comprehensive solution to the false dependence problem.

Jun 21 2016, 2:33 PM
DavidKreitzer added a reviewer for D21560: Relax the clearance calculating for breaking partial register dependency.: myatsina.
Jun 21 2016, 11:46 AM
DavidKreitzer added a comment to D21560: Relax the clearance calculating for breaking partial register dependency..

I think this is a good change. The cost of inserting an xor when it is not needed is very small. The cost of failing to insert an xor when it IS needed can be huge.

Jun 21 2016, 11:45 AM

Jun 17 2016

DavidKreitzer added a comment to D21479: Prototype fix for replacing the SETcc/MOVZX idiom with XOR/SETcc for a 32-bit conditional set of 0,1.

Your question is a good one, and I don't know the answer. Who knows? That might be the cause of all the failures I was getting.

Jun 17 2016, 2:40 PM
DavidKreitzer added a comment to D21479: Prototype fix for replacing the SETcc/MOVZX idiom with XOR/SETcc for a 32-bit conditional set of 0,1.

Thanks for the quick response, Michael!

Jun 17 2016, 2:01 PM
DavidKreitzer retitled D21479: Prototype fix for replacing the SETcc/MOVZX idiom with XOR/SETcc for a 32-bit conditional set of 0,1 from to Prototype fix for replacing the SETcc/MOVZX idiom with XOR/SETcc for a 32-bit conditional set of 0,1.
Jun 17 2016, 1:38 PM

May 26 2016

DavidKreitzer added a comment to D20649: [X86] Add a pattern that uses GR16_ABCD rather than GR32_ABCD to avoid falsely marking whole 32 bit register as live..

The code change looks reasonable to me Kevin.

May 26 2016, 11:53 AM

May 24 2016

DavidKreitzer added a comment to D20529: [x86, AVX] allow explicit calls to VZERO* to modify state in VZeroUpperInserter pass.

Your changes LGTM, Sanjay.

May 24 2016, 12:55 PM

May 23 2016

DavidKreitzer added a comment to D20518: [X86][RTM] _xabort() should not have "noreturn" attribute.

lgtm, Asaf.

May 23 2016, 5:51 AM

May 20 2016

DavidKreitzer added a comment to D20468: [X86][AVX] Ensure zero-extension of _mm256_extract_epi8 and _mm256_extract_epi16.

Hi Michael,

May 20 2016, 2:08 PM

May 17 2016

DavidKreitzer added a comment to D20263: X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions.

Thanks for the pointer to https://llvm.org/bugs/show_bug.cgi?id=26776, Reid.

May 17 2016, 1:02 PM
DavidKreitzer added a comment to D20263: X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions.

I just have a couple other minor suggestions. Otherwise, LGTM.

May 17 2016, 12:19 PM

May 16 2016

DavidKreitzer added a comment to D20263: X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions.

Hi Hans,

May 16 2016, 3:39 PM
DavidKreitzer retitled D20288: Fix for PR27750. Correctly handle the case where the FallThrough block == TBB in getFallThroughMBB. from to Fix for PR27750. Correctly handle the case where the FallThrough block == TBB in getFallThroughMBB..
May 16 2016, 10:05 AM

May 9 2016

DavidKreitzer added a comment to D20003: X86CallFrameOpt: a first step towards optimizing inalloca calls (PR27076).

The connection I saw between removing the _chkstk calls and this transformation is that the pushes will touch the stack in a safe order (starting at %esp, which should be safe, and progressing downwards), whereas the original stores might be in an order that starts by touching an address beyond the allocated stack.

May 9 2016, 8:45 AM
DavidKreitzer added a comment to D17289: [X86] Fix False Data Dependency in popcnt.

Thanks for the comments, Steven! We are still working on fixing the popcnt false dependence problem, but we are planning to abandon this patch.

May 9 2016, 7:11 AM

May 6 2016

DavidKreitzer added a comment to D20003: X86CallFrameOpt: a first step towards optimizing inalloca calls (PR27076).

Hi Hans,

May 6 2016, 8:34 AM

May 4 2016

DavidKreitzer accepted D19261: X86 _comi_ intrinsics - Fixed lowering.

Thanks, Elena. LGTM.

May 4 2016, 8:19 AM

May 2 2016

DavidKreitzer added a comment to D18046: [X86] Providing correct unwind info in function epilogue.

I think we want to make sure that we move in a direction that makes it easier to do optimizations that affect the CFI between X86FrameLowering and this late pass. For example, we cannot schedule the pushes generated by the X86CallFrameOptimization pass without moving the CFI along with the push. So we generate very poor code in cases like this where the push operands get in the way of outgoing inreg arguments:

May 2 2016, 3:41 PM
DavidKreitzer added a comment to D19261: X86 _comi_ intrinsics - Fixed lowering.

Hi Elena,

May 2 2016, 7:36 AM

Apr 29 2016

DavidKreitzer added inline comments to D19688: Fixes PR27241 by enabling the X86 call frame optimization for 64-bit targets.
Apr 29 2016, 7:45 AM
DavidKreitzer updated the diff for D19688: Fixes PR27241 by enabling the X86 call frame optimization for 64-bit targets.

Thanks for the reviews, Reid and Hans!

Apr 29 2016, 7:42 AM

Apr 28 2016

DavidKreitzer added inline comments to D19688: Fixes PR27241 by enabling the X86 call frame optimization for 64-bit targets.
Apr 28 2016, 2:11 PM
DavidKreitzer retitled D19688: Fixes PR27241 by enabling the X86 call frame optimization for 64-bit targets from to Fixes PR27241 by enabling the X86 call frame optimization for 64-bit targets.
Apr 28 2016, 2:09 PM

Apr 27 2016

DavidKreitzer added a comment to D19261: X86 _comi_ intrinsics - Fixed lowering.

Hi Elena,

Apr 27 2016, 1:02 PM
DavidKreitzer added a comment to D19592: [X86]: Quit promoting 16 bit loads to 32 bit..

LGTM too, Kevin.

Apr 27 2016, 12:32 PM

Apr 26 2016

DavidKreitzer accepted D19439: Optimization bisect support in X86-specific passes.

Thanks for the fixes, Andy.

Apr 26 2016, 1:55 PM
DavidKreitzer added a comment to D19439: Optimization bisect support in X86-specific passes.

My comments about vzeroupper make me wonder whether we want skipFunction to be able to make the distinction between skipping a pass for OptBisect and skipping a pass for -O0. I can certainly imagine wanting to run some functionally optional "optimization" passes at -O0, e.g. a pass that can improve the size/performance of the generated code w/o negatively affecting debuggability.

Apr 26 2016, 9:44 AM