[PowerPC] fix the PowerPC cases, NFC

[shchenz]

Summary

Fix the broken cases in D152215.

For case test/CodeGen/PowerPC/aix-lower-jump-table.ll, the original case checks the jump table in the TOC region. update_llc_test_checks seems can not generate these assembly codes?

[qiucf]

SMALL-ASM, LARGE-ASM and FUNC-ASM has conflicting outputs so the script cannot handle:

# FUNC-ASM
# 32-bit
lwz 4, L..C0(2)                         # %jump-table.0
slwi 3, 3, 2
lwzx 3, 3, 4

# 64-bit
ld 4, L..C0(2)                          # %jump-table.0
rldic 3, 3, 2, 30
lwax 3, 3, 4

Besides, update llc script uses r'^[_.]?(?P=func):(?:[ \t]*#+[ \t]*@"?(?P=func)"?)?\n' regex to match func: label in PPC asm, while the jump_table function here does not have such label. I doubt whether removing this check would cause regression in other cases. So I'd prefer keep cases here as manual.

[shchenz]

In D159052#4627784, @qiucf wrote:

SMALL-ASM, LARGE-ASM and FUNC-ASM has conflicting outputs so the script cannot handle:

# FUNC-ASM
# 32-bit
lwz 4, L..C0(2)                         # %jump-table.0
slwi 3, 3, 2
lwzx 3, 3, 4

# 64-bit
ld 4, L..C0(2)                          # %jump-table.0
rldic 3, 3, 2, 30
lwax 3, 3, 4

Besides, update llc script uses r'^[_.]?(?P=func):(?:[ \t]*#+[ \t]*@"?(?P=func)"?)?\n' regex to match func: label in PPC asm, while the jump_table function here does not have such label. I doubt whether removing this check would cause regression in other cases. So I'd prefer keep cases here as manual.

Thanks for looking into the script @qiucf .
Except for the instruction conflcit, for SMALL-ASM, LARGE-ASM and FUNC-ASM, not sure the script can generate below checks:

; FUNC-ASM: L..JTI0_0:
; FUNC-ASM:         .vbyte  4, L..BB0_2-L..JTI0_0
; FUNC-ASM:         .vbyte  4, L..BB0_4-L..JTI0_0
; FUNC-ASM:         .vbyte  4, L..BB0_5-L..JTI0_0
; FUNC-ASM:         .vbyte  4, L..BB0_6-L..JTI0_0

; SMALL-ASM: .toc
; SMALL-ASM: .tc L..JTI0_0[TC],L..JTI0_0

; LARGE-ASM: .toc
; LARGE-ASM: .tc L..JTI0_0[TE],L..JTI0_0

These assembly codes are the testing points for the test.

llvm/test/CodeGen/PowerPC/aix-lower-jump-table-mir.ll

+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN: -ppc-min-jump-table-entries=4 -code-model=small -stop-after=machine-cp < %s | FileCheck \
+; RUN: --check-prefix=32SMALL-MIR %s
+
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN: -ppc-min-jump-table-entries=4 -code-model=large -stop-after=machine-cp < %s | FileCheck \
+; RUN: --check-prefix=32LARGE-MIR %s
+
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
+; RUN: -ppc-min-jump-table-entries=4 -code-model=small -stop-after=machine-cp < %s | FileCheck \
+; RUN: --check-prefix=64SMALL-MIR %s
+
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
+; RUN: -ppc-min-jump-table-entries=4 -code-model=large -stop-after=machine-cp < %s | FileCheck \
+; RUN: --check-prefix=64LARGE-MIR %s
+
+define i32 @jump_table(i32 %a) {
+  ; 32SMALL-MIR-LABEL: name: jump_table
+  ; 32SMALL-MIR: bb.0.entry:
+  ; 32SMALL-MIR-NEXT:   successors: %bb.6(0x19999998), %bb.1(0x66666668)
+  ; 32SMALL-MIR-NEXT:   liveins: $r3
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT:   renamable $r3 = ADDI killed renamable $r3, -1
+  ; 32SMALL-MIR-NEXT:   renamable $cr0 = CMPLWI renamable $r3, 3
+  ; 32SMALL-MIR-NEXT:   BCC 44, killed renamable $cr0, %bb.6
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT: bb.1.entry:
+  ; 32SMALL-MIR-NEXT:   successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
+  ; 32SMALL-MIR-NEXT:   liveins: $r3
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT:   renamable $r4 = LWZtoc %jump-table.0, $r2 :: (load (s32) from got)
+  ; 32SMALL-MIR-NEXT:   renamable $r3 = RLWINM killed renamable $r3, 2, 0, 29
+  ; 32SMALL-MIR-NEXT:   renamable $r3 = LWZX killed renamable $r3, renamable $r4 :: (load (s32) from jump-table)
+  ; 32SMALL-MIR-NEXT:   renamable $r3 = ADD4 killed renamable $r3, killed renamable $r4
+  ; 32SMALL-MIR-NEXT:   MTCTR killed renamable $r3, implicit-def $ctr
+  ; 32SMALL-MIR-NEXT:   BCTR implicit $ctr
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT: bb.2.sw.bb:
+  ; 32SMALL-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 32SMALL-MIR-NEXT:   B %bb.6
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT: bb.3.sw.bb1:
+  ; 32SMALL-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 32SMALL-MIR-NEXT:   B %bb.6
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT: bb.4.sw.bb2:
+  ; 32SMALL-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 32SMALL-MIR-NEXT:   B %bb.6
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT: bb.5.sw.bb3:
+  ; 32SMALL-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 32SMALL-MIR-NEXT: {{  $}}
+  ; 32SMALL-MIR-NEXT: bb.6.sw.epilog:
+  ; 32SMALL-MIR-NEXT:   $r3 = LI 0
+  ; 32SMALL-MIR-NEXT:   BLR implicit $lr, implicit $rm, implicit $r3
+  ;
+  ; 32LARGE-MIR-LABEL: name: jump_table
+  ; 32LARGE-MIR: bb.0.entry:
+  ; 32LARGE-MIR-NEXT:   successors: %bb.6(0x19999998), %bb.1(0x66666668)
+  ; 32LARGE-MIR-NEXT:   liveins: $r3
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT:   renamable $r3 = ADDI killed renamable $r3, -1
+  ; 32LARGE-MIR-NEXT:   renamable $cr0 = CMPLWI renamable $r3, 3
+  ; 32LARGE-MIR-NEXT:   BCC 44, killed renamable $cr0, %bb.6
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT: bb.1.entry:
+  ; 32LARGE-MIR-NEXT:   successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
+  ; 32LARGE-MIR-NEXT:   liveins: $r3
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT:   renamable $r4 = ADDIStocHA $r2, %jump-table.0
+  ; 32LARGE-MIR-NEXT:   renamable $r4 = LWZtocL %jump-table.0, killed renamable $r4, implicit $r2 :: (load (s32) from got)
+  ; 32LARGE-MIR-NEXT:   renamable $r3 = RLWINM killed renamable $r3, 2, 0, 29
+  ; 32LARGE-MIR-NEXT:   renamable $r3 = LWZX killed renamable $r3, renamable $r4 :: (load (s32) from jump-table)
+  ; 32LARGE-MIR-NEXT:   renamable $r3 = ADD4 killed renamable $r3, killed renamable $r4
+  ; 32LARGE-MIR-NEXT:   MTCTR killed renamable $r3, implicit-def $ctr
+  ; 32LARGE-MIR-NEXT:   BCTR implicit $ctr
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT: bb.2.sw.bb:
+  ; 32LARGE-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 32LARGE-MIR-NEXT:   B %bb.6
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT: bb.3.sw.bb1:
+  ; 32LARGE-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 32LARGE-MIR-NEXT:   B %bb.6
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT: bb.4.sw.bb2:
+  ; 32LARGE-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 32LARGE-MIR-NEXT:   B %bb.6
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT: bb.5.sw.bb3:
+  ; 32LARGE-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 32LARGE-MIR-NEXT: {{  $}}
+  ; 32LARGE-MIR-NEXT: bb.6.sw.epilog:
+  ; 32LARGE-MIR-NEXT:   $r3 = LI 0
+  ; 32LARGE-MIR-NEXT:   BLR implicit $lr, implicit $rm, implicit $r3
+  ;
+  ; 64SMALL-MIR-LABEL: name: jump_table
+  ; 64SMALL-MIR: bb.0.entry:
+  ; 64SMALL-MIR-NEXT:   successors: %bb.6(0x19999998), %bb.1(0x66666668)
+  ; 64SMALL-MIR-NEXT:   liveins: $x3
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT:   renamable $r3 = ADDI renamable $r3, -1, implicit killed $x3, implicit-def $x3
+  ; 64SMALL-MIR-NEXT:   renamable $cr0 = CMPLWI renamable $r3, 3
+  ; 64SMALL-MIR-NEXT:   BCC 44, killed renamable $cr0, %bb.6
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT: bb.1.entry:
+  ; 64SMALL-MIR-NEXT:   successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
+  ; 64SMALL-MIR-NEXT:   liveins: $x3
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT:   renamable $x4 = LDtocJTI %jump-table.0, $x2 :: (load (s64) from got)
+  ; 64SMALL-MIR-NEXT:   renamable $x3 = RLDIC killed renamable $x3, 2, 30
+  ; 64SMALL-MIR-NEXT:   renamable $x3 = LWAX killed renamable $x3, renamable $x4 :: (load (s32) from jump-table)
+  ; 64SMALL-MIR-NEXT:   renamable $x3 = ADD8 killed renamable $x3, killed renamable $x4
+  ; 64SMALL-MIR-NEXT:   MTCTR8 killed renamable $x3, implicit-def $ctr8
+  ; 64SMALL-MIR-NEXT:   BCTR8 implicit $ctr8
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT: bb.2.sw.bb:
+  ; 64SMALL-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 64SMALL-MIR-NEXT:   B %bb.6
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT: bb.3.sw.bb1:
+  ; 64SMALL-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 64SMALL-MIR-NEXT:   B %bb.6
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT: bb.4.sw.bb2:
+  ; 64SMALL-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 64SMALL-MIR-NEXT:   B %bb.6
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT: bb.5.sw.bb3:
+  ; 64SMALL-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 64SMALL-MIR-NEXT: {{  $}}
+  ; 64SMALL-MIR-NEXT: bb.6.sw.epilog:
+  ; 64SMALL-MIR-NEXT:   $x3 = LI8 0
+  ; 64SMALL-MIR-NEXT:   BLR8 implicit $lr8, implicit $rm, implicit $x3
+  ;
+  ; 64LARGE-MIR-LABEL: name: jump_table
+  ; 64LARGE-MIR: bb.0.entry:
+  ; 64LARGE-MIR-NEXT:   successors: %bb.6(0x19999998), %bb.1(0x66666668)
+  ; 64LARGE-MIR-NEXT:   liveins: $x3
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT:   renamable $r3 = ADDI renamable $r3, -1, implicit killed $x3, implicit-def $x3
+  ; 64LARGE-MIR-NEXT:   renamable $cr0 = CMPLWI renamable $r3, 3
+  ; 64LARGE-MIR-NEXT:   BCC 44, killed renamable $cr0, %bb.6
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT: bb.1.entry:
+  ; 64LARGE-MIR-NEXT:   successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
+  ; 64LARGE-MIR-NEXT:   liveins: $x3
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT:   renamable $x4 = ADDIStocHA8 $x2, %jump-table.0
+  ; 64LARGE-MIR-NEXT:   renamable $x4 = LDtocL %jump-table.0, killed renamable $x4, implicit $x2 :: (load (s64) from got)
+  ; 64LARGE-MIR-NEXT:   renamable $x3 = RLDIC killed renamable $x3, 2, 30
+  ; 64LARGE-MIR-NEXT:   renamable $x3 = LWAX killed renamable $x3, renamable $x4 :: (load (s32) from jump-table)
+  ; 64LARGE-MIR-NEXT:   renamable $x3 = ADD8 killed renamable $x3, killed renamable $x4
+  ; 64LARGE-MIR-NEXT:   MTCTR8 killed renamable $x3, implicit-def $ctr8
+  ; 64LARGE-MIR-NEXT:   BCTR8 implicit $ctr8
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT: bb.2.sw.bb:
+  ; 64LARGE-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 64LARGE-MIR-NEXT:   B %bb.6
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT: bb.3.sw.bb1:
+  ; 64LARGE-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 64LARGE-MIR-NEXT:   B %bb.6
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT: bb.4.sw.bb2:
+  ; 64LARGE-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 64LARGE-MIR-NEXT:   B %bb.6
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT: bb.5.sw.bb3:
+  ; 64LARGE-MIR-NEXT:   successors: %bb.6(0x80000000)
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT:   INLINEASM &"", 1 /* sideeffect attdialect */
+  ; 64LARGE-MIR-NEXT: {{  $}}
+  ; 64LARGE-MIR-NEXT: bb.6.sw.epilog:
+  ; 64LARGE-MIR-NEXT:   $x3 = LI8 0
+  ; 64LARGE-MIR-NEXT:   BLR8 implicit $lr8, implicit $rm, implicit $x3
+entry:
+  switch i32 %a, label %sw.epilog [
+    i32 1, label %sw.bb
+    i32 2, label %sw.bb1
+    i32 3, label %sw.bb2
+    i32 4, label %sw.bb3
+  ]
+
+sw.bb:
+  tail call void asm sideeffect "", ""()
+  br label %sw.epilog
+
+sw.bb1:
+  tail call void asm sideeffect "", ""()
+  br label %sw.epilog
+
+sw.bb2:
+  tail call void asm sideeffect "", ""()
+  br label %sw.epilog
+
+sw.bb3:
+  tail call void asm sideeffect "", ""()
+  br label %sw.epilog
+
+sw.epilog:
+  ret i32 0
+}

llvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll

-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
-; RUN: -ppc-min-jump-table-entries=4 -code-model=small -stop-after=machine-cp < %s | FileCheck \
-; RUN: --check-prefix=32SMALL-MIR %s
-
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
-; RUN: -ppc-min-jump-table-entries=4 -code-model=large -stop-after=machine-cp < %s | FileCheck \
-; RUN: --check-prefix=32LARGE-MIR %s
-
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
-; RUN: -ppc-min-jump-table-entries=4 -code-model=small -stop-after=machine-cp < %s | FileCheck \
-; RUN: --check-prefix=64SMALL-MIR %s
-
-; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
-; RUN: -ppc-min-jump-table-entries=4 -code-model=large -stop-after=machine-cp < %s | FileCheck \
-; RUN: --check-prefix=64LARGE-MIR %s
-
 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -ppc-min-jump-table-entries=4 -code-model=small < %s | FileCheck \
 ; RUN: --check-prefixes=32SMALL-ASM,SMALL-ASM %s
 
 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -ppc-min-jump-table-entries=4 -code-model=large < %s | FileCheck \
 ; RUN: --check-prefixes=32LARGE-ASM,LARGE-ASM %s
 
 ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -ppc-min-jump-table-entries=4 -code-model=small < %s | FileCheck \
 ; RUN: --check-prefixes=64SMALL-ASM,SMALL-ASM %s
 
 ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -ppc-min-jump-table-entries=4 -code-model=large < %s | FileCheck \
 ; RUN: --check-prefixes=64LARGE-ASM,LARGE-ASM %s
 
 ; RUN: llc -mtriple powerpc-ibm-aix-xcoff -ppc-min-jump-table-entries=4 -function-sections < %s | FileCheck \
 ; RUN: --check-prefix=FUNC-ASM %s
 
 ; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -ppc-min-jump-table-entries=4 -function-sections < %s | FileCheck \
 ; RUN: --check-prefix=FUNC-ASM %s
 
 define i32 @jump_table(i32 %a) {
-; 32SMALL-ASM-LABEL: jump_table:
-; 32SMALL-ASM:       # %bb.0: # %entry
-; 32SMALL-ASM-NEXT:    addi 3, 3, -1
-; 32SMALL-ASM-NEXT:    cmplwi 3, 3
-; 32SMALL-ASM-NEXT:    bgt 0, L..BB0_3
-; 32SMALL-ASM-NEXT:  # %bb.1: # %entry
-; 32SMALL-ASM-NEXT:    lwz 4, L..C0(2) # %jump-table.0
-; 32SMALL-ASM-NEXT:    slwi 3, 3, 2
-; 32SMALL-ASM-NEXT:    lwzx 3, 3, 4
-; 32SMALL-ASM-NEXT:    add 3, 3, 4
-; 32SMALL-ASM-NEXT:    mtctr 3
-; 32SMALL-ASM-NEXT:    bctr
-; 32SMALL-ASM-NEXT:  L..BB0_2: # %sw.bb
-; 32SMALL-ASM-NEXT:    #APP
-; 32SMALL-ASM-NEXT:    #NO_APP
-; 32SMALL-ASM-NEXT:  L..BB0_3: # %sw.epilog
-; 32SMALL-ASM-NEXT:    li 3, 0
-; 32SMALL-ASM-NEXT:    blr
-; 32SMALL-ASM-NEXT:  L..BB0_4: # %sw.bb1
-; 32SMALL-ASM-NEXT:    li 3, 0
-; 32SMALL-ASM-NEXT:    #APP
-; 32SMALL-ASM-NEXT:    #NO_APP
-; 32SMALL-ASM-NEXT:    blr
-; 32SMALL-ASM-NEXT:  L..BB0_5: # %sw.bb2
-; 32SMALL-ASM-NEXT:    li 3, 0
-; 32SMALL-ASM-NEXT:    #APP
-; 32SMALL-ASM-NEXT:    #NO_APP
-; 32SMALL-ASM-NEXT:    blr
-; 32SMALL-ASM-NEXT:  L..BB0_6: # %sw.bb3
-; 32SMALL-ASM-NEXT:    li 3, 0
-; 32SMALL-ASM-NEXT:    #APP
-; 32SMALL-ASM-NEXT:    #NO_APP
-; 32SMALL-ASM-NEXT:    blr
-;
-; 32LARGE-ASM-LABEL: jump_table:
-; 32LARGE-ASM:       # %bb.0: # %entry
-; 32LARGE-ASM-NEXT:    addi 3, 3, -1
-; 32LARGE-ASM-NEXT:    cmplwi 3, 3
-; 32LARGE-ASM-NEXT:    bgt 0, L..BB0_3
-; 32LARGE-ASM-NEXT:  # %bb.1: # %entry
-; 32LARGE-ASM-NEXT:    addis 4, L..C0@u(2)
-; 32LARGE-ASM-NEXT:    slwi 3, 3, 2
-; 32LARGE-ASM-NEXT:    lwz 4, L..C0@l(4)
-; 32LARGE-ASM-NEXT:    lwzx 3, 3, 4
-; 32LARGE-ASM-NEXT:    add 3, 3, 4
-; 32LARGE-ASM-NEXT:    mtctr 3
-; 32LARGE-ASM-NEXT:    bctr
-; 32LARGE-ASM-NEXT:  L..BB0_2: # %sw.bb
-; 32LARGE-ASM-NEXT:    #APP
-; 32LARGE-ASM-NEXT:    #NO_APP
-; 32LARGE-ASM-NEXT:  L..BB0_3: # %sw.epilog
-; 32LARGE-ASM-NEXT:    li 3, 0
-; 32LARGE-ASM-NEXT:    blr
-; 32LARGE-ASM-NEXT:  L..BB0_4: # %sw.bb1
-; 32LARGE-ASM-NEXT:    li 3, 0
-; 32LARGE-ASM-NEXT:    #APP
-; 32LARGE-ASM-NEXT:    #NO_APP
-; 32LARGE-ASM-NEXT:    blr
-; 32LARGE-ASM-NEXT:  L..BB0_5: # %sw.bb2
-; 32LARGE-ASM-NEXT:    li 3, 0
-; 32LARGE-ASM-NEXT:    #APP
-; 32LARGE-ASM-NEXT:    #NO_APP
-; 32LARGE-ASM-NEXT:    blr
-; 32LARGE-ASM-NEXT:  L..BB0_6: # %sw.bb3
-; 32LARGE-ASM-NEXT:    li 3, 0
-; 32LARGE-ASM-NEXT:    #APP
-; 32LARGE-ASM-NEXT:    #NO_APP
-; 32LARGE-ASM-NEXT:    blr
-;
-; 64SMALL-ASM-LABEL: jump_table:
-; 64SMALL-ASM:       # %bb.0: # %entry
-; 64SMALL-ASM-NEXT:    addi 3, 3, -1
-; 64SMALL-ASM-NEXT:    cmplwi 3, 3
-; 64SMALL-ASM-NEXT:    bgt 0, L..BB0_3
-; 64SMALL-ASM-NEXT:  # %bb.1: # %entry
-; 64SMALL-ASM-NEXT:    ld 4, L..C0(2) # %jump-table.0
-; 64SMALL-ASM-NEXT:    rldic 3, 3, 2, 30
-; 64SMALL-ASM-NEXT:    lwax 3, 3, 4
-; 64SMALL-ASM-NEXT:    add 3, 3, 4
-; 64SMALL-ASM-NEXT:    mtctr 3
-; 64SMALL-ASM-NEXT:    bctr
-; 64SMALL-ASM-NEXT:  L..BB0_2: # %sw.bb
-; 64SMALL-ASM-NEXT:    #APP
-; 64SMALL-ASM-NEXT:    #NO_APP
-; 64SMALL-ASM-NEXT:  L..BB0_3: # %sw.epilog
-; 64SMALL-ASM-NEXT:    li 3, 0
-; 64SMALL-ASM-NEXT:    blr
-; 64SMALL-ASM-NEXT:  L..BB0_4: # %sw.bb1
-; 64SMALL-ASM-NEXT:    li 3, 0
-; 64SMALL-ASM-NEXT:    #APP
-; 64SMALL-ASM-NEXT:    #NO_APP
-; 64SMALL-ASM-NEXT:    blr
-; 64SMALL-ASM-NEXT:  L..BB0_5: # %sw.bb2
-; 64SMALL-ASM-NEXT:    li 3, 0
-; 64SMALL-ASM-NEXT:    #APP
-; 64SMALL-ASM-NEXT:    #NO_APP
-; 64SMALL-ASM-NEXT:    blr
-; 64SMALL-ASM-NEXT:  L..BB0_6: # %sw.bb3
-; 64SMALL-ASM-NEXT:    li 3, 0
-; 64SMALL-ASM-NEXT:    #APP
-; 64SMALL-ASM-NEXT:    #NO_APP
-; 64SMALL-ASM-NEXT:    blr
-;
-; 64LARGE-ASM-LABEL: jump_table:
-; 64LARGE-ASM:       # %bb.0: # %entry
-; 64LARGE-ASM-NEXT:    addi 3, 3, -1
-; 64LARGE-ASM-NEXT:    cmplwi 3, 3
-; 64LARGE-ASM-NEXT:    bgt 0, L..BB0_3
-; 64LARGE-ASM-NEXT:  # %bb.1: # %entry
-; 64LARGE-ASM-NEXT:    addis 4, L..C0@u(2)
-; 64LARGE-ASM-NEXT:    rldic 3, 3, 2, 30
-; 64LARGE-ASM-NEXT:    ld 4, L..C0@l(4)
-; 64LARGE-ASM-NEXT:    lwax 3, 3, 4
-; 64LARGE-ASM-NEXT:    add 3, 3, 4
-; 64LARGE-ASM-NEXT:    mtctr 3
-; 64LARGE-ASM-NEXT:    bctr
-; 64LARGE-ASM-NEXT:  L..BB0_2: # %sw.bb
-; 64LARGE-ASM-NEXT:    #APP
-; 64LARGE-ASM-NEXT:    #NO_APP
-; 64LARGE-ASM-NEXT:  L..BB0_3: # %sw.epilog
-; 64LARGE-ASM-NEXT:    li 3, 0
-; 64LARGE-ASM-NEXT:    blr
-; 64LARGE-ASM-NEXT:  L..BB0_4: # %sw.bb1
-; 64LARGE-ASM-NEXT:    li 3, 0
-; 64LARGE-ASM-NEXT:    #APP
-; 64LARGE-ASM-NEXT:    #NO_APP
-; 64LARGE-ASM-NEXT:    blr
-; 64LARGE-ASM-NEXT:  L..BB0_5: # %sw.bb2
-; 64LARGE-ASM-NEXT:    li 3, 0
-; 64LARGE-ASM-NEXT:    #APP
-; 64LARGE-ASM-NEXT:    #NO_APP
-; 64LARGE-ASM-NEXT:    blr
-; 64LARGE-ASM-NEXT:  L..BB0_6: # %sw.bb3
-; 64LARGE-ASM-NEXT:    li 3, 0
-; 64LARGE-ASM-NEXT:    #APP
-; 64LARGE-ASM-NEXT:    #NO_APP
-; 64LARGE-ASM-NEXT:    blr
 entry:
   switch i32 %a, label %sw.epilog [
     i32 1, label %sw.bb
     i32 2, label %sw.bb1
     i32 3, label %sw.bb2
     i32 4, label %sw.bb3
   ]
 

 
 sw.bb3:
   tail call void asm sideeffect "", ""()
   br label %sw.epilog
 
 sw.epilog:
   ret i32 0
 }
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; 32LARGE-MIR: {{.*}}
-; 32SMALL-MIR: {{.*}}
-; 64LARGE-MIR: {{.*}}
-; 64SMALL-MIR: {{.*}}
-; FUNC-ASM: {{.*}}
-; LARGE-ASM: {{.*}}
-; SMALL-ASM: {{.*}}
+; 32SMALL-ASM-LABEL: jump_table
+; 32SMALL-ASM: .jump_table:
+; 32SMALL-ASM:      addi 3, 3, -1
+; 32SMALL-ASM:      cmplwi 3, 3
+; 32SMALL-ASM:      bgt 0, L..BB0_3
+; 32SMALL-ASM:      lwz 4, L..C0(2)
+; 32SMALL-ASM:      slwi 3, 3, 2
+; 32SMALL-ASM:      lwzx 3, 3, 4
+; 32SMALL-ASM:      add 3, 3, 4
+; 32SMALL-ASM:      mtctr 3
+; 32SMALL-ASM:      bctr
+; 32SMALL-ASM: L..BB0_2:
+; 32SMALL-ASM: L..BB0_3:
+; 32SMALL-ASM: L..BB0_4:
+; 32SMALL-ASM: L..BB0_5:
+; 32SMALL-ASM: L..BB0_6:
+; 32SMALL-ASM:      li 3, 0
+; 32SMALL-ASM:      blr
+; 32SMALL-ASM:      .csect .rodata[RO],2
+; 32SMALL-ASM:      .align  2
+; 32SMALL-ASM: L..JTI0_0:
+; 32SMALL-ASM:      .vbyte  4, L..BB0_2-L..JTI0_0
+; 32SMALL-ASM:      .vbyte  4, L..BB0_4-L..JTI0_0
+; 32SMALL-ASM:      .vbyte  4, L..BB0_5-L..JTI0_0
+; 32SMALL-ASM:      .vbyte  4, L..BB0_6-L..JTI0_0
+
+; 32LARGE-ASM-LABEL: jump_table
+; 32LARGE-ASM: .jump_table:
+; 32LARGE-ASM:      addi 3, 3, -1
+; 32LARGE-ASM:      cmplwi  3, 3
+; 32LARGE-ASM:      bgt     0, L..BB0_3
+; 32LARGE-ASM:      addis 4, L..C0@u(2)
+; 32LARGE-ASM:      slwi 3, 3, 2
+; 32LARGE-ASM:      lwz 4, L..C0@l(4)
+; 32LARGE-ASM:      lwzx 3, 3, 4
+; 32LARGE-ASM:      add 3, 3, 4
+; 32LARGE-ASM:      mtctr 3
+; 32LARGE-ASM:      bctr
+; 32LARGE-ASM: L..BB0_2:
+; 32LARGE-ASM: L..BB0_3:
+; 32LARGE-ASM: L..BB0_4:
+; 32LARGE-ASM: L..BB0_5:
+; 32LARGE-ASM: L..BB0_6:
+; 32LARGE-ASM:      li 3, 0
+; 32LARGE-ASM:      blr
+; 32LARGE-ASM:      .csect .rodata[RO],2
+; 32LARGE-ASM:      .align  2
+; 32LARGE-ASM: L..JTI0_0:
+; 32LARGE-ASM:      .vbyte  4, L..BB0_2-L..JTI0_0
+; 32LARGE-ASM:      .vbyte  4, L..BB0_4-L..JTI0_0
+; 32LARGE-ASM:      .vbyte  4, L..BB0_5-L..JTI0_0
+; 32LARGE-ASM:      .vbyte  4, L..BB0_6-L..JTI0_0
+
+; 64SMALL-ASM-LABEL: jump_table
+; 64SMALL-ASM: .jump_table:
+; 64SMALL-ASM:      addi 3, 3, -1
+; 64SMALL-ASM:      cmplwi  3, 3
+; 64SMALL-ASM:      bgt     0, L..BB0_3
+; 64SMALL-ASM:      ld 4, L..C0(2)
+; 64SMALL-ASM:      rldic 3, 3, 2, 30
+; 64SMALL-ASM:      lwax 3, 3, 4
+; 64SMALL-ASM:      add 3, 3, 4
+; 64SMALL-ASM:      mtctr 3
+; 64SMALL-ASM:      bctr
+; 64SMALL-ASM: L..BB0_2:
+; 64SMALL-ASM: L..BB0_3:
+; 64SMALL-ASM: L..BB0_4:
+; 64SMALL-ASM: L..BB0_5:
+; 64SMALL-ASM: L..BB0_6:
+; 64SMALL-ASM:      li 3, 0
+; 64SMALL-ASM:      blr
+; 64SMALL-ASM:      .csect .rodata[RO],2
+; 64SMALL-ASM:      .align  2
+; 64SMALL-ASM: L..JTI0_0:
+; 64SMALL-ASM:      .vbyte  4, L..BB0_2-L..JTI0_0
+; 64SMALL-ASM:      .vbyte  4, L..BB0_4-L..JTI0_0
+; 64SMALL-ASM:      .vbyte  4, L..BB0_5-L..JTI0_0
+; 64SMALL-ASM:      .vbyte  4, L..BB0_6-L..JTI0_0
+
+; 64LARGE-ASM-LABEL: jump_table
+; 64LARGE-ASM: .jump_table:
+; 64LARGE-ASM:      addi 3, 3, -1
+; 64LARGE-ASM:      cmplwi  3, 3
+; 64LARGE-ASM:      bgt     0, L..BB0_3
+; 64LARGE-ASM:      addis 4, L..C0@u(2)
+; 64LARGE-ASM:      rldic 3, 3, 2, 30
+; 64LARGE-ASM:      ld 4, L..C0@l(4)
+; 64LARGE-ASM:      lwax 3, 3, 4
+; 64LARGE-ASM:      add 3, 3, 4
+; 64LARGE-ASM:      mtctr 3
+; 64LARGE-ASM:      bctr
+; 64LARGE-ASM: L..BB0_2:
+; 64LARGE-ASM: L..BB0_3:
+; 64LARGE-ASM: L..BB0_4:
+; 64LARGE-ASM: L..BB0_5:
+; 64LARGE-ASM: L..BB0_6:
+; 64LARGE-ASM:      li 3, 0
+; 64LARGE-ASM:      blr
+; 64LARGE-ASM:      .csect .rodata[RO],2
+; 64LARGE-ASM:      .align  2
+; 64LARGE-ASM: L..JTI0_0:
+; 64LARGE-ASM:      .vbyte  4, L..BB0_2-L..JTI0_0
+; 64LARGE-ASM:      .vbyte  4, L..BB0_4-L..JTI0_0
+; 64LARGE-ASM:      .vbyte  4, L..BB0_5-L..JTI0_0
+; 64LARGE-ASM:      .vbyte  4, L..BB0_6-L..JTI0_0
+
+; FUNC-ASM:         .csect .jump_table[PR],5
+; FUNC-ASM: L..BB0_2:
+; FUNC-ASM: L..BB0_3:
+; FUNC-ASM: L..BB0_4:
+; FUNC-ASM: L..BB0_5:
+; FUNC-ASM: L..BB0_6:
+; FUNC-ASM:         li 3, 0
+; FUNC-ASM:         blr
+; FUNC-ASM:         .csect .rodata.jmp..jump_table[RO],2
+; FUNC-ASM:         .align  2
+; FUNC-ASM: L..JTI0_0:
+; FUNC-ASM:         .vbyte  4, L..BB0_2-L..JTI0_0
+; FUNC-ASM:         .vbyte  4, L..BB0_4-L..JTI0_0
+; FUNC-ASM:         .vbyte  4, L..BB0_5-L..JTI0_0
+; FUNC-ASM:         .vbyte  4, L..BB0_6-L..JTI0_0
+
+; SMALL-ASM: .toc
+; SMALL-ASM: .tc L..JTI0_0[TC],L..JTI0_0
+
+; LARGE-ASM: .toc
+; LARGE-ASM: .tc L..JTI0_0[TE],L..JTI0_0

llvm/test/CodeGen/PowerPC/licm-tocReg.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck -check-prefixes=CHECK,CHECKLX %s
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECK,CHECKAIX %s
-; RUN: llc -verify-machineinstrs -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECK,CHECKAIX32 %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck -check-prefixes=CHECKLX %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck -check-prefixes=CHECKAIX32 %s
 
 ; The instructions ADDIStocHA8/LDtocL are used to calculate the address of
 ; globals. The ones that are in bb.3.if.end could not be hoisted by Machine
 ; LICM due to BCTRL_LDinto_toc in bb2.if.then.  This call causes the compiler
 ; to insert a save TOC to stack before the call and load into X2 to restore TOC
 ; after. By communicating to Machine LICM that X2 is guaranteed to have the
 ; same value before and after BCTRL_LDinto_toc, these instructions can be
 ; hoisted out of bb.3.if.end to outside of the loop.
if.end:                                           ; preds = %entry, %if.end
   %inc = add nsw i32 %3, 1
   store volatile i32 %inc, ptr @ga, align 4
   %4 = load volatile i32, ptr @ga, align 4
   %5 = load volatile i32, ptr @gb, align 4
   %cmp = icmp sgt i32 %4, %5
   %6 = load volatile i32, ptr @ga, align 4
   br i1 %cmp, label %if.then, label %if.end
 }
-;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-; CHECK: {{.*}}