[Target] Fix typo in comments

[Eymay]

Thanks @mpaszkowski. Can you land this patch for me?
Please use “Eymen Ünay [e-mail]" to commit the change.

llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

case Intrinsic::aarch64_mops_memset_tag: {
 
     Register DstDef = I.getOperand(0).getReg();
     // I.getOperand(1) is the intrinsic function
     Register DstUse = I.getOperand(2).getReg();
     Register ValUse = I.getOperand(3).getReg();
     Register SizeUse = I.getOperand(4).getReg();
 
     // MOPSMemorySetTaggingPseudo has two defs; the intrinsic call has only one.
-    // Therefore an additional virtual register is requried for the updated size
+    // Therefore an additional virtual register is required for the updated size
     // operand. This value is not accessible via the semantics of the intrinsic.
     Register SizeDef = MRI.createGenericVirtualRegister(LLT::scalar(64));
 
     auto Memset = MIB.buildInstr(AArch64::MOPSMemorySetTaggingPseudo,
                                  {DstDef, SizeDef}, {DstUse, SizeUse, ValUse});
     Memset.cloneMemRefs(I);
     constrainSelectedInstRegOperands(*Memset, TII, TRI, RBI);
     break;

llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp

static bool generateGroupInst(const SPIRV::IncomingCall *Call,
   // Build select instruction.
   if (HasBoolReturnTy)
     buildSelectInst(MIRBuilder, Call->ReturnRegister, GroupResultRegister,
                     Call->ReturnType, GR);
   return true;
 }
 
 // These queries ask for a single size_t result for a given dimension index, e.g
-// size_t get_global_id(uint dimindex). In SPIR-V, the builtins corresonding to
+// size_t get_global_id(uint dimindex). In SPIR-V, the builtins corresponding to
 // these values are all vec3 types, so we need to extract the correct index or
 // return defaultVal (0 or 1 depending on the query). We also handle extending
 // or tuncating in case size_t does not match the expected result type's
 // bitwidth.
 //
 // For a constant index >= 3 we generate:
 //  %res = OpConstant %SizeT 0
 //

llvm/lib/Target/X86/X86ISelLowering.cpp

     // the truncation size, allowing a truncation to combine with the extend.
     unsigned Opcode = Op.getOpcode();
     if ((Opcode == ISD::ANY_EXTEND || Opcode == ISD::SIGN_EXTEND ||
          Opcode == ISD::ZERO_EXTEND) &&
         Op.getOperand(0).getScalarValueSizeInBits() <= TruncSizeInBits)
       return true;
 
     // See if this is a single use constant which can be constant folded.
-    // NOTE: We don't peek throught bitcasts here because there is currently
+    // NOTE: We don't peek through bitcasts here because there is currently
     // no support for constant folding truncate+bitcast+vector_of_constants. So
     // we'll just send up with a truncate on both operands which will
     // get turned back into (truncate (binop)) causing an infinite loop.
     return ISD::isBuildVectorOfConstantSDNodes(Op.getNode());
   };
 
   auto TruncateArithmetic = [&](SDValue N0, SDValue N1) {
     SDValue Trunc0 = DAG.getNode(ISD::TRUNCATE, DL, VT, N0);