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[mlir][llvm] Dominance violating debug intrinsic import
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Authored by Dinistro on Jun 28 2023, 8:18 AM.

Details

Summary

Debug intrinsics are allowed to violate SSA dominance and might thus
cause the LLVM import to produce invalid LLVM dialect. This commit
ensures that the debug intrinsics are emitted right after the definition
of their SSA operands.
As the position of debug intrinsics has no meaning, changing it has no
semantic implication.

Diff Detail

Event Timeline

Dinistro created this revision.Jun 28 2023, 8:18 AM
Herald added a reviewer: dcaballe. · View Herald Transcript
Herald added a project: Restricted Project. · View Herald Transcript
Dinistro requested review of this revision.Jun 28 2023, 8:18 AM
gysit added inline comments.Jun 28 2023, 9:58 AM
mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
556

Let's maybe a add:

// TODO: Implement a two pass solution that translates the debug intrinsics after the entire function as been translated.

558–559
mlir/test/Target/LLVMIR/Import/debug-info.ll
385

nit: Can you add some checks that show the intrinsic is imported right after the getelementptr?

Dinistro updated this revision to Diff 535635.Jun 28 2023, 11:25 PM
Dinistro marked 2 inline comments as done.

address reviewer comments

Dinistro marked an inline comment as done.Jun 28 2023, 11:26 PM
Dinistro added inline comments.
mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
558–559

Whups

gysit accepted this revision.Jun 28 2023, 11:27 PM

Thanks LGTM!

This revision is now accepted and ready to land.Jun 28 2023, 11:27 PM
This revision was automatically updated to reflect the committed changes.