[AMDGPU] Fix VGPR VOPD banks for src2

[rampitec]

Summary

The vdst parity is checked first, src2 shall follow regular rules.
This is actually work incorrectly rejecting valid cases.

[rampitec]

I mean really this: writing registers and reading registers have nothing in common. Banks are only relevant when you are reading them.

[rampitec]

llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s

281

But then even a manually written tests do not save against a simple miscalculation. These registers are only 2 steps apart. There are 4 banks. One must add 4 to get a bank conflict. 3+4=7, not 5. How was this test done?

[rampitec]

llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s

281

There is no bank conflict between v3 and v5, I am sorry.

[rampitec]

Ugh. There was additional restriction on src2.

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

enum Component : unsigned {
 
   DST_NUM = 1,
   MAX_SRC_NUM = 3,
   MAX_OPR_NUM = DST_NUM + MAX_SRC_NUM
 };
 
 // LSB mask for VGPR banks per VOPD component operand.
 // 4 banks result in a mask 3, setting 2 lower bits.
-constexpr unsigned VOPD_VGPR_BANK_MASKS[] = {1, 3, 3, 1};
+constexpr unsigned VOPD_VGPR_BANK_MASKS[] = {1, 3, 3, 3};
 
 enum ComponentIndex : unsigned { X = 0, Y = 1 };
 constexpr unsigned COMPONENTS[] = {ComponentIndex::X, ComponentIndex::Y};
 constexpr unsigned COMPONENTS_NUM = 2;
 
 // Properties of VOPD components.
 class ComponentProps {
 private:

llvm/test/CodeGen/AMDGPU/vopd-combine.mir

 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 # RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass=postmisched %s -o - | FileCheck -check-prefix=SCHED %s
 # RUN: llc -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs -run-pass=postmisched,gcn-create-vopd %s -o - | FileCheck -check-prefix=PAIR %s
 
 --- |
   @lds = external addrspace(3) global [8 x i8]
   define void @vopd_schedule() { ret void }
   define void @vopd_fmamk() { ret void }
   define void @vopd_fmamk_fail() { ret void }
+  define void @vopd_fmamk_src2_step2() { ret void }
   define void @vopd_cndmask() { ret void }
   define void @vopd_mov() { ret void }
   define void @vopd_mov_mov() { ret void }
   define void @vopd_constants_fail() { ret void }
   define void @vopd_constants_inlinable() { ret void }
   define void @vopd_constants_same() { ret void }
   define void @vopd_mov_fmaak_constants_same() { ret void }
   define void @vopd_debug() { ret void }

 tracksRegLiveness: true
 body:             |
   bb.0:
 
     ; SCHED-LABEL: name: vopd_fmamk_fail
     ; SCHED: $vgpr1 = IMPLICIT_DEF
     ; SCHED-NEXT: $vgpr2 = V_XOR_B32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
     ; SCHED-NEXT: $vgpr0 = IMPLICIT_DEF
+    ; SCHED-NEXT: $vgpr6 = IMPLICIT_DEF
+    ; SCHED-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 10, killed $vgpr6, implicit $mode, implicit $exec
+    ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+    ; PAIR-LABEL: name: vopd_fmamk_fail
+    ; PAIR: $vgpr1 = IMPLICIT_DEF
+    ; PAIR-NEXT: $vgpr2 = V_XOR_B32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
+    ; PAIR-NEXT: $vgpr0 = IMPLICIT_DEF
+    ; PAIR-NEXT: $vgpr6 = IMPLICIT_DEF
+    ; PAIR-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 10, killed $vgpr6, implicit $mode, implicit $exec
+    ; PAIR-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+    $vgpr0 = IMPLICIT_DEF
+    $vgpr1 = IMPLICIT_DEF
+    $vgpr2 = V_XOR_B32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
+    $vgpr6 = IMPLICIT_DEF
+    ; should not pair
+    $vgpr2 = V_FMAC_F32_e32 $vgpr1, $vgpr1, $vgpr2, implicit $mode, implicit $exec
+    $vgpr5 = V_FMAMK_F32 $vgpr0, 10, $vgpr6, implicit $mode, implicit $exec
+
+...
+
+---
+name:            vopd_fmamk_src2_step2
+tracksRegLiveness: true
+body:             |
+  bb.0:
+
+    ; SCHED-LABEL: name: vopd_fmamk_src2_step2
+    ; SCHED: $vgpr1 = IMPLICIT_DEF
+    ; SCHED-NEXT: $vgpr2 = V_XOR_B32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
+    ; SCHED-NEXT: $vgpr0 = IMPLICIT_DEF
     ; SCHED-NEXT: $vgpr4 = IMPLICIT_DEF
     ; SCHED-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 10, killed $vgpr4, implicit $mode, implicit $exec
     ; SCHED-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
-    ; PAIR-LABEL: name: vopd_fmamk_fail
+    ; PAIR-LABEL: name: vopd_fmamk_src2_step2
     ; PAIR: $vgpr1 = IMPLICIT_DEF
     ; PAIR-NEXT: $vgpr2 = V_XOR_B32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
     ; PAIR-NEXT: $vgpr0 = IMPLICIT_DEF
     ; PAIR-NEXT: $vgpr4 = IMPLICIT_DEF
-    ; PAIR-NEXT: $vgpr5 = V_FMAMK_F32 killed $vgpr0, 10, killed $vgpr4, implicit $mode, implicit $exec
-    ; PAIR-NEXT: $vgpr2 = V_FMAC_F32_e32 killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec
+    ; PAIR-NEXT: $vgpr5, $vgpr2 = V_DUAL_FMAMK_F32_X_FMAC_F32_e32 killed $vgpr0, 10, killed $vgpr4, killed $vgpr1, $vgpr1, killed $vgpr2, implicit $mode, implicit $exec, implicit $mode, implicit $exec, implicit $mode, implicit $exec
     $vgpr0 = IMPLICIT_DEF
     $vgpr1 = IMPLICIT_DEF
     $vgpr2 = V_XOR_B32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
     $vgpr4 = IMPLICIT_DEF
-    ; should not pair
     $vgpr2 = V_FMAC_F32_e32 $vgpr1, $vgpr1, $vgpr2, implicit $mode, implicit $exec
     $vgpr5 = V_FMAMK_F32 $vgpr0, 10, $vgpr4, implicit $mode, implicit $exec
 
 ...
 
 ---
 name:            vopd_cndmask
 tracksRegLiveness: true

llvm/test/MC/AMDGPU/gfx11_asm_vopd_err.s

 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src1 operands must use different VGPR banks
 // GFX11-NEXT:{{^}}v_dual_fmaak_f32    v1, v4, v3, 0xaf123456       ::  v_dual_fmaak_f32     v2, v5, v23, 0xaf123456
 // GFX11-NEXT:{{^}}                                                                                  ^
 
 //===----------------------------------------------------------------------===//
 // Src2 operands must use different VGPR banks.
 //===----------------------------------------------------------------------===//
 
-v_dual_fmamk_f32    v6, v1, 0xaf123456, v3       :: v_dual_fmamk_f32      v5, v2, 0xaf123456, v5
+v_dual_fmamk_f32    v6, v1, 0xaf123456, v3       :: v_dual_fmamk_f32      v5, v2, 0xaf123456, v7
 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src2 operands must use different VGPR banks
-// GFX11-NEXT:{{^}}v_dual_fmamk_f32    v6, v1, 0xaf123456, v3       :: v_dual_fmamk_f32      v5, v2, 0xaf123456, v5
+// GFX11-NEXT:{{^}}v_dual_fmamk_f32    v6, v1, 0xaf123456, v3       :: v_dual_fmamk_f32      v5, v2, 0xaf123456, v7
 // GFX11-NEXT:{{^}}                                                                                              ^
 
 v_dual_fmac_f32     v7, v1, v2                   :: v_dual_fmamk_f32      v6, v2, 0xaf123456, v3
 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src2 operands must use different VGPR banks
 // GFX11-NEXT:{{^}}v_dual_fmac_f32     v7, v1, v2                   :: v_dual_fmamk_f32      v6, v2, 0xaf123456, v3
 // GFX11-NEXT:{{^}}                                                                                              ^
 
-v_dual_fmamk_f32    v6, v1, 0xaf123456, v3       :: v_dual_fmac_f32       v5, v2, v3
+v_dual_fmamk_f32    v6, v1, 0xaf123456, v3       :: v_dual_fmac_f32       v7, v2, v5
 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: src2 operands must use different VGPR banks
-// GFX11-NEXT:{{^}}v_dual_fmamk_f32    v6, v1, 0xaf123456, v3       :: v_dual_fmac_f32       v5, v2, v3
+// GFX11-NEXT:{{^}}v_dual_fmamk_f32    v6, v1, 0xaf123456, v3       :: v_dual_fmac_f32       v7, v2, v5
 // GFX11-NEXT:{{^}}                                        ^
 
 //===----------------------------------------------------------------------===//
 // Check invalid VOPD syntax.
 //===----------------------------------------------------------------------===//
 
 v_dual_fmamk_f32    v6, v1, 0xaf123456, v2       : : v_dual_fmac_f32       v5, v2, v3
 // GFX11: :[[@LINE-1]]:{{[0-9]+}}: error: unknown token in expression