This is an archive of the discontinued LLVM Phabricator instance.

Differential D152445

[GlobalIsel][X86] Legalize G_SELECT
ClosedPublic

Authored by tschuett on Jun 8 2023, 7:37 AM.

Details

Reviewers
RKSimon
arsenm
Commits
rG0b771c679af2: [GlobalIsel][X86] Legalize G_SELECT
Summary

with bug fixes

Diff Detail

Event Timeline

tschuett created this revision.Jun 8 2023, 7:37 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 8 2023, 7:37 AM
Herald added subscribers: pengfei, hiraditya. · View Herald Transcript
tschuett updated this revision to Diff 529591.Jun 8 2023, 7:40 AM

test

tschuett added reviewers: RKSimon, arsenm.Jun 8 2023, 7:41 AM
Harbormaster completed remote builds in B237494: Diff 529591.Jun 8 2023, 8:32 AM
tschuett published this revision for review.Jun 8 2023, 8:34 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 8 2023, 8:34 AM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
arsenm added inline comments.Jun 8 2023, 9:31 AM
llvm/lib/Target/X86/X86LegalizerInfo.cpp
313

select has two type indexes. I'm surprised this isn't asserting. You need to specify these as pairs with the condition type

tschuett updated this revision to Diff 529646.Jun 8 2023, 9:49 AM

use pairs in legalFor

inspired by AArch64

arsenm accepted this revision.Jun 8 2023, 9:51 AM
This revision is now accepted and ready to land.Jun 8 2023, 9:51 AM
This revision was landed with ongoing or failed builds.Jun 8 2023, 9:54 AM
Closed by commit rG0b771c679af2: [GlobalIsel][X86] Legalize G_SELECT (authored by tschuett). · Explain Why
This revision was automatically updated to reflect the committed changes.
tschuett added a commit: rG0b771c679af2: [GlobalIsel][X86] Legalize G_SELECT.
Harbormaster completed remote builds in B237531: Diff 529646.Jun 8 2023, 11:00 AM

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
8 lines
test/
CodeGen/
X86/
GlobalISel/
21 lines
108 lines
19 lines
21 lines

Diff 529649

llvm/lib/Target/X86/X86LegalizerInfo.cpp

Show First 20 Lines • Show All 302 Lines • ▼ Show 20 LinesX86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV}) getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV})
.legalIf([=](const LegalityQuery &Query) { .legalIf([=](const LegalityQuery &Query) {
return (HasSSE1 && typeInSet(0, {s32, v4s32})(Query)) || return (HasSSE1 && typeInSet(0, {s32, v4s32})(Query)) ||
(HasSSE2 && typeInSet(0, {s64, v2s64})(Query)) || (HasSSE2 && typeInSet(0, {s64, v2s64})(Query)) ||
(HasAVX && typeInSet(0, {v8s32, v4s64})(Query)) || (HasAVX && typeInSet(0, {v8s32, v4s64})(Query)) ||
(HasAVX512 && typeInSet(0, {v16s32, v8s64})(Query)); (HasAVX512 && typeInSet(0, {v16s32, v8s64})(Query));
}); });
// todo: vectors and address spaces
getActionDefinitionsBuilder(G_SELECT)
.legalFor({{s8, s32}, {s16, s32}, {s32, s32}, {s64, s32},
arsenmUnsubmitted
Not Done
ReplyInline Actions

select has two type indexes. I'm surprised this isn't asserting. You need to specify these as pairs with the condition type

arsenm: select has two type indexes. I'm surprised this isn't asserting. You need to specify these as…
{p0, s32}})
.widenScalarToNextPow2(0, /*Min=*/8)
.clampScalar(0, s8, sMaxScalar)
.clampScalar(1, s32, s32);
setLegalizerInfo32bit(); setLegalizerInfo32bit();
setLegalizerInfo64bit(); setLegalizerInfo64bit();
setLegalizerInfoSSE1(); setLegalizerInfoSSE1();
setLegalizerInfoSSE2(); setLegalizerInfoSSE2();
setLegalizerInfoAVX(); setLegalizerInfoAVX();
setLegalizerInfoAVX2(); setLegalizerInfoAVX2();
setLegalizerInfoAVX512(); setLegalizerInfoAVX512();
▲ Show 20 Lines • Show All 294 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+lzcnt -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64 # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+lzcnt -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -mtriple=i386-linux-gnu -mattr=+lzcnt -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86
# RUN: FileCheck -check-prefix=ERR32 %s < %t
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %13:_(s32), %14:_(s1) = G_USUBE %8:_, %10:_, %12:_ (in function: test_ctlz35)
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s64) = G_SELECT %6:_(s1), %9:_, %10:_ (in function: test_ctlz64)
# test count leading zeros for s16, s32, and s64 # test count leading zeros for s16, s32, and s64
--- ---
name: test_ctlz35 name: test_ctlz35
alignment: 16 alignment: 16
legalized: false legalized: false
regBankSelected: false regBankSelected: false
Show All 19 Lines bb.1:
; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTLZ]](s64) ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTLZ]](s64)
; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64) ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[C]](s64)
; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]] ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV]], [[UV2]]
; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]] ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV1]], [[UV3]], [[USUBO1]]
; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32) ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[MV]](s64) ; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[MV]](s64)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35) ; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35)
; X86-NEXT: RET 0, implicit [[COPY]](s35) ; X86-NEXT: RET 0, implicit [[COPY]](s35)
; CHECK-LABEL: name: test_ctlz35
; CHECK: [[DEF:%[0-9]+]]:_(s35) = IMPLICIT_DEF
; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[DEF]](s35)
; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[ZEXT]](s64)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 29
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[CTLZ]], [[C]]
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[SUB]](s64)
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35)
; CHECK-NEXT: RET 0, implicit [[COPY]](s35)
%0:_(s35) = IMPLICIT_DEF %0:_(s35) = IMPLICIT_DEF
%1:_(s35) = G_CTLZ %0 %1:_(s35) = G_CTLZ %0
%2:_(s35) = COPY %1(s35) %2:_(s35) = COPY %1(s35)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
name: test_ctlz8 name: test_ctlz8
alignment: 16 alignment: 16
Show All 40 Lines bb.1:
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]] ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]]
; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32) ; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]]
; X86-NEXT: [[CTLZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF [[UV1]](s32) ; X86-NEXT: [[CTLZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF [[UV1]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTLZ_ZERO_UNDEF]] ; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTLZ_ZERO_UNDEF]]
; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64) ; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64)
; X86-NEXT: RET 0, implicit [[COPY]](s64) ; X86-NEXT: RET 0, implicit [[COPY]](s64)
; CHECK-LABEL: name: test_ctlz64
; CHECK: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[DEF]](s64)
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[CTLZ]](s64)
; CHECK-NEXT: RET 0, implicit [[COPY]](s64)
%0:_(s64) = IMPLICIT_DEF %0:_(s64) = IMPLICIT_DEF
%1:_(s64) = G_CTLZ %0 %1:_(s64) = G_CTLZ %0
%2:_(s64) = COPY %1(s64) %2:_(s64) = COPY %1(s64)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
name: test_ctlz32 name: test_ctlz32
alignment: 16 alignment: 16
Show All 37 Lines

llvm/test/CodeGen/X86/GlobalISel/legalize-select.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
# test select
...
---
name: test_selectp0
body: |
bb.1:
; CHECK-LABEL: name: test_selectp0
; CHECK: [[DEF:%[0-9]+]]:_(p0) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(p0) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s1) = IMPLICIT_DEF
; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[DEF2]](s1)
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ZEXT]](s32), [[DEF1]], [[DEF]]
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[SELECT]](p0)
; CHECK-NEXT: RET 0, implicit [[COPY]](p0)
%0:_(p0) = IMPLICIT_DEF
%1:_(p0) = IMPLICIT_DEF
%2:_(s1) = IMPLICIT_DEF
%3:_(p0) = G_SELECT %2, %1, %0
%4:_(p0) = COPY %3(p0)
RET 0, implicit %4
...
---
name: test_select64
body: |
bb.1:
; CHECK-LABEL: name: test_select64
; CHECK: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s1) = IMPLICIT_DEF
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64)
; CHECK-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[DEF2]](s1)
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s32), [[UV]], [[UV2]]
; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s32), [[UV1]], [[UV3]]
; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
; CHECK-NEXT: RET 0, implicit [[COPY]](s64)
%0:_(s64) = IMPLICIT_DEF
%1:_(s64) = IMPLICIT_DEF
%2:_(s1) = IMPLICIT_DEF
%3:_(s64) = G_SELECT %2, %1, %0
%4:_(s64) = COPY %3(s64)
RET 0, implicit %4
...
---
name: test_select32
body: |
bb.1:
; CHECK-LABEL: name: test_select32
; CHECK: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s32) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s1) = IMPLICIT_DEF
; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[DEF2]](s1)
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s32), [[DEF1]], [[DEF]]
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; CHECK-NEXT: RET 0, implicit [[COPY]](s32)
%0:_(s32) = IMPLICIT_DEF
%1:_(s32) = IMPLICIT_DEF
%2:_(s1) = IMPLICIT_DEF
%3:_(s32) = G_SELECT %2, %1, %0
%4:_(s32) = COPY %3(s32)
RET 0, implicit %4
...
---
name: test_select16
body: |
bb.1:
; CHECK-LABEL: name: test_select16
; CHECK: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s16) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s1) = IMPLICIT_DEF
; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[DEF2]](s1)
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s16) = G_SELECT [[ZEXT]](s32), [[DEF1]], [[DEF]]
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[SELECT]](s16)
; CHECK-NEXT: RET 0, implicit [[COPY]](s16)
%0:_(s16) = IMPLICIT_DEF
%1:_(s16) = IMPLICIT_DEF
%2:_(s1) = IMPLICIT_DEF
%3:_(s16) = G_SELECT %2, %1, %0
%4:_(s16) = COPY %3(s16)
RET 0, implicit %4
...
---
name: test_select8
body: |
bb.1:
; CHECK-LABEL: name: test_select8
; CHECK: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:_(s8) = IMPLICIT_DEF
; CHECK-NEXT: [[DEF2:%[0-9]+]]:_(s1) = IMPLICIT_DEF
; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[DEF2]](s1)
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s8) = G_SELECT [[ZEXT]](s32), [[DEF1]], [[DEF]]
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY [[SELECT]](s8)
; CHECK-NEXT: RET 0, implicit [[COPY]](s8)
%0:_(s8) = IMPLICIT_DEF
%1:_(s8) = IMPLICIT_DEF
%2:_(s1) = IMPLICIT_DEF
%3:_(s8) = G_SELECT %2, %1, %0
%4:_(s8) = COPY %3(s8)
RET 0, implicit %4

llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros-undef.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64 # RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -mtriple=i386-linux-gnu -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86
# RUN: FileCheck -check-prefix=ERR32 %s < %t
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %4:_(s64) = G_SELECT %8:_(s1), %11:_, %12:_ (in function: test_cttz35)
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s64) = G_SELECT %6:_(s1), %9:_, %10:_ (in function: test_cttz64)
# test count leading zeros for s16, s32, and s64 # test count leading zeros for s16, s32, and s64
--- ---
name: test_cttz35 name: test_cttz35
alignment: 16 alignment: 16
legalized: false legalized: false
regBankSelected: false regBankSelected: false
Show All 18 Lines bb.1:
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C1]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF1]] ; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF1]]
; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[SELECT]](s64) ; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[SELECT]](s64)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35) ; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35)
; X86-NEXT: RET 0, implicit [[COPY]](s35) ; X86-NEXT: RET 0, implicit [[COPY]](s35)
; CHECK-LABEL: name: test_cttz35
; CHECK: [[DEF:%[0-9]+]]:_(s35) = IMPLICIT_DEF
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[DEF]](s35)
; CHECK-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[ANYEXT]](s64)
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[CTTZ_ZERO_UNDEF]](s64)
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35)
; CHECK-NEXT: RET 0, implicit [[COPY]](s35)
%0:_(s35) = IMPLICIT_DEF %0:_(s35) = IMPLICIT_DEF
%1:_(s35) = G_CTTZ_ZERO_UNDEF %0 %1:_(s35) = G_CTTZ_ZERO_UNDEF %0
%2:_(s35) = COPY %1(s35) %2:_(s35) = COPY %1(s35)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
name: test_cttz8 name: test_cttz8
alignment: 16 alignment: 16
Show All 38 Lines bb.1:
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]] ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C1]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF1]] ; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF1]]
; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64) ; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64)
; X86-NEXT: RET 0, implicit [[COPY]](s64) ; X86-NEXT: RET 0, implicit [[COPY]](s64)
; CHECK-LABEL: name: test_cttz64
; CHECK: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; CHECK-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[DEF]](s64)
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[CTTZ_ZERO_UNDEF]](s64)
; CHECK-NEXT: RET 0, implicit [[COPY]](s64)
%0:_(s64) = IMPLICIT_DEF %0:_(s64) = IMPLICIT_DEF
%1:_(s64) = G_CTTZ_ZERO_UNDEF %0 %1:_(s64) = G_CTTZ_ZERO_UNDEF %0
%2:_(s64) = COPY %1(s64) %2:_(s64) = COPY %1(s64)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
name: test_cttz32 name: test_cttz32
alignment: 16 alignment: 16
Show All 37 Lines

llvm/test/CodeGen/X86/GlobalISel/legalize-trailing-zeros.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+bmi -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64 # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+bmi -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -mtriple=i386-linux-gnu -mattr=+bmi -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86
# RUN: FileCheck -check-prefix=ERR32 %s < %t
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %6:_(s64) = G_SELECT %10:_(s1), %13:_, %14:_ (in function: test_cttz35)
# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s64) = G_SELECT %6:_(s1), %9:_, %10:_ (in function: test_cttz64)
# test count leading zeros for s16, s32, and s64 # test count leading zeros for s16, s32, and s64
--- ---
name: test_cttz35 name: test_cttz35
alignment: 16 alignment: 16
legalized: false legalized: false
regBankSelected: false regBankSelected: false
Show All 22 Lines bb.1:
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV1]](s32)
; X86-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C2]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ_ZERO_UNDEF]], [[C2]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF1:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF1]] ; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF1]]
; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[SELECT]](s64) ; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[SELECT]](s64)
; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35) ; X86-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35)
; X86-NEXT: RET 0, implicit [[COPY]](s35) ; X86-NEXT: RET 0, implicit [[COPY]](s35)
; CHECK-LABEL: name: test_cttz35
; CHECK: [[DEF:%[0-9]+]]:_(s35) = IMPLICIT_DEF
; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[DEF]](s35)
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 34359738368
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[ANYEXT]], [[C]]
; CHECK-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[OR]](s64)
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[CTTZ_ZERO_UNDEF]](s64)
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s35) = COPY [[TRUNC]](s35)
; CHECK-NEXT: RET 0, implicit [[COPY]](s35)
%0:_(s35) = IMPLICIT_DEF %0:_(s35) = IMPLICIT_DEF
%1:_(s35) = G_CTTZ %0 %1:_(s35) = G_CTTZ %0
%2:_(s35) = COPY %1(s35) %2:_(s35) = COPY %1(s35)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
name: test_cttz8 name: test_cttz8
alignment: 16 alignment: 16
Show All 40 Lines bb.1:
; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]] ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV]](s32), [[C]]
; X86-NEXT: [[CTTZ:%[0-9]+]]:_(s64) = G_CTTZ [[UV1]](s32) ; X86-NEXT: [[CTTZ:%[0-9]+]]:_(s64) = G_CTTZ [[UV1]](s32)
; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32 ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ]], [[C1]] ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTTZ]], [[C1]]
; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32) ; X86-NEXT: [[CTTZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTTZ_ZERO_UNDEF [[UV]](s32)
; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF]] ; X86-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[ICMP]](s1), [[ADD]], [[CTTZ_ZERO_UNDEF]]
; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64) ; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SELECT]](s64)
; X86-NEXT: RET 0, implicit [[COPY]](s64) ; X86-NEXT: RET 0, implicit [[COPY]](s64)
; CHECK-LABEL: name: test_cttz64
; CHECK: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
; CHECK-NEXT: [[CTTZ:%[0-9]+]]:_(s64) = G_CTTZ [[DEF]](s64)
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[CTTZ]](s64)
; CHECK-NEXT: RET 0, implicit [[COPY]](s64)
%0:_(s64) = IMPLICIT_DEF %0:_(s64) = IMPLICIT_DEF
%1:_(s64) = G_CTTZ %0 %1:_(s64) = G_CTTZ %0
%2:_(s64) = COPY %1(s64) %2:_(s64) = COPY %1(s64)
RET 0, implicit %2 RET 0, implicit %2
... ...
--- ---
name: test_cttz32 name: test_cttz32
alignment: 16 alignment: 16
Show All 37 Lines