This is an archive of the discontinued LLVM Phabricator instance.

Differential D151370

[mlir][sparse][gpu] fixed typo in CUDA test
ClosedPublic

Authored by aartbik on May 24 2023, 1:10 PM.

Details

Reviewers
Peiming
bixia
wrengr
K-Wu
nicolasvasilache
herhut
Commits
rG76b7dca47d66: [mlir][sparse][gpu] fixed typo in CUDA test
Summary

Test was printing same result twice

Diff Detail

Event Timeline

aartbik created this revision.May 24 2023, 1:10 PM
Herald added a reviewer: K-Wu. · View Herald TranscriptMay 24 2023, 1:10 PM
Herald added a project: Restricted Project. · View Herald Transcript
Herald added subscribers: K-Wu, bviyer, hanchung and 25 others. · View Herald Transcript
aartbik requested review of this revision.May 24 2023, 1:10 PM
Herald added a reviewer: nicolasvasilache. · View Herald TranscriptMay 24 2023, 1:10 PM
Herald added a reviewer: herhut. · View Herald Transcript
Herald added a project: Restricted Project. · View Herald Transcript
Herald added subscribers: stephenneuendorffer, nicolasvasilache. · View Herald Transcript
K-Wu accepted this revision.May 24 2023, 1:18 PM
This revision is now accepted and ready to land.May 24 2023, 1:18 PM
Harbormaster completed remote builds in B234306: Diff 525313.May 24 2023, 1:54 PM
This revision was landed with ongoing or failed builds.May 24 2023, 6:00 PM
Closed by commit rG76b7dca47d66: [mlir][sparse][gpu] fixed typo in CUDA test (authored by aartbik). · Explain Why
This revision was automatically updated to reflect the committed changes.
aartbik added a commit: rG76b7dca47d66: [mlir][sparse][gpu] fixed typo in CUDA test.

Revision Contents

PathSize
mlir/
test/
Integration/
Dialect/
SparseTensor/
GPU/
CUDA/
2 lines

Diff 525389

mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-matvec-lib.mlir

Show First 20 Lines • Show All 81 Lines • ▼ Show 20 Lines func.func @main() {
// //
// Sanity check on results. // Sanity check on results.
// //
// CHECK-COUNT-2: ( 87360, 89440, 91520, 93600, 95680, 97760, 99840, 101920, 104000, 106080, 108160, 110240, 112320, 114400, 116480, 118560, 120640, 122720, 124800, 126880, 128960, 131040, 133120, 135200, 137280, 139360, 141440, 143520, 145600, 147680, 149760, 151840, 153920, 156000, 158080, 160160, 162240, 164320, 166400, 168480, 170560, 172640, 174720, 176800, 178880, 180960, 183040, 185120, 187200, 189280, 191360, 193440, 195520, 197600, 199680, 201760, 203840, 205920, 208000, 210080, 212160, 214240, 216320, 218400 ) // CHECK-COUNT-2: ( 87360, 89440, 91520, 93600, 95680, 97760, 99840, 101920, 104000, 106080, 108160, 110240, 112320, 114400, 116480, 118560, 120640, 122720, 124800, 126880, 128960, 131040, 133120, 135200, 137280, 139360, 141440, 143520, 145600, 147680, 149760, 151840, 153920, 156000, 158080, 160160, 162240, 164320, 166400, 168480, 170560, 172640, 174720, 176800, 178880, 180960, 183040, 185120, 187200, 189280, 191360, 193440, 195520, 197600, 199680, 201760, 203840, 205920, 208000, 210080, 212160, 214240, 216320, 218400 )
// //
%pb0 = vector.transfer_read %0[%c0], %f0 : tensor<?xf64>, vector<64xf64> %pb0 = vector.transfer_read %0[%c0], %f0 : tensor<?xf64>, vector<64xf64>
vector.print %pb0 : vector<64xf64> vector.print %pb0 : vector<64xf64>
%pb1 = vector.transfer_read %0[%c0], %f0 : tensor<?xf64>, vector<64xf64> %pb1 = vector.transfer_read %1[%c0], %f0 : tensor<?xf64>, vector<64xf64>
vector.print %pb1 : vector<64xf64> vector.print %pb1 : vector<64xf64>
// Release the resources. // Release the resources.
bufferization.dealloc_tensor %Acoo : tensor<?x?xf64, #SortedCOO> bufferization.dealloc_tensor %Acoo : tensor<?x?xf64, #SortedCOO>
bufferization.dealloc_tensor %Acsr : tensor<?x?xf64, #CSR> bufferization.dealloc_tensor %Acsr : tensor<?x?xf64, #CSR>
return return
} }
} }