Add a common predicate for when the ROR immediate or "Bitfield extract, one register" idiom is used for EXTR or "Bitfield extract, two registers".
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Do you have any details where you are planning to use this? Just to make sure we dont end up doing similar work. Thanks
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@dmgreen, I am working on a scheduling model that will use this change and also noticed that other processors, like Neoverse N1, N2, V1, etc, besides Exynos, could benefit from it too.