[PPCMIPeephole] Fix incorrect compare elimination

[MaskRay]

Summary

D38236 moves a redundant compare instruction from the loop body to the
preheader.

It has a bug: when MBB1 == &MBB2, there may be only one compare instruction in the
loop. The code will lift the compare instruction to the preheader, failing to
account for the change of the compare result in a tail call, leading to a miscompile.

Suppress the compare elimination to fix https://github.com/llvm/llvm-project/issues/62294

[q66]

this works for me

[nemanjai]

LGTM. Thanks for the fix.

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

else if (NumPredBBs == 2) {
     // to avoid increasing the number of instructions.
     MachineBasicBlock::pred_iterator PI = MBB.pred_begin();
     MachineBasicBlock *Pred1MBB = *PI;
     MachineBasicBlock *Pred2MBB = *(PI+1);
 
     if (isEligibleBB(*Pred1MBB) && isEligibleForMoveCmp(*Pred2MBB)) {
       // We assume Pred1MBB is the BB containing the compare to be merged and
       // Pred2MBB is the BB to which we will append a compare instruction.
-      // Hence we can proceed as is.
+      // Proceed as is if Pred1MBB is different from MBB.
     }
     else if (isEligibleBB(*Pred2MBB) && isEligibleForMoveCmp(*Pred1MBB)) {
       // We need to swap Pred1MBB and Pred2MBB to canonicalize.
       std::swap(Pred1MBB, Pred2MBB);
     }
     else return false;
 
+    if (Pred1MBB == &MBB)
+      return false;
+
     // Here, Pred2MBB is the BB to which we need to append a compare inst.
     // We cannot move the compare instruction if operands are not available
     // in Pred2MBB (i.e. defined in MBB by an instruction other than PHI).
     MachineInstr *BI = &*MBB.getFirstInstrTerminator();
     MachineInstr *CMPI = MRI->getVRegDef(BI->getOperand(1).getReg());
     for (int I = 1; I <= 2; I++)
       if (CMPI->getOperand(I).isReg()) {
         MachineInstr *Inst = MRI->getVRegDef(CMPI->getOperand(I).getReg());

llvm/test/CodeGen/PowerPC/cmp_elimination.ll

 if.then2:
   tail call void @dummy2()
   br label %if.end3
 
 if.end3:
   ret void
 }
 
+;; The result of %cmp may change in a tail call. Don't lift %cmp to the entry block.
+; CHECK-LABEL: func_tailrecurse:
+; CHECK-NOT:     cmp
+; CHECK:       .LBB{{.*}}:
+; CHECK:         cmplw
+; CHECK:         blt
+define fastcc zeroext i32 @func_tailrecurse(i32 zeroext %a, i32 zeroext %b) {
+entry:
+  br label %tailrecurse
+
+tailrecurse:                                      ; preds = %tailrecurse, %entry
+  %a.tr = phi i32 [ %a, %entry ], [ %b.tr, %tailrecurse ]
+  %b.tr = phi i32 [ %b, %entry ], [ %a.tr, %tailrecurse ]
+  %cmp = icmp ult i32 %a.tr, %b.tr
+  %conv = zext i1 %cmp to i32
+  %ignore = call signext i32 (i32) @func(i32 %conv)
+  br i1 %cmp, label %tailrecurse, label %if.end
+
+if.end:                                           ; preds = %tailrecurse
+  %sub = sub nsw i32 %a.tr, %b.tr
+  ret i32 %sub
+}
+
 declare void @dummy1()
 declare void @dummy2()
 declare void @dummy3()
 declare signext i32 @func(i32 signext)
 
 !1 = !{!"branch_weights", i32 2000, i32 1}
 !2 = !{!"branch_weights", i32 1, i32 2000}