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[mlir][AMDGPU] Add emulation pass for atomics on AMDGPU targets

Authored by krzysz00 on Apr 19 2023, 9:12 AM.



Not all AMDGPU targets support all atomic operations. For example,
there are not atomic floating-point adds on the gfx10 series. Add a
pass to emulate these operations using a compare-and-swap loop, by
analogy to the generic atomicrmw rewrite in MemrefToLLVM.

This pass is named generally, as in the future we may have a
memref-to-amdgpu that translates constructs like atomicrmw fmax (which
doesn't generally exist in LLVM) to the relevant intrinsics, which may
themselves require emulation.

Since the AMDGPU dialect now has a pass that operates on it, the
dialect's directory structure is reorganized to match other similarly
complex dialects.

The pass should be run before amdgpu-to-rocdl if desired.

This commit also adds f64 support to atomic_fmax.

Depends on D148722

Diff Detail

Event Timeline

krzysz00 created this revision.Apr 19 2023, 9:12 AM
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krzysz00 requested review of this revision.Apr 19 2023, 9:12 AM
nirvedhmeshram accepted this revision.May 3 2023, 10:37 AM
This revision is now accepted and ready to land.May 3 2023, 10:37 AM
krzysz00 updated this revision to Diff 519252.May 3 2023, 2:18 PM

Rebase, fix merge conflict

This revision was landed with ongoing or failed builds.May 3 2023, 2:18 PM
This revision was automatically updated to reflect the committed changes.