[Metarenamer] Distinguish instructions by opcodes

[mkazantsev]

Summary

This should improve readability of metarenamed code.

[nikic]

llvm/lib/Transforms/Utils/MetaRenamer.cpp

118

What do you think about using I.getOpcodeName() in general here?

[aeubanks]

this deserves a test

[mkazantsev]

llvm/lib/Transforms/Utils/MetaRenamer.cpp

118

Interesting idea.

[mkazantsev]

In D145896#4189775, @aeubanks wrote:

this deserves a test

Ok, will add.

[mkazantsev]

Distinguished all instructions as Nikita has proposed, added test.

[nikic]

LGTM

llvm/test/Transforms/MetaRenamer/opcodes.ll

17

In the future, we might want to special-case some of these to more typical shorter names, e.g. getelementptr -> gep.

[mkazantsev]

llvm/test/Transforms/MetaRenamer/opcodes.ll

17

I was also thinking about block differentiantion basing on their role, e.g. entry, header, preheader etc. But let's move in small steps.

llvm/lib/Transforms/Utils/MetaRenamer.cpp

for (Argument &Arg : F.args())
     if (!Arg.getType()->isVoidTy())
       Arg.setName("arg");
 
   for (auto &BB : F) {
     BB.setName("bb");
 
     for (auto &I : BB)
       if (!I.getType()->isVoidTy())
-        I.setName("inst");
+        I.setName(I.getOpcodeName());
   }
 }
 
 void MetaRename(Module &M,
                 function_ref<TargetLibraryInfo &(Function &)> GetTLI) {
   // Seed our PRNG with simple additive sum of ModuleID. We're looking to
   // simply avoid always having the same function names, and we need to
   // remain deterministic.

llvm/test/Transforms/MetaRenamer/opcodes.ll

+; RUN: opt -passes=metarenamer -S < %s | FileCheck %s
+
+define void @opcodes(ptr %p, ptr %arr) {
+; CHECK-LABEL: bb:
+; CHECK:         %load = load i32, ptr %arg, align 4
+; CHECK:         br label %bb2
+; CHECK-LABEL: bb2:                                              ; preds = %bb5, %bb
+; CHECK:         %phi = phi i32 [ %load, %bb ], [ %sub, %bb5 ]
+; CHECK:         %icmp = icmp eq i32 %phi, 0
+; CHECK:         br i1 %icmp, label %bb8, label %bb3
+; CHECK-LABEL: bb3:                                              ; preds = %bb2
+; CHECK:         %sub = sub i32 %phi, 1
+; CHECK:         %icmp4 = icmp ult i32 %sub, %load
+; CHECK:         br i1 %icmp4, label %bb5, label %bb9
+; CHECK-LABEL: bb5:                                              ; preds = %bb3
+; CHECK:         %getelementptr = getelementptr i32, ptr %arg, i32 %phi
+; CHECK:         %load6 = load i32, ptr %getelementptr, align 4
+; CHECK:         %icmp7 = icmp eq i32 %load6, 0
+; CHECK:         br i1 %icmp7, label %bb2, label %bb8
+preheader:
+  %len = load i32, ptr %p
+  br label %loop
+
+loop:
+  %iv = phi i32 [%len, %preheader], [%iv.next, %backedge]
+  %zero_cond = icmp eq i32 %iv, 0
+  br i1 %zero_cond, label %exit, label %range_check_block
+
+range_check_block:
+  %iv.next = sub i32 %iv, 1
+  %range_check = icmp ult i32 %iv.next, %len
+  br i1 %range_check, label %backedge, label %fail
+
+backedge:
+  %el.ptr = getelementptr i32, ptr %p, i32 %iv
+  %el = load i32, ptr %el.ptr
+  %loop.cond = icmp eq i32 %el, 0
+  br i1 %loop.cond, label %loop, label %exit
+
+exit:
+  ret void
+
+fail:
+  unreachable
+}