[Instcombine] Canonicalize all <=> patterns to (a>b)-(a<b)

[bcl5980]

Summary

Even though this canonicalization increases one instruction, it helps to generate better backend code.
And in D143373 we have a combination on the pattern add (zext, sext). So canonicalize all select patterns to add(zext, sext).

Alive2 proof:
https://alive2.llvm.org/ce/z/RB6EEe
https://alive2.llvm.org/ce/z/EFZTwV
https://alive2.llvm.org/ce/z/ooqz8R

Fix: https://github.com/llvm/llvm-project/issues/60012

[nikic]

I think it's long overdue to canonicalize three-way comparisons in some way. Looking at asm for different backends, it does look like this representation is pretty much universally better than the select form. I'm less sure whether this is ideal for middle-end optimization.

Something I'm wondering is whether it might make sense to recognize this as a first-class pattern and actually introduce an iN @llvm.compare.iN.iM(iM %a, iM %b) intrinsic for this purpose.

[nikic]

Was this abandoned because it breaks some of the existing optimizations? For the record, this is how the compare-3way.ll test diff looks like: https://gist.github.com/nikic/056516a0d621f9ca69059d05eef7e7b2

[bcl5980]

In D145772#4192188, @nikic wrote:

Was this abandoned because it breaks some of the existing optimizations? For the record, this is how the compare-3way.ll test diff looks like: https://gist.github.com/nikic/056516a0d621f9ca69059d05eef7e7b2

Yeah, I haven't found a quick way to fix the test failures. So, I abandon it for now. Need more time to detect the canonicalized form in matchThreeWayIntCompare.

[bcl5980]

In D145772#4184090, @nikic wrote:

I think it's long overdue to canonicalize three-way comparisons in some way. Looking at asm for different backends, it does look like this representation is pretty much universally better than the select form. I'm less sure whether this is ideal for middle-end optimization.

Something I'm wondering is whether it might make sense to recognize this as a first-class pattern and actually introduce an iN @llvm.compare.iN.iM(iM %a, iM %b) intrinsic for this purpose.

I try to involve new intrinsic @llvm.compare.iN.iM and try to canonicalize the select form and extend form to the intrinsic on my local branch. It looks I get some regressions after that. Then I realize we may need more work if we canonicalize to intrinsic.
Similar to this patch, it will break all optimizations in current code. And I am not sure how to write cost model for the intrinsic. If we expand the intrinsic in SDAG, we can't detect any information cross basic block to optimize the code but I think a lot of times the 3-way comparison result will be invovled in a branch condition.

All I say here should be solvable. But I think it may need some patches to make it works. @nikic, How do you think about this ? Continue based on current patch or involve a new intrinsic like llvm.compare ?

llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

ConstantRange R = ConstantRange::makeExactICmpRegion(CPred, *CmpC)
                         .binaryOp(BO->getOpcode(), *BinOpC);
   if (R == *C) {
     BO->dropPoisonGeneratingFlags();
     return BO;
   }
   return nullptr;
 }
 
+/// canonicalize all variants of strong order compare to (a > b) - (a < b)
+static Instruction *
+canonicalizeStrongOrderCmp(ICmpInst *ICI, Value *TrueVal, Value *FalseVal,
+                           InstCombiner::BuilderTy &Builder) {
+  if (!isa<Constant>(TrueVal))
+    return nullptr;
+
+  Type *Ty = TrueVal->getType();
+  ICmpInst::Predicate Pred = ICI->getPredicate();
+  Value *CmpLHS = ICI->getOperand(0);
+  Value *CmpRHS = ICI->getOperand(1);
+  Value *ICI2;
+  ICmpInst::Predicate Pred2;
+  Constant *InnerTC, *InnerFC;
+  auto SwapICmp = [&Builder, CmpLHS, CmpRHS](ICmpInst::Predicate Pred) {
+    return Builder.CreateICmp(ICmpInst::getSwappedPredicate(Pred), CmpLHS,
+                              CmpRHS);
+  };
+
+  if (FalseVal->hasOneUse() &&
+      match(FalseVal, m_Select(m_Value(ICI2), m_ImmConstant(InnerTC),
+                               m_ImmConstant(InnerFC))) &&
+      match(ICI2, m_ICmp(Pred2, m_Specific(CmpLHS), m_Specific(CmpRHS)))) {
+    if (Pred == ICmpInst::ICMP_EQ && match(TrueVal, m_Zero()) &&
+        ICI->hasOneUse()) {
+      // A == B ? 0 : (A < B ? -1 : 1) --> (a > b) - (a < b)
+      if (match(InnerTC, m_AllOnes()) && match(InnerFC, m_One()) &&
+          (Pred2 == ICmpInst::ICMP_SLT || Pred2 == ICmpInst::ICMP_ULT)) {
+        Value *ZExt = Builder.CreateZExt(SwapICmp(Pred2), Ty);
+        Value *SExt = Builder.CreateSExt(ICI2, Ty);
+        return BinaryOperator::CreateAdd(ZExt, SExt);
+      }
+      // A == B ? 0 : (A > B ? 1 : -1) --> (a > b) - (a < b)
+      if (match(InnerTC, m_One()) && match(InnerFC, m_AllOnes()) &&
+          (Pred2 == ICmpInst::ICMP_SGT || Pred2 == ICmpInst::ICMP_UGT)) {
+        Value *ZExt = Builder.CreateZExt(ICI2, Ty);
+        Value *SExt = Builder.CreateSExt(SwapICmp(Pred2), Ty);
+        return BinaryOperator::CreateAdd(ZExt, SExt);
+      }
+    }
+  }
+
+  if (match(TrueVal, m_AllOnes()) && match(FalseVal, m_ZExt(m_Value(ICI2))) &&
+      match(ICI2, m_ICmp(Pred2, m_Specific(CmpLHS), m_Specific(CmpRHS))) &&
+      (Pred2 != ICmpInst::ICMP_NE ||
+       (FalseVal->hasOneUse() && ICI2->hasOneUse()))) {
+    // A < B ? -1 : zext (A > B) --> (a > b) - (a < b)
+    // A < B ? -1 : zext (A != B) --> (a > b) - (a < b)
+    if ((Pred == ICmpInst::ICMP_SLT &&
+         (Pred2 == ICmpInst::ICMP_NE || Pred2 == ICmpInst::ICMP_SGT)) ||
+        (Pred == ICmpInst::ICMP_ULT &&
+         (Pred2 == ICmpInst::ICMP_NE || Pred2 == ICmpInst::ICMP_UGT))) {
+      Value *ZExt = FalseVal;
+      if (Pred2 == ICmpInst::ICMP_NE)
+        ZExt = Builder.CreateZExt(SwapICmp(Pred), Ty);
+      Value *SExt = Builder.CreateSExt(ICI, Ty);
+      return BinaryOperator::CreateAdd(ZExt, SExt);
+    }
+  }
+
+  if (match(TrueVal, m_One()) && match(FalseVal, m_SExt(m_Value(ICI2))) &&
+      match(ICI2, m_ICmp(Pred2, m_Specific(CmpLHS), m_Specific(CmpRHS))) &&
+      (Pred2 != ICmpInst::ICMP_NE ||
+       (FalseVal->hasOneUse() && ICI2->hasOneUse()))) {
+    // A > B ? 1 : sext (A < B) --> (a > b) - (a < b)
+    // A > B ? 1 : sext (A != B) --> (a > b) - (a < b)
+    if ((Pred == ICmpInst::ICMP_SGT &&
+         (Pred2 == ICmpInst::ICMP_NE || Pred2 == ICmpInst::ICMP_SLT)) ||
+        (Pred == ICmpInst::ICMP_UGT &&
+         (Pred2 == ICmpInst::ICMP_NE || Pred2 == ICmpInst::ICMP_ULT))) {
+      Value *ZExt = Builder.CreateZExt(ICI, Ty);
+      Value *SExt = FalseVal;
+      if (Pred2 == ICmpInst::ICMP_NE)
+        SExt = Builder.CreateSExt(SwapICmp(Pred), Ty);
+      return BinaryOperator::CreateAdd(ZExt, SExt);
+    }
+  }
+  return nullptr;
+}
+
 /// Visit a SelectInst that has an ICmpInst as its first operand.
 Instruction *InstCombinerImpl::foldSelectInstWithICmp(SelectInst &SI,
                                                       ICmpInst *ICI) {
   if (Instruction *NewSel = foldSelectValueEquivalence(SI, *ICI))
     return NewSel;
 
   if (Instruction *NewSPF = canonicalizeSPF(SI, *ICI, *this))
     return NewSPF;
if (CmpLHS == TrueVal && Pred == ICmpInst::ICMP_EQ) {
       Changed = true;
     } else if (CmpLHS == FalseVal && Pred == ICmpInst::ICMP_NE) {
       // Transform (X != C) ? Y : X -> (X != C) ? Y : C
       SI.setOperand(2, CmpRHS);
       Changed = true;
     }
   }
 
+  if (Instruction *V =
+          canonicalizeStrongOrderCmp(ICI, TrueVal, FalseVal, Builder))
+    return V;
+
   // Canonicalize a signbit condition to use zero constant by swapping:
   // (CmpLHS > -1) ? TV : FV --> (CmpLHS < 0) ? FV : TV
   // To avoid conflicts (infinite loops) with other canonicalizations, this is
   // not applied with any constant select arm.
   if (Pred == ICmpInst::ICMP_SGT && match(CmpRHS, m_AllOnes()) &&
       !match(TrueVal, m_Constant()) && !match(FalseVal, m_Constant()) &&
       ICI->hasOneUse()) {
     InstCombiner::BuilderTy::InsertPointGuard Guard(Builder);

llvm/test/Transforms/InstCombine/select-select.ll

;
   %blend = shufflevector <4 x i8> %x, <4 x i8> %y, <2 x i32> <i32 0, i32 5>
   %r = select <2 x i1> %cmp, <2 x i8> %x2, <2 x i8> %blend
   ret <2 x i8> %r
 }
 
 define i8 @strong_order_cmp_slt_eq(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_slt_eq(
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 1
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_LT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 [[A]], [[B]]
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = sext i1 [[CMP_LT]] to i8
+; CHECK-NEXT:    [[SEL_EQ:%.*]] = add nsw i8 [[TMP2]], [[TMP3]]
 ; CHECK-NEXT:    ret i8 [[SEL_EQ]]
 ;
   %cmp.lt = icmp slt i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 1
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 %sel.lt
   ret i8 %sel.eq
 }
 
 define i8 @strong_order_cmp_ult_eq(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_ult_eq(
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 1
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_LT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[A]], [[B]]
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = sext i1 [[CMP_LT]] to i8
+; CHECK-NEXT:    [[SEL_EQ:%.*]] = add nsw i8 [[TMP2]], [[TMP3]]
 ; CHECK-NEXT:    ret i8 [[SEL_EQ]]
 ;
   %cmp.lt = icmp ult i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 1
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 %sel.lt
   ret i8 %sel.eq
 }
 
+; negative test: wrong constant, should be -1 for first select true value.
+
 define i8 @strong_order_cmp_slt_eq_wrong_const(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_slt_eq_wrong_const(
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -2, i8 1
 ; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_LT]]
 ; CHECK-NEXT:    ret i8 [[SEL_EQ]]
 ;
   %cmp.lt = icmp slt i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -2, i8 1
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 %sel.lt
   ret i8 %sel.eq
 }
 
+; negative test: wrong constant, should be 1 for first select false value.
+
 define i8 @strong_order_cmp_ult_eq_wrong_const(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_ult_eq_wrong_const(
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 3
 ; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_LT]]
 ; CHECK-NEXT:    ret i8 [[SEL_EQ]]
 ;
   %cmp.lt = icmp ult i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 3
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 %sel.lt
   ret i8 %sel.eq
 }
 
+; negative test: wrong predicate, should be eq.
+
 define i8 @strong_order_cmp_slt_ult_wrong_pred(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_slt_ult_wrong_pred(
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 1
 ; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp ult i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_LT]]
 ; CHECK-NEXT:    ret i8 [[SEL_EQ]]
 ;
   %cmp.lt = icmp slt i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 1
   %cmp.eq = icmp ult i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 %sel.lt
   ret i8 %sel.eq
 }
 
 define i8 @strong_order_cmp_sgt_eq(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_sgt_eq(
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 -1
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_GT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP_GT]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp slt i32 [[A]], [[B]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sext i1 [[TMP2]] to i8
+; CHECK-NEXT:    [[SEL_EQ:%.*]] = add nsw i8 [[TMP1]], [[TMP3]]
 ; CHECK-NEXT:    ret i8 [[SEL_EQ]]
 ;
   %cmp.gt = icmp sgt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 -1
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 %sel.gt
   ret i8 %sel.eq
 }
 
 define i8 @strong_order_cmp_ugt_eq(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_ugt_eq(
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 -1
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_GT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP_GT]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i32 [[A]], [[B]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sext i1 [[TMP2]] to i8
+; CHECK-NEXT:    [[SEL_EQ:%.*]] = add nsw i8 [[TMP1]], [[TMP3]]
 ; CHECK-NEXT:    ret i8 [[SEL_EQ]]
 ;
   %cmp.gt = icmp ugt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 -1
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 %sel.gt
   ret i8 %sel.eq
 }
 
 define i8 @strong_order_cmp_eq_slt(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_eq_slt(
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = zext i1 [[CMP_EQ]] to i8
-; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp slt i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 [[SEL_EQ]]
+; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 [[A]], [[B]]
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = sext i1 [[CMP_LT]] to i8
+; CHECK-NEXT:    [[SEL_LT:%.*]] = add nsw i8 [[TMP2]], [[TMP3]]
 ; CHECK-NEXT:    ret i8 [[SEL_LT]]
 ;
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 1
   %cmp.lt = icmp slt i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 %sel.eq
   ret i8 %sel.lt
 }
 
 define i8 @strong_order_cmp_eq_sgt(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_eq_sgt(
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = sext i1 [[CMP_EQ]] to i8
-; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp sgt i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEL_EQ]]
+; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP_GT]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp slt i32 [[A]], [[B]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sext i1 [[TMP2]] to i8
+; CHECK-NEXT:    [[SEL_GT:%.*]] = add nsw i8 [[TMP1]], [[TMP3]]
 ; CHECK-NEXT:    ret i8 [[SEL_GT]]
 ;
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 -1
   %cmp.gt = icmp sgt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 %sel.eq
   ret i8 %sel.gt
 }
 
 define i8 @strong_order_cmp_eq_ult(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_eq_ult(
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = zext i1 [[CMP_EQ]] to i8
-; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp ult i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 [[SEL_EQ]]
+; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp ugt i32 [[A]], [[B]]
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = sext i1 [[CMP_LT]] to i8
+; CHECK-NEXT:    [[SEL_LT:%.*]] = add nsw i8 [[TMP2]], [[TMP3]]
 ; CHECK-NEXT:    ret i8 [[SEL_LT]]
 ;
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 1
   %cmp.lt = icmp ult i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 %sel.eq
   ret i8 %sel.lt
 }
 
 define i8 @strong_order_cmp_eq_ugt(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_eq_ugt(
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = sext i1 [[CMP_EQ]] to i8
-; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEL_EQ]]
+; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP_GT]] to i8
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i32 [[A]], [[B]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sext i1 [[TMP2]] to i8
+; CHECK-NEXT:    [[SEL_GT:%.*]] = add nsw i8 [[TMP1]], [[TMP3]]
 ; CHECK-NEXT:    ret i8 [[SEL_GT]]
 ;
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 -1
   %cmp.gt = icmp ugt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 %sel.eq
   ret i8 %sel.gt
 }
 
 define i8 @strong_order_cmp_slt_sgt(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_slt_sgt(
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[CMP_LT]] to i8
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp sgt i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP_GT]] to i8
+; CHECK-NEXT:    [[SEL_GT:%.*]] = add nsw i8 [[TMP1]], [[SEXT]]
 ; CHECK-NEXT:    ret i8 [[SEL_GT]]
 ;
   %cmp.lt = icmp slt i32 %a, %b
   %sext = sext i1 %cmp.lt to i8
   %cmp.gt = icmp sgt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 %sext
   ret i8 %sel.gt
 }
 
 define i8 @strong_order_cmp_ult_ugt(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_ult_ugt(
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[CMP_LT]] to i8
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP_GT]] to i8
+; CHECK-NEXT:    [[SEL_GT:%.*]] = add nsw i8 [[TMP1]], [[SEXT]]
 ; CHECK-NEXT:    ret i8 [[SEL_GT]]
 ;
   %cmp.lt = icmp ult i32 %a, %b
   %sext = sext i1 %cmp.lt to i8
   %cmp.gt = icmp ugt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 %sext
   ret i8 %sel.gt
 }
 
 define i8 @strong_order_cmp_sgt_slt(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_sgt_slt(
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[ZEXT:%.*]] = zext i1 [[CMP_GT]] to i8
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp slt i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 [[ZEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = sext i1 [[CMP_LT]] to i8
+; CHECK-NEXT:    [[SEL_LT:%.*]] = add nsw i8 [[ZEXT]], [[TMP1]]
 ; CHECK-NEXT:    ret i8 [[SEL_LT]]
 ;
   %cmp.gt = icmp sgt i32 %a, %b
   %zext = zext i1 %cmp.gt to i8
   %cmp.lt = icmp slt i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 %zext
   ret i8 %sel.lt
 }
 
 define i8 @strong_order_cmp_ugt_ult(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_ugt_ult(
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[ZEXT:%.*]] = zext i1 [[CMP_GT]] to i8
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp ult i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 [[ZEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = sext i1 [[CMP_LT]] to i8
+; CHECK-NEXT:    [[SEL_LT:%.*]] = add nsw i8 [[ZEXT]], [[TMP1]]
 ; CHECK-NEXT:    ret i8 [[SEL_LT]]
 ;
   %cmp.gt = icmp ugt i32 %a, %b
   %zext = zext i1 %cmp.gt to i8
   %cmp.lt = icmp ult i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 %zext
   ret i8 %sel.lt
 }
 
+; negative test: icmp with ne must be one-use.
+
 define i8 @strong_order_cmp_ne_ugt_ne_not_one_use(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_ne_ugt_ne_not_one_use(
 ; CHECK-NEXT:    [[CMP_NE:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    call void @use1(i1 [[CMP_NE]])
 ; CHECK-NEXT:    [[SEL_EQ:%.*]] = sext i1 [[CMP_NE]] to i8
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEL_EQ]]
 ; CHECK-NEXT:    ret i8 [[SEL_GT]]
 ;
   %cmp.ne = icmp ne i32 %a, %b
   call void @use1(i1 %cmp.ne)
   %sel.eq = sext i1 %cmp.ne to i8
   %cmp.gt = icmp ugt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 %sel.eq
   ret i8 %sel.gt
 }
 
 define i8 @strong_order_cmp_slt_eq_slt_not_oneuse(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_slt_eq_slt_not_oneuse(
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    call void @use1(i1 [[CMP_LT]])
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 1
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_LT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 [[A]], [[B]]
+; CHECK-NEXT:    [[TMP2:%.*]] = zext i1 [[TMP1]] to i8
+; CHECK-NEXT:    [[TMP3:%.*]] = sext i1 [[CMP_LT]] to i8
+; CHECK-NEXT:    [[SEL_EQ:%.*]] = add nsw i8 [[TMP2]], [[TMP3]]
 ; CHECK-NEXT:    ret i8 [[SEL_EQ]]
 ;
   %cmp.lt = icmp slt i32 %a, %b
   call void @use1(i1 %cmp.lt)
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 1
   %cmp.eq = icmp eq i32 %a, %b
   %sel.eq = select i1 %cmp.eq, i8 0, i8 %sel.lt
   ret i8 %sel.eq
 }
 
+; negative test: icmp with eq predicate must be one use.
+
 define i8 @strong_order_cmp_sgt_eq_eq_not_oneuse(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_sgt_eq_eq_not_oneuse(
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 -1
 ; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
 ; CHECK-NEXT:    call void @use1(i1 [[CMP_EQ]])
 ; CHECK-NEXT:    [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_GT]]
 ; CHECK-NEXT:    ret i8 [[SEL_EQ]]
 ;
   %cmp.gt = icmp sgt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 -1
   %cmp.eq = icmp eq i32 %a, %b
   call void @use1(i1 %cmp.eq)
   %sel.eq = select i1 %cmp.eq, i8 0, i8 %sel.gt
   ret i8 %sel.eq
 }
 
+; negative test: icmp with eq predicate must be one use.
+
 define i8 @strong_order_cmp_eq_ugt_eq_not_oneuse(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_eq_ugt_eq_not_oneuse(
 ; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    call void @use1(i1 [[CMP_EQ]])
 ; CHECK-NEXT:    [[NOT_CMP_EQ:%.*]] = xor i1 [[CMP_EQ]], true
 ; CHECK-NEXT:    [[SEL_EQ:%.*]] = sext i1 [[NOT_CMP_EQ]] to i8
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt i32 [[A]], [[B]]
 ; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEL_EQ]]
 ; CHECK-NEXT:    ret i8 [[SEL_GT]]
 ;
   %cmp.eq = icmp eq i32 %a, %b
   call void @use1(i1 %cmp.eq)
   %sel.eq = select i1 %cmp.eq, i8 0, i8 -1
   %cmp.gt = icmp ugt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 %sel.eq
   ret i8 %sel.gt
 }
 
 define i8 @strong_order_cmp_ugt_ult_zext_not_oneuse(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_ugt_ult_zext_not_oneuse(
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[ZEXT:%.*]] = zext i1 [[CMP_GT]] to i8
 ; CHECK-NEXT:    call void @use8(i8 [[ZEXT]])
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp ult i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 [[ZEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = sext i1 [[CMP_LT]] to i8
+; CHECK-NEXT:    [[SEL_LT:%.*]] = add nsw i8 [[ZEXT]], [[TMP1]]
 ; CHECK-NEXT:    ret i8 [[SEL_LT]]
 ;
   %cmp.gt = icmp ugt i32 %a, %b
   %zext = zext i1 %cmp.gt to i8
   call void @use8(i8 %zext)
   %cmp.lt = icmp ult i32 %a, %b
   %sel.lt = select i1 %cmp.lt, i8 -1, i8 %zext
   ret i8 %sel.lt
 }
 
 define i8 @strong_order_cmp_slt_sgt_sext_not_oneuse(i32 %a, i32 %b) {
 ; CHECK-LABEL: @strong_order_cmp_slt_sgt_sext_not_oneuse(
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[CMP_LT]] to i8
 ; CHECK-NEXT:    call void @use8(i8 [[SEXT]])
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp sgt i32 [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 [[SEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext i1 [[CMP_GT]] to i8
+; CHECK-NEXT:    [[SEL_GT:%.*]] = add nsw i8 [[TMP1]], [[SEXT]]
 ; CHECK-NEXT:    ret i8 [[SEL_GT]]
 ;
   %cmp.lt = icmp slt i32 %a, %b
   %sext = sext i1 %cmp.lt to i8
   call void @use8(i8 %sext)
   %cmp.gt = icmp sgt i32 %a, %b
   %sel.gt = select i1 %cmp.gt, i8 1, i8 %sext
   ret i8 %sel.gt
 }
 
 define <2 x i8> @strong_order_cmp_ugt_ult_vector(<2 x i32> %a, <2 x i32> %b) {
 ; CHECK-LABEL: @strong_order_cmp_ugt_ult_vector(
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i1> [[CMP_GT]] to <2 x i8>
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp ult <2 x i32> [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select <2 x i1> [[CMP_LT]], <2 x i8> <i8 -1, i8 -1>, <2 x i8> [[ZEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = sext <2 x i1> [[CMP_LT]] to <2 x i8>
+; CHECK-NEXT:    [[SEL_LT:%.*]] = add nsw <2 x i8> [[ZEXT]], [[TMP1]]
 ; CHECK-NEXT:    ret <2 x i8> [[SEL_LT]]
 ;
   %cmp.gt = icmp ugt <2 x i32> %a, %b
   %zext = zext <2 x i1> %cmp.gt to <2 x i8>
   %cmp.lt = icmp ult <2 x i32> %a, %b
   %sel.lt = select <2 x i1> %cmp.lt, <2 x i8> <i8 -1, i8 -1>, <2 x i8> %zext
   ret <2 x i8> %sel.lt
 }
 
 define <2 x i8> @strong_order_cmp_ugt_ult_vector_poison(<2 x i32> %a, <2 x i32> %b) {
 ; CHECK-LABEL: @strong_order_cmp_ugt_ult_vector_poison(
 ; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[ZEXT:%.*]] = zext <2 x i1> [[CMP_GT]] to <2 x i8>
 ; CHECK-NEXT:    [[CMP_LT:%.*]] = icmp ult <2 x i32> [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_LT:%.*]] = select <2 x i1> [[CMP_LT]], <2 x i8> <i8 poison, i8 -1>, <2 x i8> [[ZEXT]]
+; CHECK-NEXT:    [[TMP1:%.*]] = sext <2 x i1> [[CMP_LT]] to <2 x i8>
+; CHECK-NEXT:    [[SEL_LT:%.*]] = add nsw <2 x i8> [[ZEXT]], [[TMP1]]
 ; CHECK-NEXT:    ret <2 x i8> [[SEL_LT]]
 ;
   %cmp.gt = icmp ugt <2 x i32> %a, %b
   %zext = zext <2 x i1> %cmp.gt to <2 x i8>
   %cmp.lt = icmp ult <2 x i32> %a, %b
   %sel.lt = select <2 x i1> %cmp.lt, <2 x i8> <i8 poison, i8 -1>, <2 x i8> %zext
   ret <2 x i8> %sel.lt
 }
 
 define <2 x i8> @strong_order_cmp_eq_ugt_vector(<2 x i32> %a, <2 x i32> %b) {
 ; CHECK-LABEL: @strong_order_cmp_eq_ugt_vector(
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp ne <2 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = sext <2 x i1> [[CMP_EQ]] to <2 x i8>
-; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select <2 x i1> [[CMP_GT]], <2 x i8> <i8 1, i8 1>, <2 x i8> [[SEL_EQ]]
+; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext <2 x i1> [[CMP_GT]] to <2 x i8>
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult <2 x i32> [[A]], [[B]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sext <2 x i1> [[TMP2]] to <2 x i8>
+; CHECK-NEXT:    [[SEL_GT:%.*]] = add nsw <2 x i8> [[TMP1]], [[TMP3]]
 ; CHECK-NEXT:    ret <2 x i8> [[SEL_GT]]
 ;
   %cmp.eq = icmp eq <2 x i32> %a, %b
   %sel.eq = select <2 x i1> %cmp.eq, <2 x i8> <i8 0, i8 0>, <2 x i8> <i8 -1, i8 -1>
   %cmp.gt = icmp ugt <2 x i32> %a, %b
   %sel.gt = select <2 x i1> %cmp.gt, <2 x i8> <i8 1, i8 1>, <2 x i8> %sel.eq
   ret <2 x i8> %sel.gt
 }
 
 define <2 x i8> @strong_order_cmp_eq_ugt_vector_poison1(<2 x i32> %a, <2 x i32> %b) {
 ; CHECK-LABEL: @strong_order_cmp_eq_ugt_vector_poison1(
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp ne <2 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = sext <2 x i1> [[CMP_EQ]] to <2 x i8>
-; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select <2 x i1> [[CMP_GT]], <2 x i8> <i8 1, i8 1>, <2 x i8> [[SEL_EQ]]
+; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext <2 x i1> [[CMP_GT]] to <2 x i8>
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult <2 x i32> [[A]], [[B]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sext <2 x i1> [[TMP2]] to <2 x i8>
+; CHECK-NEXT:    [[SEL_GT:%.*]] = add nsw <2 x i8> [[TMP1]], [[TMP3]]
 ; CHECK-NEXT:    ret <2 x i8> [[SEL_GT]]
 ;
   %cmp.eq = icmp eq <2 x i32> %a, %b
   %sel.eq = select <2 x i1> %cmp.eq, <2 x i8> <i8 0, i8 poison>, <2 x i8> <i8 -1, i8 -1>
   %cmp.gt = icmp ugt <2 x i32> %a, %b
   %sel.gt = select <2 x i1> %cmp.gt, <2 x i8> <i8 1, i8 1>, <2 x i8> %sel.eq
   ret <2 x i8> %sel.gt
 }
 
 define <2 x i8> @strong_order_cmp_eq_ugt_vector_poison2(<2 x i32> %a, <2 x i32> %b) {
 ; CHECK-LABEL: @strong_order_cmp_eq_ugt_vector_poison2(
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp ne <2 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = sext <2 x i1> [[CMP_EQ]] to <2 x i8>
-; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select <2 x i1> [[CMP_GT]], <2 x i8> <i8 1, i8 1>, <2 x i8> [[SEL_EQ]]
+; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext <2 x i1> [[CMP_GT]] to <2 x i8>
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult <2 x i32> [[A]], [[B]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sext <2 x i1> [[TMP2]] to <2 x i8>
+; CHECK-NEXT:    [[SEL_GT:%.*]] = add nsw <2 x i8> [[TMP1]], [[TMP3]]
 ; CHECK-NEXT:    ret <2 x i8> [[SEL_GT]]
 ;
   %cmp.eq = icmp eq <2 x i32> %a, %b
   %sel.eq = select <2 x i1> %cmp.eq, <2 x i8> <i8 0, i8 0>, <2 x i8> <i8 poison, i8 -1>
   %cmp.gt = icmp ugt <2 x i32> %a, %b
   %sel.gt = select <2 x i1> %cmp.gt, <2 x i8> <i8 1, i8 1>, <2 x i8> %sel.eq
   ret <2 x i8> %sel.gt
 }
 
 define <2 x i8> @strong_order_cmp_eq_ugt_vector_poison3(<2 x i32> %a, <2 x i32> %b) {
 ; CHECK-LABEL: @strong_order_cmp_eq_ugt_vector_poison3(
-; CHECK-NEXT:    [[CMP_EQ:%.*]] = icmp ne <2 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT:    [[SEL_EQ:%.*]] = sext <2 x i1> [[CMP_EQ]] to <2 x i8>
-; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A]], [[B]]
-; CHECK-NEXT:    [[SEL_GT:%.*]] = select <2 x i1> [[CMP_GT]], <2 x i8> <i8 1, i8 poison>, <2 x i8> [[SEL_EQ]]
+; CHECK-NEXT:    [[CMP_GT:%.*]] = icmp ugt <2 x i32> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    [[TMP1:%.*]] = zext <2 x i1> [[CMP_GT]] to <2 x i8>
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult <2 x i32> [[A]], [[B]]
+; CHECK-NEXT:    [[TMP3:%.*]] = sext <2 x i1> [[TMP2]] to <2 x i8>
+; CHECK-NEXT:    [[SEL_GT:%.*]] = add nsw <2 x i8> [[TMP1]], [[TMP3]]
 ; CHECK-NEXT:    ret <2 x i8> [[SEL_GT]]
 ;
   %cmp.eq = icmp eq <2 x i32> %a, %b
   %sel.eq = select <2 x i1> %cmp.eq, <2 x i8> <i8 0, i8 0>, <2 x i8> <i8 -1, i8 -1>
   %cmp.gt = icmp ugt <2 x i32> %a, %b
   %sel.gt = select <2 x i1> %cmp.gt, <2 x i8> <i8 1, i8 poison>, <2 x i8> %sel.eq
   ret <2 x i8> %sel.gt
 }
 
 
 
 declare void @use1(i1)
 declare void @use8(i8)