[AMDGPU] Simplify widenScalar condition for BigTy for G_(UN)MERGE_VALUES

[foad]

This is NFC. The condition was "not a power of two and not a multiple of 16". But this was already clamped to at least S32 on line 1616, so the condition simplifies to "not a multiple of 16".

However, I am sceptical that this condition is what was intended, since it doesn't seem to match the widening rule of "Pick the next power of 2, or a multiple of 64 over 128".

[arsenm]

We probably only want 32-bit multiple merge results (except maybe with true16)

[foad]

In D144250#4134530, @arsenm wrote:

We probably only want 32-bit multiple merge results (except maybe with true16)

AMDGPUInstructionSelector::selectG_UNMERGE_VALUES seems to assume that the source type has a corresponding register class. We certainly don't have register classes for every multiple of 32 up to MaxScalar (currently 1024). How should this work? Should the legalization be guided by exactly which register classes exist?

[arsenm]

In D144250#4134550, @foad wrote:

In D144250#4134530, @arsenm wrote:

We probably only want 32-bit multiple merge results (except maybe with true16)

AMDGPUInstructionSelector::selectG_UNMERGE_VALUES seems to assume that the source type has a corresponding register class. We certainly don't have register classes for every multiple of 32 up to MaxScalar (currently 1024). How should this work? Should the legalization be guided by exactly which register classes exist?

The point of the legalizer is to match the register classes, which would imply rounding up in the non-existent cases. I was thinking we would eventually just have every multiple of 32 register classes

llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

if (Op == G_MERGE_VALUES) {
           return Ty.getSizeInBits() < 32;
         },
         changeTo(LitTyIdx, S32));
     }
 
     Builder.widenScalarIf(
       [=](const LegalityQuery &Query) {
         const LLT Ty = Query.Types[BigTyIdx];
-        return !llvm::has_single_bit<uint32_t>(Ty.getSizeInBits()) &&
-               Ty.getSizeInBits() % 16 != 0;
+        return Ty.getSizeInBits() % 16 != 0;
       },
       [=](const LegalityQuery &Query) {
         // Pick the next power of 2, or a multiple of 64 over 128.
         // Whichever is smaller.
         const LLT &Ty = Query.Types[BigTyIdx];
         unsigned NewSizeInBits = 1 << Log2_32_Ceil(Ty.getSizeInBits() + 1);
         if (NewSizeInBits >= 256) {
           unsigned RoundedTo = alignTo<64>(Ty.getSizeInBits() + 1);