[AIX] Lower some memory intrinsics to millicode functions on AIX

[Esme]

Summary

Currently we lower MEMCPY/MEMMOVE/MEMSET/BZERO to the corresponding libc functions. And the libc functions call the millicode functions on AIX. We can lower these intrinsics directly to save one call layer.

[shchenz]

LGTM. Thanks for the improvement.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

   setLibcallName(RTLIB::LROUND_F128, "lroundf128");
   setLibcallName(RTLIB::LLROUND_F128, "llroundf128");
   setLibcallName(RTLIB::RINT_F128, "rintf128");
   setLibcallName(RTLIB::LRINT_F128, "lrintf128");
   setLibcallName(RTLIB::LLRINT_F128, "llrintf128");
   setLibcallName(RTLIB::NEARBYINT_F128, "nearbyintf128");
   setLibcallName(RTLIB::FMA_F128, "fmaf128");
 
+  if (Subtarget.isAIXABI()) {
+    setLibcallName(RTLIB::MEMCPY, isPPC64 ? "___memmove64" : "___memmove");
+    setLibcallName(RTLIB::MEMMOVE, isPPC64 ? "___memmove64" : "___memmove");
+    setLibcallName(RTLIB::MEMSET, isPPC64 ? "___memset64" : "___memset");
+    setLibcallName(RTLIB::BZERO, isPPC64 ? "___bzero64" : "___bzero");
+  }
+
   // With 32 condition bits, we don't need to sink (and duplicate) compares
   // aggressively in CodeGenPrep.
   if (Subtarget.useCRBits()) {
     setHasMultipleConditionRegisters();
     setJumpIsExpensive();
   }
 
   setMinFunctionAlignment(Align(4));

llvm/test/CodeGen/PowerPC/aix-cc-byval-mem.ll

 ; Confirm the expected memcpy call is independent of the call to test_byval_mem2.
 ; 32BIT:          ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
 ; 32BIT-NEXT:     %0:gprc = nuw ADDI $r1, 56
 ; 32BIT-NEXT:     %1:gprc = LWZtoc @gS256, $r2 :: (load (s32) from got)
 ; 32BIT-NEXT:     %2:gprc = LI 256
 ; 32BIT-DAG:      $r3 = COPY %0
 ; 32BIT-DAG:      $r4 = COPY %1
 ; 32BIT-DAG:      $r5 = COPY %2
-; 32BIT-NEXT:     BL_NOP &".memcpy[PR]", csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r2, implicit-def $r1, implicit-def $r3
+; 32BIT-NEXT:     BL_NOP &".___memmove[PR]", csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r2, implicit-def $r1, implicit-def $r3
 ; 32BIT-NEXT:     ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
 ; 32BIT:          ADJCALLSTACKDOWN 312, 0, implicit-def dead $r1, implicit $r1
 ; 32BIT-DAG:      $r3 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r4 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r5 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r6 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r7 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r8 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r9 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r10 = COPY %{{[0-9]+}}
 ; 32BIT-NEXT:     BL_NOP <mcsymbol .test_byval_mem2>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1
 ; 32BIT-NEXT:     ADJCALLSTACKUP 312, 0, implicit-def dead $r1, implicit $r1
 
 ; CHECKASM-LABEL: .call_test_byval_mem2:
 
 ; ASM32BIT:       stwu 1, -320(1)
 ; ASM32BIT-DAG:   addi 3, 1, 56
 ; ASM32BIT-DAG:   lwz 4, L..C{{[0-9]+}}(2)
 ; ASM32BIT-DAG:   li 5, 256
 ; ASM32BIT-DAG:   stw 0, 328(1)
-; ASM32BIT-NEXT:  bl .memcpy[PR]
+; ASM32BIT-NEXT:  bl .___memmove[PR]
 ; ASM32BIT:       bl .test_byval_mem2
 ; ASM32BIT:       addi 1, 1, 320
 
 ; Confirm the expected memcpy call is independent of the call to test_byval_mem2.
 ; 64BIT:          ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
 ; 64BIT-NEXT:     %0:g8rc = nuw ADDI8 $x1, 112
 ; 64BIT-NEXT:     %1:g8rc = LDtoc @gS256, $x2 :: (load (s64) from got)
 ; 64BIT-NEXT:     %2:g8rc = LI8 256
 ; 64BIT-DAG:      $x3 = COPY %0
 ; 64BIT-DAG:      $x4 = COPY %1
 ; 64BIT-DAG:      $x5 = COPY %2
-; 64BIT-NEXT:     BL8_NOP &".memcpy[PR]", csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x2, implicit-def $r1, implicit-def $x3
+; 64BIT-NEXT:     BL8_NOP &".___memmove64[PR]", csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x2, implicit-def $r1, implicit-def $x3
 ; 64BIT-NEXT:     ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
 ; 64BIT:          ADJCALLSTACKDOWN 368, 0, implicit-def dead $r1, implicit $r1
 ; 64BIT-DAG:      $x3 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x4 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x5 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x6 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x7 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x8 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x9 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x10 = COPY %{{[0-9]+}}
 ; 64BIT-NEXT:     BL8_NOP <mcsymbol .test_byval_mem2>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1
 ; 64BIT-NEXT:     ADJCALLSTACKUP 368, 0, implicit-def dead $r1, implicit $r1
 
 ; ASM64BIT:       stdu 1, -368(1)
 ; ASM64BIT-DAG:   addi 3, 1, 112
 ; ASM64BIT-DAG:   ld 4, L..C{{[0-9]+}}(2)
 ; ASM64BIT-DAG:   li 5, 256
 ; ASM64BIT-DAG:   std 0, 384(1)
-; ASM64BIT-NEXT:  bl .memcpy[PR]
+; ASM64BIT-NEXT:  bl .___memmove64[PR]
 ; ASM64BIT:       bl .test_byval_mem2
 ; ASM64BIT:       addi 1, 1, 368
 
 
 define zeroext i8 @test_byval_mem2(i32, i32, i32, i32, i32, i32, i32, i32, ptr byval(%struct_S256) align 1 %s) {
 entry:
   %gep = getelementptr inbounds %struct_S256, ptr %s, i32 0, i32 0, i32 255
   %load = load i8, ptr %gep, align 1

 ; 32BIT:          ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
 ; 32BIT-NEXT:     %0:gprc_and_gprc_nor0 = LWZtoc @gS57, $r2 :: (load (s32) from got)
 ; 32BIT-NEXT:     %1:gprc = nuw ADDI %0, 24
 ; 32BIT-NEXT:     %2:gprc = nuw ADDI $r1, 56
 ; 32BIT-NEXT:     %3:gprc = LI 33
 ; 32BIT-DAG:      $r3 = COPY %2
 ; 32BIT-DAG:      $r4 = COPY %1
 ; 32BIT-DAG:      $r5 = COPY %3
-; 32BIT-NEXT:     BL_NOP &".memcpy[PR]", csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r2, implicit-def $r1, implicit-def $r3
+; 32BIT-NEXT:     BL_NOP &".___memmove[PR]", csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r2, implicit-def $r1, implicit-def $r3
 ; 32BIT-NEXT:     ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
 ; 32BIT:          ADJCALLSTACKDOWN 92, 0, implicit-def dead $r1, implicit $r1
 ; 32BIT-DAG:      $r3 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $f1 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r5 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r6 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r7 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r8 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r9 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r10 = COPY %{{[0-9]+}}
 ; 32BIT-NEXT:     BL_NOP <mcsymbol .test_byval_mem3>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $f1, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1
 ; 32BIT-NEXT:     ADJCALLSTACKUP 92, 0, implicit-def dead $r1, implicit $r1
 
 ; CHECKASM-LABEL: .call_test_byval_mem3:
 
 ; ASM32BIT:       stwu 1, -96(1)
 ; ASM32BIT-DAG:   lwz [[REG:[0-9]+]], L..C{{[0-9]+}}(2)
 ; ASM32BIT-DAG:   addi 3, 1, 56
 ; ASM32BIT-DAG:   addi 4, [[REG]], 24
 ; ASM32BIT-DAG:   li 5, 33
-; ASM32BIT-NEXT:  bl .memcpy[PR]
+; ASM32BIT-NEXT:  bl .___memmove[PR]
 ; ASM32BIT-DAG:   lwz 5, 0([[REG]])
 ; ASM32BIT-DAG:   lwz 6, 4([[REG]])
 ; ASM32BIT-DAG:   lwz 7, 8([[REG]])
 ; ASM32BIT-DAG:   lwz 8, 12([[REG]])
 ; ASM32BIT-DAG:   lwz 9, 16([[REG]])
 ; ASM32BIT-DAG:   lwz 10, 20([[REG]])
 ; ASM32BIT:       bl .test_byval_mem3
 ; ASM32BIT:       addi 1, 1, 96

 ; Confirm the expected memcpy call is independent of the call to test_byval_mem4.
 ; 32BIT:          ADJCALLSTACKDOWN 56, 0, implicit-def dead $r1, implicit $r1
 ; 32BIT-NEXT:     %3:gprc = nuw ADDI $r1, 60
 ; 32BIT-NEXT:     %4:gprc = LWZtoc @gS256, $r2 :: (load (s32) from got)
 ; 32BIT-NEXT:     %5:gprc = LI 256
 ; 32BIT-DAG:      $r3 = COPY %3
 ; 32BIT-DAG:      $r4 = COPY %4
 ; 32BIT-DAG:      $r5 = COPY %5
-; 32BIT-NEXT:     BL_NOP &".memcpy[PR]", csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r2, implicit-def $r1, implicit-def $r3
+; 32BIT-NEXT:     BL_NOP &".___memmove[PR]", csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r2, implicit-def $r1, implicit-def $r3
 ; 32BIT-NEXT:     ADJCALLSTACKUP 56, 0, implicit-def dead $r1, implicit $r1
 ; 32BIT:          ADJCALLSTACKDOWN 316, 0, implicit-def dead $r1, implicit $r1
 ; 32BIT-DAG:      $r3 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r4 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r5 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r6 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r7 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r8 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r9 = COPY %{{[0-9]+}}
 ; 32BIT-DAG:      $r10 = COPY %{{[0-9]+}}
 ; 32BIT-NEXT:     BL_NOP <mcsymbol .test_byval_mem4>, csr_aix32, implicit-def dead $lr, implicit $rm, implicit $r3, implicit $r4, implicit $r5, implicit $r6, implicit $r7, implicit $r8, implicit $r9, implicit $r10, implicit $r2, implicit-def $r1
 ; 32BIT-NEXT:     ADJCALLSTACKUP 316, 0, implicit-def dead $r1, implicit $r1
 
 ; ASM32BIT:       stwu 1, -320(1)
 ; ASM32BIT-NEXT:  stw 0, 328(1)
 ; ASM32BIT-DAG:   stw [[REG1:[0-9]+]], {{[0-9]+}}(1)
 ; ASM32BIT-DAG:   lwz [[REG1]], L..C{{[0-9]+}}(2)
 ; ASM32BIT-DAG:   lhz [[REG2:[0-9]+]], 28([[REG1]])
 ; ASM32BIT-DAG:   sth [[REG2]], 56(1)
 ; ASM32BIT-DAG:   lbz [[REG3:[0-9]+]], 30([[REG1]])
 ; ASM32BIT-DAG:   stb [[REG3]], 58(1)
 ; ASM32BIT-DAG:   addi 3, 1, 60
 ; ASM32BIT-DAG:   lwz 4, L..C{{[0-9]+}}(2)
 ; ASM32BIT-DAG:   li 5, 256
-; ASM32BIT-NEXT:  bl .memcpy[PR]
+; ASM32BIT-NEXT:  bl .___memmove[PR]
 ; ASM32BIT-DAG:   lwz 4, 0([[REG1]])
 ; ASM32BIT-DAG:   lwz 5, 4([[REG1]])
 ; ASM32BIT-DAG:   lwz 6, 8([[REG1]])
 ; ASM32BIT-DAG:   lwz 7, 12([[REG1]])
 ; ASM32BIT-DAG:   lwz 8, 16([[REG1]])
 ; ASM32BIT-DAG:   lwz 9, 20([[REG1]])
 ; ASM32BIT-DAG:   lwz 10, 24([[REG1]])
 ; ASM32BIT:       bl .test_byval_mem4
 ; ASM32BIT:       addi 1, 1, 320
 
 ; Confirm the expected memcpy call is independent of the call to test_byval_mem4.
 ; 64BIT:          ADJCALLSTACKDOWN 112, 0, implicit-def dead $r1, implicit $r1
 ; 64BIT-NEXT:     %0:g8rc_and_g8rc_nox0 = LDtoc @gS256, $x2 :: (load (s64) from got)
 ; 64BIT-NEXT:     %1:g8rc = nuw ADDI8 %0, 24
 ; 64BIT-NEXT:     %2:g8rc = nuw ADDI8 $x1, 112
 ; 64BIT-NEXT:     %3:g8rc = LI8 232
 ; 64BIT-DAG:      $x3 = COPY %2
 ; 64BIT-DAG:      $x4 = COPY %1
 ; 64BIT-DAG:      $x5 = COPY %3
-; 64BIT-NEXT:     BL8_NOP &".memcpy[PR]", csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x2, implicit-def $r1, implicit-def $x3
+; 64BIT-NEXT:     BL8_NOP &".___memmove64[PR]", csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x2, implicit-def $r1, implicit-def $x3
 ; 64BIT-NEXT:     ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
 ; 64BIT:          ADJCALLSTACKDOWN 344, 0, implicit-def dead $r1, implicit $r1
 ; 64BIT-DAG:      $x3 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x4 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x5 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x6 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x7 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x8 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x9 = COPY %{{[0-9]+}}
 ; 64BIT-DAG:      $x10 = COPY %{{[0-9]+}}
 ; 64BIT-NEXT:     BL8_NOP <mcsymbol .test_byval_mem4>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x2, implicit-def $r1
 ; 64BIT-NEXT:     ADJCALLSTACKUP 344, 0, implicit-def dead $r1, implicit $r1
 
 ; ASM64BIT:       stdu 1, -352(1)
 ; ASM64BIT-DAG:   ld [[REG1:[0-9]+]], L..C{{[0-9]+}}(2)
 ; ASM64BIT-DAG:   addi 3, 1, 112
 ; ASM64BIT-DAG:   addi 4, [[REG1]], 24
 ; ASM64BIT-DAG:   li 5, 232
-; ASM64BIT-NEXT:  bl .memcpy[PR]
+; ASM64BIT-NEXT:  bl .___memmove64[PR]
 ; ASM64BIT-DAG:   ld [[REG2:[0-9]+]], L..C{{[0-9]+}}(2)
 ; ASM64BIT-DAG:   ld 4, 0([[REG2]])
 ; ASM64BIT-DAG:   ld 5, 8([[REG2]])
 ; ASM64BIT-DAG:   ld 6, 16([[REG2]])
 ; ASM64BIT-DAG:   lwz [[REG3:[0-9]+]], 24([[REG2]])
 ; ASM64BIT-DAG:   lhz [[REG4:[0-9]+]], 28([[REG2]])
 ; ASM64BIT-DAG:   lbz 7, 30([[REG2]])
 ; ASM64BIT-DAG:   rlwinm 7, 7, 8, 16, 23

llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll

 ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec < %s | \
-; RUN:   FileCheck %s
+; RUN:   FileCheck --check-prefix=CHECK32 %s
 
 ; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 -mattr=-altivec < %s | \
-; RUN:   FileCheck %s
+; RUN:   FileCheck --check-prefix=CHECK64 %s
 
 ; RUN: llc -verify-machineinstrs -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr4 \
 ; RUN:     -mattr=-altivec -filetype=obj -o %t.o < %s
 ; RUN: llvm-readobj --symbols %t.o | FileCheck --check-prefixes=CHECKSYM,CHECKSYM32 %s
 ; RUN: llvm-objdump -r -d --symbol-description %t.o | FileCheck --check-prefixes=CHECKRELOC,CHECKRELOC32 %s
 
 ; RUN: llc -verify-machineinstrs -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr4 \
 ; RUN:     -mattr=-altivec -filetype=obj -o %t64.o < %s

 }
 
 declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
 
 ; CHECK-LABEL: .bar:
 ; CHECK-NEXT: # %bb.0:                                # %entry
 ; CHECK-NEXT:         mflr 0
 
-; CHECK:              bl .memset
-
-; CHECK:              .extern .memset
+; CHECK32:              bl .___memset
+; CHECK32:              .extern .___memset
+; CHECK64:              bl .___memset64
+; CHECK64:              .extern .___memset64
 
 ; CHECKSYM:        Symbol {
 ; CHECKSYM-NEXT:     Index: 0
 ; CHECKSYM-NEXT:     Name: <stdin>
 ; CHECKSYM-NEXT:     Value (SymbolTableIndex): 0x0
 ; CHECKSYM-NEXT:     Section: N_DEBUG
 ; CHECKSYM-NEXT:     Source Language ID: TB_C (0x0)
 ; CHECKSYM-NEXT:     CPU Version ID: 0x0
 ; CHECKSYM-NEXT:     StorageClass: C_FILE (0x67)
 ; CHECKSYM-NEXT:     NumberOfAuxEntries: 0
 ; CHECKSYM-NEXT:   }
 ; CHECKSYM-NEXT:   Symbol {
 ; CHECKSYM-NEXT:     Index: 1
-; CHECKSYM-NEXT:     Name: .memset
+; CHECKSYM32-NEXT:     Name: .___memset
+; CHECKSYM64-NEXT:     Name: .___memset64
 ; CHECKSYM-NEXT:     Value (RelocatableAddress): 0x0
 ; CHECKSYM-NEXT:     Section: N_UNDEF
 ; CHECKSYM-NEXT:     Type: 0x0
 ; CHECKSYM-NEXT:     StorageClass: C_EXT (0x2)
 ; CHECKSYM-NEXT:     NumberOfAuxEntries: 1
 ; CHECKSYM-NEXT:     CSECT Auxiliary Entry {
 ; CHECKSYM-NEXT:       Index: 2
 ; CHECKSYM-NEXT:       SectionLen: 0

 ; CHECKRELOC32-NEXT:        c: 90 01 00 48                      stw 0, 72(1)
 ; CHECKRELOC64-NEXT:        4: f8 21 ff 91                      stdu 1, -112(1)
 ; CHECKRELOC64-NEXT:        8: e8 62 00 00                      ld 3, 0(2)
 ; CHECKRELOC64-NEXT:    000000000000000a:  R_TOC  (idx: 13) s[TC]
 ; CHECKRELOC64-NEXT:        c: f8 01 00 80                      std 0, 128(1)
 ; CHECKRELOC-NEXT:       10: 80 83 00 04                        lwz 4, 4(3)
 ; CHECKRELOC-NEXT:       14: 7c 85 23 78                        mr 5, 4
 ; CHECKRELOC-NEXT:       18: 4b ff ff e9                        bl 0x0
-; CHECKRELOC32-NEXT:    00000018:  R_RBR        (idx: 1) .memset[PR]
-; CHECKRELOC64-NEXT:    0000000000000018:  R_RBR  (idx: 1) .memset[PR]
+; CHECKRELOC32-NEXT:    00000018:  R_RBR        (idx: 1) .___memset[PR]
+; CHECKRELOC64-NEXT:    0000000000000018:  R_RBR  (idx: 1) .___memset64[PR]

llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll

 
 ; This test check
 ; 1. The symbol table for .o file to verify .memcpy is a defined external label.
 ; 2. There is no relocation associated with the call, since callee is defined.
 ; 3. Branch instruction in raw data is branching back to the right callee location.
 
 ; CHECK-NOT: .extern .memcpy
 
+; 32-SYM:      Symbol {{[{][[:space:]] *}}Index: [[#Index:]]{{[[:space:]] *}}Name: .___memmove
+; 32-SYM-NEXT:    Value (RelocatableAddress): 0x0
+; 32-SYM-NEXT:    Section: N_UNDEF
+; 32-SYM-NEXT:    Type: 0x0
+; 32-SYM-NEXT:    StorageClass: C_EXT (0x2)
+; 32-SYM-NEXT:    NumberOfAuxEntries: 1
+; 32-SYM-NEXT:    CSECT Auxiliary Entry {
+; 32-SYM-NEXT:      Index: 2
+; 32-SYM-NEXT:      SectionLen: 0
+; 32-SYM-NEXT:      ParameterHashIndex: 0x0
+; 32-SYM-NEXT:      TypeChkSectNum: 0x0
+; 32-SYM-NEXT:      SymbolAlignmentLog2: 0
+; 32-SYM-NEXT:      SymbolType: XTY_ER (0x0)
+; 32-SYM-NEXT:      StorageMappingClass: XMC_PR (0x0)
+; 32-SYM-NEXT:      StabInfoIndex: 0x0
+; 32-SYM-NEXT:      StabSectNum: 0x0
+; 32-SYM-NEXT:    }
+; 32-SYM-NEXT:  }
+
 ; 32-SYM:      Symbol {{[{][[:space:]] *}}Index: [[#Index:]]{{[[:space:]] *}}Name: .memcpy 
 ; 32-SYM-NEXT:    Value (RelocatableAddress): 0x0
 ; 32-SYM-NEXT:    Section: .text
 ; 32-SYM-NEXT:    Type: 0x0
 ; 32-SYM-NEXT:    StorageClass: C_EXT (0x2)
 ; 32-SYM-NEXT:    NumberOfAuxEntries: 1
 ; 32-SYM-NEXT:    CSECT Auxiliary Entry {
-; 32-SYM-NEXT:      Index: 4
-; 32-SYM-NEXT:      ContainingCsectSymbolIndex: 1
+; 32-SYM-NEXT:      Index: 6
+; 32-SYM-NEXT:      ContainingCsectSymbolIndex: 3
 ; 32-SYM-NEXT:      ParameterHashIndex: 0x0
 ; 32-SYM-NEXT:      TypeChkSectNum: 0x0
 ; 32-SYM-NEXT:      SymbolAlignmentLog2: 0
 ; 32-SYM-NEXT:      SymbolType: XTY_LD (0x2)
 ; 32-SYM-NEXT:      StorageMappingClass: XMC_PR (0x0)
 ; 32-SYM-NEXT:      StabInfoIndex: 0x0
 ; 32-SYM-NEXT:      StabSectNum: 0x0
 ; 32-SYM-NEXT:    }
 ; 32-SYM-NEXT:  }
 
 ; 32-SYM-NOT: .memcpy
 
 ; 32-REL:      Relocations [
+; 32-REL-NEXT:  Section (index: 1) .text {
+; 32-REL-NEXT:  Relocation {
+; 32-REL-NEXT:    Virtual Address: 0x1C
+; 32-REL-NEXT:    Symbol: .___memmove (1)
+; 32-REL-NEXT:    IsSigned: Yes
+; 32-REL-NEXT:    FixupBitValue: 0
+; 32-REL-NEXT:    Length: 26
+; 32-REL-NEXT:    Type: R_RBR (0x1A)
+; 32-REL-NEXT:  }
+; 32-REL-NEXT:}
 ; 32-REL-NEXT:  Section (index: 2) .data {
 ; 32-REL-NEXT:  Relocation {
 ; 32-REL-NEXT:    Virtual Address: 0x34
-; 32-REL-NEXT:    Symbol: .memcpy (3)
+; 32-REL-NEXT:    Symbol: .memcpy (5)
 ; 32-REL-NEXT:    IsSigned: No
 ; 32-REL-NEXT:    FixupBitValue: 0
 ; 32-REL-NEXT:    Length: 32
 ; 32-REL-NEXT:    Type: R_POS (0x0)
 ; 32-REL-NEXT:  }
 ; 32-REL-NEXT:  Relocation {
 ; 32-REL-NEXT:    Virtual Address: 0x38
-; 32-REL-NEXT:    Symbol: TOC (11)
+; 32-REL-NEXT:    Symbol: TOC (13)
 ; 32-REL-NEXT:    IsSigned: No
 ; 32-REL-NEXT:    FixupBitValue: 0
 ; 32-REL-NEXT:    Length: 32
 ; 32-REL-NEXT:    Type: R_POS (0x0)
 ; 32-REL-NEXT:  }
 ; 32-REL-NEXT:  Relocation {
 ; 32-REL-NEXT:    Virtual Address: 0x40
-; 32-REL-NEXT:    Symbol: .call_memcpy (5)
+; 32-REL-NEXT:    Symbol: .call_memcpy (7)
 ; 32-REL-NEXT:    IsSigned: No
 ; 32-REL-NEXT:    FixupBitValue: 0
 ; 32-REL-NEXT:    Length: 32
 ; 32-REL-NEXT:    Type: R_POS (0x0)
 ; 32-REL-NEXT:  }
 ; 32-REL-NEXT:  Relocation {
 ; 32-REL-NEXT:    Virtual Address: 0x44
-; 32-REL-NEXT:    Symbol: TOC (11)
+; 32-REL-NEXT:    Symbol: TOC (13)
 ; 32-REL-NEXT:    IsSigned: No
 ; 32-REL-NEXT:    FixupBitValue: 0
 ; 32-REL-NEXT:    Length: 32
 ; 32-REL-NEXT:    Type: R_POS (0x0)
 ; 32-REL-NEXT:  }
 ; 32-REL-NEXT:  }
 ; 32-REL-NEXT: ]