[BOLT][AArch64] Replace NOP with adrp in AdrRelaxationPass to preserve relative offsets.

[treapster]

Summary

Avoid replacing one adr instruction with two adrp+add by utilizing linker-provided nops when they are present. By doing so we preserve relative offsets of next instructions in a function which reduces chances to break undetected jump tables. This commit makes release-mode lld-linked clang, lld and etc work after BOLT, because they have jump tables which rely on offsets in a function.

[treapster]

Gentle ping

[rafauler]

Looks good to me, but who wrote this was @yota9. @yota9 can you take a look at these changes?

bolt/test/runtime/AArch64/adrrelaxationpass.s

3

nit: I think this file is 80column, can you format the text?

18

nit: break command line for 80-column:

# RUN: not llvm-bolt %t.exe -o %t.bolt --adr-relaxation=true --strict \
# RUN:   2>&1 | FileCheck %s --check-prefix CHECK-ERROR

[yota9]

LGTM, please check @rafaelauler comments.

[treapster]

Fix nits

bolt/lib/Passes/ADRRelaxationPass.cpp

 //===- bolt/Passes/ADRRelaxationPass.cpp ----------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements the ADRRelaxationPass class.
 //
 //===----------------------------------------------------------------------===//
 
 #include "bolt/Passes/ADRRelaxationPass.h"
 #include "bolt/Core/ParallelUtilities.h"
+#include "bolt/Utils/CommandLineOpts.h"
+#include <iterator>
 
 using namespace llvm;
 
 namespace opts {
 extern cl::OptionCategory BoltCategory;
 
 static cl::opt<bool>
     AdrPassOpt("adr-relaxation",
for (auto It = BB.begin(); It != BB.end(); ++It) {
       if (TargetBF && TargetBF == &BF)
         continue;
 
       MCPhysReg Reg;
       BC.MIB->getADRReg(Inst, Reg);
       int64_t Addend = BC.MIB->getTargetAddend(Inst);
       InstructionListType Addr =
           BC.MIB->materializeAddress(Symbol, BC.Ctx.get(), Reg, Addend);
+
+      if (It != BB.begin() && BC.MIB->isNoop(*std::prev(It))) {
+        It = BB.eraseInstruction(std::prev(It));
+      } else if (opts::StrictMode && !BF.isSimple()) {
+        // If the function is not simple, it may contain a jump table undetected
+        // by us. This jump table may use an offset from the branch instruction
+        // to land in the desired place. If we add new instructions, we
+        // invalidate this offset, so we have to rely on linker-inserted NOP to
+        // replace it with ADRP, and abort if it is not present.
+        errs() << formatv("BOLT-ERROR: Cannot relax adr in non-simple function "
+                          "{0}. Can't proceed in current mode.\n",
+                          BF.getOneName());
+        exit(1);
+      }
       It = BB.replaceInstruction(It, Addr);
     }
   }
 }
 
 void ADRRelaxationPass::runOnFunctions(BinaryContext &BC) {
   if (!opts::AdrPassOpt || !BC.HasRelocations)
     return;

bolt/test/runtime/AArch64/adrrelaxationpass.s

 # The second and third ADR instructions are non-local to functions
 # and must be replaced with ADRP + ADD by BOLT
+# Also since main is non-simple, we can't change it's length so we have to
+# replace NOP with adrp, and if there is no nop before adr in non-simple
+# function, we can't guarantee we didn't break possible jump tables, so we
+# fail in strict mode
 
 # REQUIRES: system-linux
 
 # RUN: llvm-mc -filetype=obj -triple aarch64-unknown-unknown \
 # RUN:   %s -o %t.o
 # RUN: %clang %cflags %t.o -o %t.exe -Wl,-q
 # RUN: llvm-bolt %t.exe -o %t.bolt --adr-relaxation=true
 # RUN: llvm-objdump --no-print-imm-hex -d --disassemble-symbols=main %t.bolt | FileCheck %s
 # RUN: %t.bolt
+# RUN: not llvm-bolt %t.exe -o %t.bolt --adr-relaxation=true --strict \
+# RUN: 2>&1 | FileCheck %s --check-prefix CHECK-ERROR
 
   .data
   .align 8
   .global Gvar
 Gvar: .xword 0x0
   .global Gvar2
 Gvar2: .xword 0x42
 
   .text
   .align 4
   .global test
   .type test, %function
 test:
   mov x0, xzr
   ret
   .size test, .-test
 
   .align 4
   .global main
   .type main, %function
 main:
   adr x0, .CI
+  nop
   adr x1, test
   adr x2, Gvar2
   adr x3, br
 br:
   br x1
   .size main, .-main
 .CI:
   .word 0xff
 
 # CHECK: <main>:
 # CHECK-NEXT: adr x0, 0x{{[1-8a-f][0-9a-f]*}}
 # CHECK-NEXT: adrp x1, 0x{{[1-8a-f][0-9a-f]*}}
 # CHECK-NEXT: add x1, x1, #{{[1-8a-f][0-9a-f]*}}
 # CHECK-NEXT: adrp x2, 0x{{[1-8a-f][0-9a-f]*}}
 # CHECK-NEXT: add x2, x2, #{{[1-8a-f][0-9a-f]*}}
 # CHECK-NEXT: adr x3, 0x{{[1-8a-f][0-9a-f]*}}
+# CHECK-ERROR: BOLT-ERROR: Cannot relax adr in non-simple function main