[X86][MemFold] Update some records for X86MemFoldTables.inc

[yubing]

Summary

Update X86MemFoldTables.inc according to https://reviews.llvm.org/D142084's auto-gen table

[yubing]

sorry, i haven't run check-all. please wait, i may need to check testcases passrate

[yubing]

In D143149#4098824, @yubing wrote:

sorry, i haven't run check-all. please wait, i may need to check testcases passrate

check-all fails are not related

[skan]

Merge this patch into https://reviews.llvm.org/D142084 , then we can have a test coverage.

[yubing]

update records according to https://reviews.llvm.org/D142084

[skan]

Generally LGTM, but could we remove the blank line at the end of the file?

[yubing]

In D143149#4151875, @skan wrote:

Generally LGTM, but could we remove the blank line at the end of the file?

do we need to remove the blank line between each table, actually the blank line is generated by:

void printTable(const FoldTable &Table, StringRef TableName,
                formatted_raw_ostream &OS) {
  OS << "static const X86MemoryFoldTableEntry MemoryFold" << TableName
     << "[] = {\n";

  for (auto &E : Table)
    E.second.print(OS);

  OS << "};\n\n";
}

if we change OS << "};\n\n"; to OS << "};\n";
the blank line between each table will be lost as well.

[skan]

In D143149#4177139, @yubing wrote:

In D143149#4151875, @skan wrote:

Generally LGTM, but could we remove the blank line at the end of the file?

do we need to remove the blank line between each table, actually the blank line is generated by:

void printTable(const FoldTable &Table, StringRef TableName,
                formatted_raw_ostream &OS) {
  OS << "static const X86MemoryFoldTableEntry MemoryFold" << TableName
     << "[] = {\n";

  for (auto &E : Table)
    E.second.print(OS);

  OS << "};\n\n";
}

if we change OS << "};\n\n"; to OS << "};\n";
the blank line between each table will be lost as well.

I see. I thought it is an accidental blank

[yubing]

rebase

llvm/lib/Target/X86/X86MemFoldTables.inc

static const X86MemoryFoldTableEntry MemoryFoldTable0[] = {
   {X86::IMUL64r, X86::IMUL64m, TB_FOLDED_LOAD},
   {X86::IMUL8r, X86::IMUL8m, TB_FOLDED_LOAD},
   {X86::JMP16r, X86::JMP16m, TB_FOLDED_LOAD},
   {X86::JMP16r_NT, X86::JMP16m_NT, TB_FOLDED_LOAD},
   {X86::JMP32r, X86::JMP32m, TB_FOLDED_LOAD},
   {X86::JMP32r_NT, X86::JMP32m_NT, TB_FOLDED_LOAD},
   {X86::JMP64r, X86::JMP64m, TB_FOLDED_LOAD},
   {X86::JMP64r_NT, X86::JMP64m_NT, TB_FOLDED_LOAD},
+  {X86::JMP64r_REX, X86::JMP64m_REX, TB_FOLDED_LOAD},
   {X86::MMX_MOVD64from64rr, X86::MMX_MOVQ64mr, TB_FOLDED_STORE},
   {X86::MMX_MOVD64grr, X86::MMX_MOVD64mr, TB_FOLDED_STORE},
   {X86::MOV16ri, X86::MOV16mi, TB_FOLDED_STORE},
-  {X86::MOV16rr, X86::MOV16mr, TB_FOLDED_STORE},
+  {X86::MOV16rr, X86::MOV16mr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::MOV32ri, X86::MOV32mi, TB_FOLDED_STORE},
-  {X86::MOV32rr, X86::MOV32mr, TB_FOLDED_STORE},
+  {X86::MOV32rr, X86::MOV32mr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::MOV64ri32, X86::MOV64mi32, TB_FOLDED_STORE},
-  {X86::MOV64rr, X86::MOV64mr, TB_FOLDED_STORE},
+  {X86::MOV64rr, X86::MOV64mr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::MOV64toSDrr, X86::MOV64mr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::MOV8ri, X86::MOV8mi, TB_FOLDED_STORE},
-  {X86::MOV8rr, X86::MOV8mr, TB_FOLDED_STORE},
-  {X86::MOV8rr_NOREX, X86::MOV8mr_NOREX, TB_FOLDED_STORE},
-  {X86::MOVAPDrr, X86::MOVAPDmr, TB_FOLDED_STORE|TB_ALIGN_16},
-  {X86::MOVAPSrr, X86::MOVAPSmr, TB_FOLDED_STORE|TB_ALIGN_16},
+  {X86::MOV8rr, X86::MOV8mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::MOV8rr_NOREX, X86::MOV8mr_NOREX, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::MOVAPDrr, X86::MOVAPDmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16},
+  {X86::MOVAPSrr, X86::MOVAPSmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16},
   {X86::MOVDI2SSrr, X86::MOV32mr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::MOVDQArr, X86::MOVDQAmr, TB_FOLDED_STORE|TB_ALIGN_16},
   {X86::MOVDQUrr, X86::MOVDQUmr, TB_FOLDED_STORE},
   {X86::MOVPDI2DIrr, X86::MOVPDI2DImr, TB_FOLDED_STORE},
   {X86::MOVPQIto64rr, X86::MOVPQI2QImr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::MOVSDto64rr, X86::MOVSDmr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::MOVSS2DIrr, X86::MOVSSmr, TB_FOLDED_STORE},
-  {X86::MOVUPDrr, X86::MOVUPDmr, TB_FOLDED_STORE},
-  {X86::MOVUPSrr, X86::MOVUPSmr, TB_FOLDED_STORE},
+  {X86::MOVUPDrr, X86::MOVUPDmr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::MOVUPSrr, X86::MOVUPSmr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::MUL16r, X86::MUL16m, TB_FOLDED_LOAD},
   {X86::MUL32r, X86::MUL32m, TB_FOLDED_LOAD},
   {X86::MUL64r, X86::MUL64m, TB_FOLDED_LOAD},
   {X86::MUL8r, X86::MUL8m, TB_FOLDED_LOAD},
   {X86::PEXTRDrr, X86::PEXTRDmr, TB_FOLDED_STORE},
   {X86::PEXTRQrr, X86::PEXTRQmr, TB_FOLDED_STORE},
   {X86::PTWRITE64r, X86::PTWRITE64m, TB_FOLDED_LOAD},
   {X86::PTWRITEr, X86::PTWRITEm, TB_FOLDED_LOAD},
static const X86MemoryFoldTableEntry MemoryFoldTable0[] = {
   {X86::VEXTRACTI32x8Zrr, X86::VEXTRACTI32x8Zmr, TB_FOLDED_STORE},
   {X86::VEXTRACTI64x2Z256rr, X86::VEXTRACTI64x2Z256mr, TB_FOLDED_STORE},
   {X86::VEXTRACTI64x2Zrr, X86::VEXTRACTI64x2Zmr, TB_FOLDED_STORE},
   {X86::VEXTRACTI64x4Zrr, X86::VEXTRACTI64x4Zmr, TB_FOLDED_STORE},
   {X86::VEXTRACTPSZrr, X86::VEXTRACTPSZmr, TB_FOLDED_STORE},
   {X86::VEXTRACTPSrr, X86::VEXTRACTPSmr, TB_FOLDED_STORE},
   {X86::VMOV64toSDZrr, X86::MOV64mr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::VMOV64toSDrr, X86::MOV64mr, TB_FOLDED_STORE|TB_NO_REVERSE},
-  {X86::VMOVAPDYrr, X86::VMOVAPDYmr, TB_FOLDED_STORE|TB_ALIGN_32},
-  {X86::VMOVAPDZ128rr, X86::VMOVAPDZ128mr, TB_FOLDED_STORE|TB_ALIGN_16},
-  {X86::VMOVAPDZ256rr, X86::VMOVAPDZ256mr, TB_FOLDED_STORE|TB_ALIGN_32},
-  {X86::VMOVAPDZrr, X86::VMOVAPDZmr, TB_FOLDED_STORE|TB_ALIGN_64},
-  {X86::VMOVAPDrr, X86::VMOVAPDmr, TB_FOLDED_STORE|TB_ALIGN_16},
-  {X86::VMOVAPSYrr, X86::VMOVAPSYmr, TB_FOLDED_STORE|TB_ALIGN_32},
-  {X86::VMOVAPSZ128rr, X86::VMOVAPSZ128mr, TB_FOLDED_STORE|TB_ALIGN_16},
-  {X86::VMOVAPSZ256rr, X86::VMOVAPSZ256mr, TB_FOLDED_STORE|TB_ALIGN_32},
-  {X86::VMOVAPSZrr, X86::VMOVAPSZmr, TB_FOLDED_STORE|TB_ALIGN_64},
-  {X86::VMOVAPSrr, X86::VMOVAPSmr, TB_FOLDED_STORE|TB_ALIGN_16},
+  {X86::VMOVAPDYrr, X86::VMOVAPDYmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32},
+  {X86::VMOVAPDZ128rr, X86::VMOVAPDZ128mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16},
+  {X86::VMOVAPDZ256rr, X86::VMOVAPDZ256mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32},
+  {X86::VMOVAPDZrr, X86::VMOVAPDZmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_64},
+  {X86::VMOVAPDrr, X86::VMOVAPDmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16},
+  {X86::VMOVAPSYrr, X86::VMOVAPSYmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32},
+  {X86::VMOVAPSZ128rr, X86::VMOVAPSZ128mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16},
+  {X86::VMOVAPSZ256rr, X86::VMOVAPSZ256mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32},
+  {X86::VMOVAPSZrr, X86::VMOVAPSZmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_64},
+  {X86::VMOVAPSrr, X86::VMOVAPSmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16},
   {X86::VMOVDI2SSZrr, X86::MOV32mr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::VMOVDI2SSrr, X86::MOV32mr, TB_FOLDED_STORE|TB_NO_REVERSE},
-  {X86::VMOVDQA32Z128rr, X86::VMOVDQA32Z128mr, TB_FOLDED_STORE|TB_ALIGN_16},
-  {X86::VMOVDQA32Z256rr, X86::VMOVDQA32Z256mr, TB_FOLDED_STORE|TB_ALIGN_32},
-  {X86::VMOVDQA32Zrr, X86::VMOVDQA32Zmr, TB_FOLDED_STORE|TB_ALIGN_64},
-  {X86::VMOVDQA64Z128rr, X86::VMOVDQA64Z128mr, TB_FOLDED_STORE|TB_ALIGN_16},
-  {X86::VMOVDQA64Z256rr, X86::VMOVDQA64Z256mr, TB_FOLDED_STORE|TB_ALIGN_32},
-  {X86::VMOVDQA64Zrr, X86::VMOVDQA64Zmr, TB_FOLDED_STORE|TB_ALIGN_64},
+  {X86::VMOVDQA32Z128rr, X86::VMOVDQA32Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16},
+  {X86::VMOVDQA32Z256rr, X86::VMOVDQA32Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32},
+  {X86::VMOVDQA32Zrr, X86::VMOVDQA32Zmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_64},
+  {X86::VMOVDQA64Z128rr, X86::VMOVDQA64Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_16},
+  {X86::VMOVDQA64Z256rr, X86::VMOVDQA64Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_32},
+  {X86::VMOVDQA64Zrr, X86::VMOVDQA64Zmr, TB_FOLDED_STORE|TB_NO_REVERSE|TB_ALIGN_64},
   {X86::VMOVDQAYrr, X86::VMOVDQAYmr, TB_FOLDED_STORE|TB_ALIGN_32},
   {X86::VMOVDQArr, X86::VMOVDQAmr, TB_FOLDED_STORE|TB_ALIGN_16},
-  {X86::VMOVDQU16Z128rr, X86::VMOVDQU16Z128mr, TB_FOLDED_STORE},
-  {X86::VMOVDQU16Z256rr, X86::VMOVDQU16Z256mr, TB_FOLDED_STORE},
-  {X86::VMOVDQU16Zrr, X86::VMOVDQU16Zmr, TB_FOLDED_STORE},
-  {X86::VMOVDQU32Z128rr, X86::VMOVDQU32Z128mr, TB_FOLDED_STORE},
-  {X86::VMOVDQU32Z256rr, X86::VMOVDQU32Z256mr, TB_FOLDED_STORE},
-  {X86::VMOVDQU32Zrr, X86::VMOVDQU32Zmr, TB_FOLDED_STORE},
-  {X86::VMOVDQU64Z128rr, X86::VMOVDQU64Z128mr, TB_FOLDED_STORE},
-  {X86::VMOVDQU64Z256rr, X86::VMOVDQU64Z256mr, TB_FOLDED_STORE},
-  {X86::VMOVDQU64Zrr, X86::VMOVDQU64Zmr, TB_FOLDED_STORE},
-  {X86::VMOVDQU8Z128rr, X86::VMOVDQU8Z128mr, TB_FOLDED_STORE},
-  {X86::VMOVDQU8Z256rr, X86::VMOVDQU8Z256mr, TB_FOLDED_STORE},
-  {X86::VMOVDQU8Zrr, X86::VMOVDQU8Zmr, TB_FOLDED_STORE},
+  {X86::VMOVDQU16Z128rr, X86::VMOVDQU16Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU16Z256rr, X86::VMOVDQU16Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU16Zrr, X86::VMOVDQU16Zmr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU32Z128rr, X86::VMOVDQU32Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU32Z256rr, X86::VMOVDQU32Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU32Zrr, X86::VMOVDQU32Zmr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU64Z128rr, X86::VMOVDQU64Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU64Z256rr, X86::VMOVDQU64Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU64Zrr, X86::VMOVDQU64Zmr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU8Z128rr, X86::VMOVDQU8Z128mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU8Z256rr, X86::VMOVDQU8Z256mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVDQU8Zrr, X86::VMOVDQU8Zmr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::VMOVDQUYrr, X86::VMOVDQUYmr, TB_FOLDED_STORE},
   {X86::VMOVDQUrr, X86::VMOVDQUmr, TB_FOLDED_STORE},
   {X86::VMOVPDI2DIZrr, X86::VMOVPDI2DIZmr, TB_FOLDED_STORE},
   {X86::VMOVPDI2DIrr, X86::VMOVPDI2DImr, TB_FOLDED_STORE},
   {X86::VMOVPQIto64Zrr, X86::VMOVPQI2QIZmr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::VMOVPQIto64rr, X86::VMOVPQI2QImr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::VMOVSDto64Zrr, X86::VMOVSDZmr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::VMOVSDto64rr, X86::VMOVSDmr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::VMOVSS2DIZrr, X86::VMOVSSZmr, TB_FOLDED_STORE},
   {X86::VMOVSS2DIrr, X86::VMOVSSmr, TB_FOLDED_STORE},
-  {X86::VMOVUPDYrr, X86::VMOVUPDYmr, TB_FOLDED_STORE},
-  {X86::VMOVUPDZ128rr, X86::VMOVUPDZ128mr, TB_FOLDED_STORE},
-  {X86::VMOVUPDZ256rr, X86::VMOVUPDZ256mr, TB_FOLDED_STORE},
-  {X86::VMOVUPDZrr, X86::VMOVUPDZmr, TB_FOLDED_STORE},
-  {X86::VMOVUPDrr, X86::VMOVUPDmr, TB_FOLDED_STORE},
-  {X86::VMOVUPSYrr, X86::VMOVUPSYmr, TB_FOLDED_STORE},
-  {X86::VMOVUPSZ128rr, X86::VMOVUPSZ128mr, TB_FOLDED_STORE},
-  {X86::VMOVUPSZ256rr, X86::VMOVUPSZ256mr, TB_FOLDED_STORE},
-  {X86::VMOVUPSZrr, X86::VMOVUPSZmr, TB_FOLDED_STORE},
-  {X86::VMOVUPSrr, X86::VMOVUPSmr, TB_FOLDED_STORE},
+  {X86::VMOVUPDYrr, X86::VMOVUPDYmr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVUPDZ128rr, X86::VMOVUPDZ128mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVUPDZ256rr, X86::VMOVUPDZ256mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVUPDZrr, X86::VMOVUPDZmr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVUPDrr, X86::VMOVUPDmr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVUPSYrr, X86::VMOVUPSYmr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVUPSZ128rr, X86::VMOVUPSZ128mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVUPSZ256rr, X86::VMOVUPSZ256mr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVUPSZrr, X86::VMOVUPSZmr, TB_FOLDED_STORE|TB_NO_REVERSE},
+  {X86::VMOVUPSrr, X86::VMOVUPSmr, TB_FOLDED_STORE|TB_NO_REVERSE},
   {X86::VPEXTRDZrr, X86::VPEXTRDZmr, TB_FOLDED_STORE},
   {X86::VPEXTRDrr, X86::VPEXTRDmr, TB_FOLDED_STORE},
   {X86::VPEXTRQZrr, X86::VPEXTRQZmr, TB_FOLDED_STORE},
   {X86::VPEXTRQrr, X86::VPEXTRQmr, TB_FOLDED_STORE},
   {X86::VPMOVDBZrr, X86::VPMOVDBZmr, TB_FOLDED_STORE},
   {X86::VPMOVDWZ256rr, X86::VPMOVDWZ256mr, TB_FOLDED_STORE},
   {X86::VPMOVDWZrr, X86::VPMOVDWZmr, TB_FOLDED_STORE},
   {X86::VPMOVQDZ256rr, X86::VPMOVQDZ256mr, TB_FOLDED_STORE},
static const X86MemoryFoldTableEntry MemoryFoldTable1[] = {
   {X86::CVTTSS2SIrr, X86::CVTTSS2SIrm, 0},
   {X86::CVTTSS2SIrr_Int, X86::CVTTSS2SIrm_Int, TB_NO_REVERSE},
   {X86::IMUL16rri, X86::IMUL16rmi, 0},
   {X86::IMUL16rri8, X86::IMUL16rmi8, 0},
   {X86::IMUL32rri, X86::IMUL32rmi, 0},
   {X86::IMUL32rri8, X86::IMUL32rmi8, 0},
   {X86::IMUL64rri32, X86::IMUL64rmi32, 0},
   {X86::IMUL64rri8, X86::IMUL64rmi8, 0},
+  {X86::KMOVBkk, X86::KMOVBkm, TB_NO_REVERSE},
+  {X86::KMOVDkk, X86::KMOVDkm, 0},
+  {X86::KMOVQkk, X86::KMOVQkm, 0},
+  {X86::KMOVWkk, X86::KMOVWkm, 0},
   {X86::LWPINS32rri, X86::LWPINS32rmi, 0},
   {X86::LWPINS64rri, X86::LWPINS64rmi, 0},
   {X86::LWPVAL32rri, X86::LWPVAL32rmi, 0},
   {X86::LWPVAL64rri, X86::LWPVAL64rmi, 0},
   {X86::LZCNT16rr, X86::LZCNT16rm, 0},
   {X86::LZCNT32rr, X86::LZCNT32rm, 0},
   {X86::LZCNT64rr, X86::LZCNT64rm, 0},
   {X86::MMX_CVTPD2PIrr, X86::MMX_CVTPD2PIrm, TB_ALIGN_16},
   {X86::MMX_CVTPI2PDrr, X86::MMX_CVTPI2PDrm, 0},
   {X86::MMX_CVTPS2PIrr, X86::MMX_CVTPS2PIrm, TB_NO_REVERSE},
   {X86::MMX_CVTTPD2PIrr, X86::MMX_CVTTPD2PIrm, TB_ALIGN_16},
   {X86::MMX_CVTTPS2PIrr, X86::MMX_CVTTPS2PIrm, TB_NO_REVERSE},
+  {X86::MMX_MOVD64rr, X86::MMX_MOVD64rm, 0},
   {X86::MMX_MOVD64to64rr, X86::MMX_MOVQ64rm, 0},
   {X86::MMX_PABSBrr, X86::MMX_PABSBrm, 0},
   {X86::MMX_PABSDrr, X86::MMX_PABSDrm, 0},
   {X86::MMX_PABSWrr, X86::MMX_PABSWrm, 0},
   {X86::MMX_PSHUFWri, X86::MMX_PSHUFWmi, 0},
   {X86::MOV16rr, X86::MOV16rm, 0},
   {X86::MOV32rr, X86::MOV32rm, 0},
   {X86::MOV64rr, X86::MOV64rm, 0},
   {X86::MOV64toPQIrr, X86::MOVQI2PQIrm, TB_NO_REVERSE},
   {X86::MOV64toSDrr, X86::MOVSDrm_alt, TB_NO_REVERSE},
   {X86::MOV8rr, X86::MOV8rm, 0},
   {X86::MOVAPDrr, X86::MOVAPDrm, TB_ALIGN_16},
   {X86::MOVAPSrr, X86::MOVAPSrm, TB_ALIGN_16},
   {X86::MOVDDUPrr, X86::MOVDDUPrm, TB_NO_REVERSE},
   {X86::MOVDI2PDIrr, X86::MOVDI2PDIrm, 0},
   {X86::MOVDI2SSrr, X86::MOVSSrm_alt, 0},
   {X86::MOVDQArr, X86::MOVDQArm, TB_ALIGN_16},
   {X86::MOVDQUrr, X86::MOVDQUrm, 0},
   {X86::MOVSHDUPrr, X86::MOVSHDUPrm, TB_ALIGN_16},
   {X86::MOVSLDUPrr, X86::MOVSLDUPrm, TB_ALIGN_16},
+  {X86::MOVSX16rr32, X86::MOVSX16rm32, 0},
   {X86::MOVSX16rr8, X86::MOVSX16rm8, 0},
   {X86::MOVSX32rr16, X86::MOVSX32rm16, 0},
+  {X86::MOVSX32rr32, X86::MOVSX32rm32, 0},
   {X86::MOVSX32rr8, X86::MOVSX32rm8, 0},
   {X86::MOVSX32rr8_NOREX, X86::MOVSX32rm8_NOREX, 0},
   {X86::MOVSX64rr16, X86::MOVSX64rm16, 0},
   {X86::MOVSX64rr32, X86::MOVSX64rm32, 0},
   {X86::MOVSX64rr8, X86::MOVSX64rm8, 0},
   {X86::MOVUPDrr, X86::MOVUPDrm, 0},
   {X86::MOVUPSrr, X86::MOVUPSrm, 0},
   {X86::MOVZPQILo2PQIrr, X86::MOVQI2PQIrm, TB_NO_REVERSE},
static const X86MemoryFoldTableEntry MemoryFoldTable1[] = {
   {X86::VBROADCASTSSZ128rr, X86::VBROADCASTSSZ128rm, TB_NO_REVERSE},
   {X86::VBROADCASTSSZ256rr, X86::VBROADCASTSSZ256rm, TB_NO_REVERSE},
   {X86::VBROADCASTSSZrr, X86::VBROADCASTSSZrm, TB_NO_REVERSE},
   {X86::VBROADCASTSSrr, X86::VBROADCASTSSrm, TB_NO_REVERSE},
   {X86::VCOMISDZrr, X86::VCOMISDZrm, 0},
   {X86::VCOMISDZrr_Int, X86::VCOMISDZrm_Int, TB_NO_REVERSE},
   {X86::VCOMISDrr, X86::VCOMISDrm, 0},
   {X86::VCOMISDrr_Int, X86::VCOMISDrm_Int, TB_NO_REVERSE},
+  {X86::VCOMISHZrr, X86::VCOMISHZrm, 0},
+  {X86::VCOMISHZrr_Int, X86::VCOMISHZrm_Int, TB_NO_REVERSE},
   {X86::VCOMISSZrr, X86::VCOMISSZrm, 0},
   {X86::VCOMISSZrr_Int, X86::VCOMISSZrm_Int, TB_NO_REVERSE},
   {X86::VCOMISSrr, X86::VCOMISSrm, 0},
   {X86::VCOMISSrr_Int, X86::VCOMISSrm_Int, TB_NO_REVERSE},
   {X86::VCVTDQ2PDYrr, X86::VCVTDQ2PDYrm, 0},
   {X86::VCVTDQ2PDZ128rr, X86::VCVTDQ2PDZ128rm, TB_NO_REVERSE},
   {X86::VCVTDQ2PDZ256rr, X86::VCVTDQ2PDZ256rm, 0},
   {X86::VCVTDQ2PDZrr, X86::VCVTDQ2PDZrm, 0},
   {X86::VCVTDQ2PDrr, X86::VCVTDQ2PDrm, TB_NO_REVERSE},
+  {X86::VCVTDQ2PHZ128rr, X86::VCVTDQ2PHZ128rm, 0},
+  {X86::VCVTDQ2PHZ256rr, X86::VCVTDQ2PHZ256rm, 0},
+  {X86::VCVTDQ2PHZrr, X86::VCVTDQ2PHZrm, 0},
   {X86::VCVTDQ2PSYrr, X86::VCVTDQ2PSYrm, 0},
   {X86::VCVTDQ2PSZ128rr, X86::VCVTDQ2PSZ128rm, 0},
   {X86::VCVTDQ2PSZ256rr, X86::VCVTDQ2PSZ256rm, 0},
   {X86::VCVTDQ2PSZrr, X86::VCVTDQ2PSZrm, 0},
   {X86::VCVTDQ2PSrr, X86::VCVTDQ2PSrm, 0},
+  {X86::VCVTNEPS2BF16Yrr, X86::VCVTNEPS2BF16Yrm, 0},
   {X86::VCVTNEPS2BF16Z128rr, X86::VCVTNEPS2BF16Z128rm, 0},
   {X86::VCVTNEPS2BF16Z256rr, X86::VCVTNEPS2BF16Z256rm, 0},
   {X86::VCVTNEPS2BF16Zrr, X86::VCVTNEPS2BF16Zrm, 0},
+  {X86::VCVTNEPS2BF16rr, X86::VCVTNEPS2BF16rm, 0},
   {X86::VCVTPD2DQYrr, X86::VCVTPD2DQYrm, 0},
   {X86::VCVTPD2DQZ128rr, X86::VCVTPD2DQZ128rm, 0},
   {X86::VCVTPD2DQZ256rr, X86::VCVTPD2DQZ256rm, 0},
   {X86::VCVTPD2DQZrr, X86::VCVTPD2DQZrm, 0},
   {X86::VCVTPD2DQrr, X86::VCVTPD2DQrm, 0},
+  {X86::VCVTPD2PHZ128rr, X86::VCVTPD2PHZ128rm, 0},
+  {X86::VCVTPD2PHZ256rr, X86::VCVTPD2PHZ256rm, 0},
+  {X86::VCVTPD2PHZrr, X86::VCVTPD2PHZrm, 0},
   {X86::VCVTPD2PSYrr, X86::VCVTPD2PSYrm, 0},
   {X86::VCVTPD2PSZ128rr, X86::VCVTPD2PSZ128rm, 0},
   {X86::VCVTPD2PSZ256rr, X86::VCVTPD2PSZ256rm, 0},
   {X86::VCVTPD2PSZrr, X86::VCVTPD2PSZrm, 0},
   {X86::VCVTPD2PSrr, X86::VCVTPD2PSrm, 0},
   {X86::VCVTPD2QQZ128rr, X86::VCVTPD2QQZ128rm, 0},
   {X86::VCVTPD2QQZ256rr, X86::VCVTPD2QQZ256rm, 0},
   {X86::VCVTPD2QQZrr, X86::VCVTPD2QQZrm, 0},
   {X86::VCVTPD2UDQZ128rr, X86::VCVTPD2UDQZ128rm, 0},
   {X86::VCVTPD2UDQZ256rr, X86::VCVTPD2UDQZ256rm, 0},
   {X86::VCVTPD2UDQZrr, X86::VCVTPD2UDQZrm, 0},
   {X86::VCVTPD2UQQZ128rr, X86::VCVTPD2UQQZ128rm, 0},
   {X86::VCVTPD2UQQZ256rr, X86::VCVTPD2UQQZ256rm, 0},
   {X86::VCVTPD2UQQZrr, X86::VCVTPD2UQQZrm, 0},
+  {X86::VCVTPH2DQZ128rr, X86::VCVTPH2DQZ128rm, TB_NO_REVERSE},
+  {X86::VCVTPH2DQZ256rr, X86::VCVTPH2DQZ256rm, 0},
+  {X86::VCVTPH2DQZrr, X86::VCVTPH2DQZrm, 0},
+  {X86::VCVTPH2PDZ128rr, X86::VCVTPH2PDZ128rm, TB_NO_REVERSE},
+  {X86::VCVTPH2PDZ256rr, X86::VCVTPH2PDZ256rm, TB_NO_REVERSE},
+  {X86::VCVTPH2PDZrr, X86::VCVTPH2PDZrm, 0},
+  {X86::VCVTPH2PSXZ128rr, X86::VCVTPH2PSXZ128rm, TB_NO_REVERSE},
+  {X86::VCVTPH2PSXZ256rr, X86::VCVTPH2PSXZ256rm, 0},
+  {X86::VCVTPH2PSXZrr, X86::VCVTPH2PSXZrm, 0},
   {X86::VCVTPH2PSYrr, X86::VCVTPH2PSYrm, 0},
   {X86::VCVTPH2PSZ128rr, X86::VCVTPH2PSZ128rm, TB_NO_REVERSE},
   {X86::VCVTPH2PSZ256rr, X86::VCVTPH2PSZ256rm, 0},
   {X86::VCVTPH2PSZrr, X86::VCVTPH2PSZrm, 0},
   {X86::VCVTPH2PSrr, X86::VCVTPH2PSrm, TB_NO_REVERSE},
+  {X86::VCVTPH2QQZ128rr, X86::VCVTPH2QQZ128rm, TB_NO_REVERSE},
+  {X86::VCVTPH2QQZ256rr, X86::VCVTPH2QQZ256rm, TB_NO_REVERSE},
+  {X86::VCVTPH2QQZrr, X86::VCVTPH2QQZrm, 0},
+  {X86::VCVTPH2UDQZ128rr, X86::VCVTPH2UDQZ128rm, TB_NO_REVERSE},
+  {X86::VCVTPH2UDQZ256rr, X86::VCVTPH2UDQZ256rm, 0},
+  {X86::VCVTPH2UDQZrr, X86::VCVTPH2UDQZrm, 0},
+  {X86::VCVTPH2UQQZ128rr, X86::VCVTPH2UQQZ128rm, TB_NO_REVERSE},
+  {X86::VCVTPH2UQQZ256rr, X86::VCVTPH2UQQZ256rm, TB_NO_REVERSE},
+  {X86::VCVTPH2UQQZrr, X86::VCVTPH2UQQZrm, 0},
+  {X86::VCVTPH2UWZ128rr, X86::VCVTPH2UWZ128rm, 0},
+  {X86::VCVTPH2UWZ256rr, X86::VCVTPH2UWZ256rm, 0},
+  {X86::VCVTPH2UWZrr, X86::VCVTPH2UWZrm, 0},
+  {X86::VCVTPH2WZ128rr, X86::VCVTPH2WZ128rm, 0},
+  {X86::VCVTPH2WZ256rr, X86::VCVTPH2WZ256rm, 0},
+  {X86::VCVTPH2WZrr, X86::VCVTPH2WZrm, 0},
   {X86::VCVTPS2DQYrr, X86::VCVTPS2DQYrm, 0},
   {X86::VCVTPS2DQZ128rr, X86::VCVTPS2DQZ128rm, 0},
   {X86::VCVTPS2DQZ256rr, X86::VCVTPS2DQZ256rm, 0},
   {X86::VCVTPS2DQZrr, X86::VCVTPS2DQZrm, 0},
   {X86::VCVTPS2DQrr, X86::VCVTPS2DQrm, 0},
   {X86::VCVTPS2PDYrr, X86::VCVTPS2PDYrm, 0},
   {X86::VCVTPS2PDZ128rr, X86::VCVTPS2PDZ128rm, TB_NO_REVERSE},
   {X86::VCVTPS2PDZ256rr, X86::VCVTPS2PDZ256rm, 0},
   {X86::VCVTPS2PDZrr, X86::VCVTPS2PDZrm, 0},
   {X86::VCVTPS2PDrr, X86::VCVTPS2PDrm, TB_NO_REVERSE},
+  {X86::VCVTPS2PHXZ128rr, X86::VCVTPS2PHXZ128rm, 0},
+  {X86::VCVTPS2PHXZ256rr, X86::VCVTPS2PHXZ256rm, 0},
+  {X86::VCVTPS2PHXZrr, X86::VCVTPS2PHXZrm, 0},
   {X86::VCVTPS2QQZ128rr, X86::VCVTPS2QQZ128rm, TB_NO_REVERSE},
   {X86::VCVTPS2QQZ256rr, X86::VCVTPS2QQZ256rm, 0},
   {X86::VCVTPS2QQZrr, X86::VCVTPS2QQZrm, 0},
   {X86::VCVTPS2UDQZ128rr, X86::VCVTPS2UDQZ128rm, 0},
   {X86::VCVTPS2UDQZ256rr, X86::VCVTPS2UDQZ256rm, 0},
   {X86::VCVTPS2UDQZrr, X86::VCVTPS2UDQZrm, 0},
   {X86::VCVTPS2UQQZ128rr, X86::VCVTPS2UQQZ128rm, TB_NO_REVERSE},
   {X86::VCVTPS2UQQZ256rr, X86::VCVTPS2UQQZ256rm, 0},
   {X86::VCVTPS2UQQZrr, X86::VCVTPS2UQQZrm, 0},
   {X86::VCVTQQ2PDZ128rr, X86::VCVTQQ2PDZ128rm, 0},
   {X86::VCVTQQ2PDZ256rr, X86::VCVTQQ2PDZ256rm, 0},
   {X86::VCVTQQ2PDZrr, X86::VCVTQQ2PDZrm, 0},
+  {X86::VCVTQQ2PHZ128rr, X86::VCVTQQ2PHZ128rm, 0},
+  {X86::VCVTQQ2PHZ256rr, X86::VCVTQQ2PHZ256rm, 0},
+  {X86::VCVTQQ2PHZrr, X86::VCVTQQ2PHZrm, 0},
   {X86::VCVTQQ2PSZ128rr, X86::VCVTQQ2PSZ128rm, 0},
   {X86::VCVTQQ2PSZ256rr, X86::VCVTQQ2PSZ256rm, 0},
   {X86::VCVTQQ2PSZrr, X86::VCVTQQ2PSZrm, 0},
   {X86::VCVTSD2SI64Zrr, X86::VCVTSD2SI64Zrm, 0},
   {X86::VCVTSD2SI64Zrr_Int, X86::VCVTSD2SI64Zrm_Int, TB_NO_REVERSE},
   {X86::VCVTSD2SI64rr, X86::VCVTSD2SI64rm, 0},
   {X86::VCVTSD2SI64rr_Int, X86::VCVTSD2SI64rm_Int, TB_NO_REVERSE},
   {X86::VCVTSD2SIZrr, X86::VCVTSD2SIZrm, 0},
   {X86::VCVTSD2SIZrr_Int, X86::VCVTSD2SIZrm_Int, TB_NO_REVERSE},
   {X86::VCVTSD2SIrr, X86::VCVTSD2SIrm, 0},
   {X86::VCVTSD2SIrr_Int, X86::VCVTSD2SIrm_Int, TB_NO_REVERSE},
   {X86::VCVTSD2USI64Zrr_Int, X86::VCVTSD2USI64Zrm_Int, TB_NO_REVERSE},
   {X86::VCVTSD2USIZrr_Int, X86::VCVTSD2USIZrm_Int, TB_NO_REVERSE},
+  {X86::VCVTSH2SI64Zrr_Int, X86::VCVTSH2SI64Zrm_Int, TB_NO_REVERSE},
+  {X86::VCVTSH2SIZrr_Int, X86::VCVTSH2SIZrm_Int, TB_NO_REVERSE},
+  {X86::VCVTSH2USI64Zrr_Int, X86::VCVTSH2USI64Zrm_Int, TB_NO_REVERSE},
+  {X86::VCVTSH2USIZrr_Int, X86::VCVTSH2USIZrm_Int, TB_NO_REVERSE},
   {X86::VCVTSS2SI64Zrr, X86::VCVTSS2SI64Zrm, 0},
   {X86::VCVTSS2SI64Zrr_Int, X86::VCVTSS2SI64Zrm_Int, TB_NO_REVERSE},
   {X86::VCVTSS2SI64rr, X86::VCVTSS2SI64rm, 0},
   {X86::VCVTSS2SI64rr_Int, X86::VCVTSS2SI64rm_Int, TB_NO_REVERSE},
   {X86::VCVTSS2SIZrr, X86::VCVTSS2SIZrm, 0},
   {X86::VCVTSS2SIZrr_Int, X86::VCVTSS2SIZrm_Int, TB_NO_REVERSE},
   {X86::VCVTSS2SIrr, X86::VCVTSS2SIrm, 0},
   {X86::VCVTSS2SIrr_Int, X86::VCVTSS2SIrm_Int, TB_NO_REVERSE},
   {X86::VCVTSS2USI64Zrr_Int, X86::VCVTSS2USI64Zrm_Int, TB_NO_REVERSE},
   {X86::VCVTSS2USIZrr_Int, X86::VCVTSS2USIZrm_Int, TB_NO_REVERSE},
   {X86::VCVTTPD2DQYrr, X86::VCVTTPD2DQYrm, 0},
   {X86::VCVTTPD2DQZ128rr, X86::VCVTTPD2DQZ128rm, 0},
   {X86::VCVTTPD2DQZ256rr, X86::VCVTTPD2DQZ256rm, 0},
   {X86::VCVTTPD2DQZrr, X86::VCVTTPD2DQZrm, 0},
   {X86::VCVTTPD2DQrr, X86::VCVTTPD2DQrm, 0},
   {X86::VCVTTPD2QQZ128rr, X86::VCVTTPD2QQZ128rm, 0},
   {X86::VCVTTPD2QQZ256rr, X86::VCVTTPD2QQZ256rm, 0},
   {X86::VCVTTPD2QQZrr, X86::VCVTTPD2QQZrm, 0},
   {X86::VCVTTPD2UDQZ128rr, X86::VCVTTPD2UDQZ128rm, 0},
   {X86::VCVTTPD2UDQZ256rr, X86::VCVTTPD2UDQZ256rm, 0},
   {X86::VCVTTPD2UDQZrr, X86::VCVTTPD2UDQZrm, 0},
   {X86::VCVTTPD2UQQZ128rr, X86::VCVTTPD2UQQZ128rm, 0},
   {X86::VCVTTPD2UQQZ256rr, X86::VCVTTPD2UQQZ256rm, 0},
   {X86::VCVTTPD2UQQZrr, X86::VCVTTPD2UQQZrm, 0},
+  {X86::VCVTTPH2DQZ128rr, X86::VCVTTPH2DQZ128rm, TB_NO_REVERSE},
+  {X86::VCVTTPH2DQZ256rr, X86::VCVTTPH2DQZ256rm, 0},
+  {X86::VCVTTPH2DQZrr, X86::VCVTTPH2DQZrm, 0},
+  {X86::VCVTTPH2QQZ128rr, X86::VCVTTPH2QQZ128rm, TB_NO_REVERSE},
+  {X86::VCVTTPH2QQZ256rr, X86::VCVTTPH2QQZ256rm, TB_NO_REVERSE},
+  {X86::VCVTTPH2QQZrr, X86::VCVTTPH2QQZrm, 0},
+  {X86::VCVTTPH2UDQZ128rr, X86::VCVTTPH2UDQZ128rm, TB_NO_REVERSE},
+  {X86::VCVTTPH2UDQZ256rr, X86::VCVTTPH2UDQZ256rm, 0},
+  {X86::VCVTTPH2UDQZrr, X86::VCVTTPH2UDQZrm, 0},
+  {X86::VCVTTPH2UQQZ128rr, X86::VCVTTPH2UQQZ128rm, TB_NO_REVERSE},
+  {X86::VCVTTPH2UQQZ256rr, X86::VCVTTPH2UQQZ256rm, TB_NO_REVERSE},
+  {X86::VCVTTPH2UQQZrr, X86::VCVTTPH2UQQZrm, 0},
+  {X86::VCVTTPH2UWZ128rr, X86::VCVTTPH2UWZ128rm, 0},
+  {X86::VCVTTPH2UWZ256rr, X86::VCVTTPH2UWZ256rm, 0},
+  {X86::VCVTTPH2UWZrr, X86::VCVTTPH2UWZrm, 0},
+  {X86::VCVTTPH2WZ128rr, X86::VCVTTPH2WZ128rm, 0},
+  {X86::VCVTTPH2WZ256rr, X86::VCVTTPH2WZ256rm, 0},
+  {X86::VCVTTPH2WZrr, X86::VCVTTPH2WZrm, 0},
   {X86::VCVTTPS2DQYrr, X86::VCVTTPS2DQYrm, 0},
   {X86::VCVTTPS2DQZ128rr, X86::VCVTTPS2DQZ128rm, 0},
   {X86::VCVTTPS2DQZ256rr, X86::VCVTTPS2DQZ256rm, 0},
   {X86::VCVTTPS2DQZrr, X86::VCVTTPS2DQZrm, 0},
   {X86::VCVTTPS2DQrr, X86::VCVTTPS2DQrm, 0},
   {X86::VCVTTPS2QQZ128rr, X86::VCVTTPS2QQZ128rm, TB_NO_REVERSE},
   {X86::VCVTTPS2QQZ256rr, X86::VCVTTPS2QQZ256rm, 0},
   {X86::VCVTTPS2QQZrr, X86::VCVTTPS2QQZrm, 0},
static const X86MemoryFoldTableEntry MemoryFoldTable1[] = {
   {X86::VCVTTSD2SIZrr, X86::VCVTTSD2SIZrm, 0},
   {X86::VCVTTSD2SIZrr_Int, X86::VCVTTSD2SIZrm_Int, TB_NO_REVERSE},
   {X86::VCVTTSD2SIrr, X86::VCVTTSD2SIrm, 0},
   {X86::VCVTTSD2SIrr_Int, X86::VCVTTSD2SIrm_Int, TB_NO_REVERSE},
   {X86::VCVTTSD2USI64Zrr, X86::VCVTTSD2USI64Zrm, 0},
   {X86::VCVTTSD2USI64Zrr_Int, X86::VCVTTSD2USI64Zrm_Int, TB_NO_REVERSE},
   {X86::VCVTTSD2USIZrr, X86::VCVTTSD2USIZrm, 0},
   {X86::VCVTTSD2USIZrr_Int, X86::VCVTTSD2USIZrm_Int, TB_NO_REVERSE},
+  {X86::VCVTTSH2SI64Zrr, X86::VCVTTSH2SI64Zrm, 0},
+  {X86::VCVTTSH2SI64Zrr_Int, X86::VCVTTSH2SI64Zrm_Int, TB_NO_REVERSE},
+  {X86::VCVTTSH2SIZrr, X86::VCVTTSH2SIZrm, 0},
+  {X86::VCVTTSH2SIZrr_Int, X86::VCVTTSH2SIZrm_Int, TB_NO_REVERSE},
+  {X86::VCVTTSH2USI64Zrr, X86::VCVTTSH2USI64Zrm, 0},
+  {X86::VCVTTSH2USI64Zrr_Int, X86::VCVTTSH2USI64Zrm_Int, TB_NO_REVERSE},
+  {X86::VCVTTSH2USIZrr, X86::VCVTTSH2USIZrm, 0},
+  {X86::VCVTTSH2USIZrr_Int, X86::VCVTTSH2USIZrm_Int, TB_NO_REVERSE},
   {X86::VCVTTSS2SI64Zrr, X86::VCVTTSS2SI64Zrm, 0},
   {X86::VCVTTSS2SI64Zrr_Int, X86::VCVTTSS2SI64Zrm_Int, TB_NO_REVERSE},
   {X86::VCVTTSS2SI64rr, X86::VCVTTSS2SI64rm, 0},
   {X86::VCVTTSS2SI64rr_Int, X86::VCVTTSS2SI64rm_Int, TB_NO_REVERSE},
   {X86::VCVTTSS2SIZrr, X86::VCVTTSS2SIZrm, 0},
   {X86::VCVTTSS2SIZrr_Int, X86::VCVTTSS2SIZrm_Int, TB_NO_REVERSE},
   {X86::VCVTTSS2SIrr, X86::VCVTTSS2SIrm, 0},
   {X86::VCVTTSS2SIrr_Int, X86::VCVTTSS2SIrm_Int, TB_NO_REVERSE},
   {X86::VCVTTSS2USI64Zrr, X86::VCVTTSS2USI64Zrm, 0},
   {X86::VCVTTSS2USI64Zrr_Int, X86::VCVTTSS2USI64Zrm_Int, TB_NO_REVERSE},
   {X86::VCVTTSS2USIZrr, X86::VCVTTSS2USIZrm, 0},
   {X86::VCVTTSS2USIZrr_Int, X86::VCVTTSS2USIZrm_Int, TB_NO_REVERSE},
   {X86::VCVTUDQ2PDZ128rr, X86::VCVTUDQ2PDZ128rm, TB_NO_REVERSE},
   {X86::VCVTUDQ2PDZ256rr, X86::VCVTUDQ2PDZ256rm, 0},
   {X86::VCVTUDQ2PDZrr, X86::VCVTUDQ2PDZrm, 0},
+  {X86::VCVTUDQ2PHZ128rr, X86::VCVTUDQ2PHZ128rm, 0},
+  {X86::VCVTUDQ2PHZ256rr, X86::VCVTUDQ2PHZ256rm, 0},
+  {X86::VCVTUDQ2PHZrr, X86::VCVTUDQ2PHZrm, 0},
   {X86::VCVTUDQ2PSZ128rr, X86::VCVTUDQ2PSZ128rm, 0},
   {X86::VCVTUDQ2PSZ256rr, X86::VCVTUDQ2PSZ256rm, 0},
   {X86::VCVTUDQ2PSZrr, X86::VCVTUDQ2PSZrm, 0},
   {X86::VCVTUQQ2PDZ128rr, X86::VCVTUQQ2PDZ128rm, 0},
   {X86::VCVTUQQ2PDZ256rr, X86::VCVTUQQ2PDZ256rm, 0},
   {X86::VCVTUQQ2PDZrr, X86::VCVTUQQ2PDZrm, 0},
+  {X86::VCVTUQQ2PHZ128rr, X86::VCVTUQQ2PHZ128rm, 0},
+  {X86::VCVTUQQ2PHZ256rr, X86::VCVTUQQ2PHZ256rm, 0},
+  {X86::VCVTUQQ2PHZrr, X86::VCVTUQQ2PHZrm, 0},
   {X86::VCVTUQQ2PSZ128rr, X86::VCVTUQQ2PSZ128rm, 0},
   {X86::VCVTUQQ2PSZ256rr, X86::VCVTUQQ2PSZ256rm, 0},
   {X86::VCVTUQQ2PSZrr, X86::VCVTUQQ2PSZrm, 0},
+  {X86::VCVTUW2PHZ128rr, X86::VCVTUW2PHZ128rm, 0},
+  {X86::VCVTUW2PHZ256rr, X86::VCVTUW2PHZ256rm, 0},
+  {X86::VCVTUW2PHZrr, X86::VCVTUW2PHZrm, 0},
+  {X86::VCVTW2PHZ128rr, X86::VCVTW2PHZ128rm, 0},
+  {X86::VCVTW2PHZ256rr, X86::VCVTW2PHZ256rm, 0},
+  {X86::VCVTW2PHZrr, X86::VCVTW2PHZrm, 0},
   {X86::VEXP2PDZr, X86::VEXP2PDZm, 0},
   {X86::VEXP2PSZr, X86::VEXP2PSZm, 0},
   {X86::VEXPANDPDZ128rr, X86::VEXPANDPDZ128rm, TB_NO_REVERSE},
   {X86::VEXPANDPDZ256rr, X86::VEXPANDPDZ256rm, TB_NO_REVERSE},
   {X86::VEXPANDPDZrr, X86::VEXPANDPDZrm, TB_NO_REVERSE},
   {X86::VEXPANDPSZ128rr, X86::VEXPANDPSZ128rm, TB_NO_REVERSE},
   {X86::VEXPANDPSZ256rr, X86::VEXPANDPSZ256rm, TB_NO_REVERSE},
   {X86::VEXPANDPSZrr, X86::VEXPANDPSZrm, TB_NO_REVERSE},
static const X86MemoryFoldTableEntry MemoryFoldTable1[] = {
   {X86::VMOVUPDZ256rr, X86::VMOVUPDZ256rm, 0},
   {X86::VMOVUPDZrr, X86::VMOVUPDZrm, 0},
   {X86::VMOVUPDrr, X86::VMOVUPDrm, 0},
   {X86::VMOVUPSYrr, X86::VMOVUPSYrm, 0},
   {X86::VMOVUPSZ128rr, X86::VMOVUPSZ128rm, 0},
   {X86::VMOVUPSZ256rr, X86::VMOVUPSZ256rm, 0},
   {X86::VMOVUPSZrr, X86::VMOVUPSZrm, 0},
   {X86::VMOVUPSrr, X86::VMOVUPSrm, 0},
+  {X86::VMOVW2SHrr, X86::VMOVWrm, TB_NO_REVERSE},
   {X86::VMOVZPQILo2PQIZrr, X86::VMOVQI2PQIZrm, TB_NO_REVERSE},
   {X86::VMOVZPQILo2PQIrr, X86::VMOVQI2PQIrm, TB_NO_REVERSE},
   {X86::VPABSBYrr, X86::VPABSBYrm, 0},
   {X86::VPABSBZ128rr, X86::VPABSBZ128rm, 0},
   {X86::VPABSBZ256rr, X86::VPABSBZ256rm, 0},
   {X86::VPABSBZrr, X86::VPABSBZrm, 0},
   {X86::VPABSBrr, X86::VPABSBrm, 0},
   {X86::VPABSDYrr, X86::VPABSDYrm, 0},
static const X86MemoryFoldTableEntry MemoryFoldTable1[] = {
   {X86::VTESTPDYrr, X86::VTESTPDYrm, 0},
   {X86::VTESTPDrr, X86::VTESTPDrm, 0},
   {X86::VTESTPSYrr, X86::VTESTPSYrm, 0},
   {X86::VTESTPSrr, X86::VTESTPSrm, 0},
   {X86::VUCOMISDZrr, X86::VUCOMISDZrm, 0},
   {X86::VUCOMISDZrr_Int, X86::VUCOMISDZrm_Int, TB_NO_REVERSE},
   {X86::VUCOMISDrr, X86::VUCOMISDrm, 0},
   {X86::VUCOMISDrr_Int, X86::VUCOMISDrm_Int, TB_NO_REVERSE},
+  {X86::VUCOMISHZrr, X86::VUCOMISHZrm, 0},
+  {X86::VUCOMISHZrr_Int, X86::VUCOMISHZrm_Int, TB_NO_REVERSE},
   {X86::VUCOMISSZrr, X86::VUCOMISSZrm, 0},
   {X86::VUCOMISSZrr_Int, X86::VUCOMISSZrm_Int, TB_NO_REVERSE},
   {X86::VUCOMISSrr, X86::VUCOMISSrm, 0},
   {X86::VUCOMISSrr_Int, X86::VUCOMISSrm_Int, TB_NO_REVERSE},
 };
 
 static const X86MemoryFoldTableEntry MemoryFoldTable2[] = {
   {X86::ADD16rr_DB, X86::ADD16rm, TB_NO_REVERSE},
static const X86MemoryFoldTableEntry MemoryFoldTable2[] = {
   {X86::VCMPSHZrr_Int, X86::VCMPSHZrm_Int, TB_NO_REVERSE},
   {X86::VCMPSSZrr, X86::VCMPSSZrm, 0},
   {X86::VCMPSSZrr_Int, X86::VCMPSSZrm_Int, TB_NO_REVERSE},
   {X86::VCMPSSrr, X86::VCMPSSrm, 0},
   {X86::VCMPSSrr_Int, X86::VCMPSSrm_Int, TB_NO_REVERSE},
   {X86::VCVTDQ2PDZ128rrkz, X86::VCVTDQ2PDZ128rmkz, TB_NO_REVERSE},
   {X86::VCVTDQ2PDZ256rrkz, X86::VCVTDQ2PDZ256rmkz, 0},
   {X86::VCVTDQ2PDZrrkz, X86::VCVTDQ2PDZrmkz, 0},
+  {X86::VCVTDQ2PHZ128rrkz, X86::VCVTDQ2PHZ128rmkz, 0},
+  {X86::VCVTDQ2PHZ256rrkz, X86::VCVTDQ2PHZ256rmkz, 0},
+  {X86::VCVTDQ2PHZrrkz, X86::VCVTDQ2PHZrmkz, 0},
   {X86::VCVTDQ2PSZ128rrkz, X86::VCVTDQ2PSZ128rmkz, 0},
   {X86::VCVTDQ2PSZ256rrkz, X86::VCVTDQ2PSZ256rmkz, 0},
   {X86::VCVTDQ2PSZrrkz, X86::VCVTDQ2PSZrmkz, 0},
   {X86::VCVTNE2PS2BF16Z128rr, X86::VCVTNE2PS2BF16Z128rm, 0},
   {X86::VCVTNE2PS2BF16Z256rr, X86::VCVTNE2PS2BF16Z256rm, 0},
   {X86::VCVTNE2PS2BF16Zrr, X86::VCVTNE2PS2BF16Zrm, 0},
   {X86::VCVTNEPS2BF16Z128rrkz, X86::VCVTNEPS2BF16Z128rmkz, 0},
   {X86::VCVTNEPS2BF16Z256rrkz, X86::VCVTNEPS2BF16Z256rmkz, 0},
   {X86::VCVTNEPS2BF16Zrrkz, X86::VCVTNEPS2BF16Zrmkz, 0},
   {X86::VCVTPD2DQZ128rrkz, X86::VCVTPD2DQZ128rmkz, 0},
   {X86::VCVTPD2DQZ256rrkz, X86::VCVTPD2DQZ256rmkz, 0},
   {X86::VCVTPD2DQZrrkz, X86::VCVTPD2DQZrmkz, 0},
+  {X86::VCVTPD2PHZ128rrkz, X86::VCVTPD2PHZ128rmkz, 0},
+  {X86::VCVTPD2PHZ256rrkz, X86::VCVTPD2PHZ256rmkz, 0},
+  {X86::VCVTPD2PHZrrkz, X86::VCVTPD2PHZrmkz, 0},
   {X86::VCVTPD2PSZ128rrkz, X86::VCVTPD2PSZ128rmkz, 0},
   {X86::VCVTPD2PSZ256rrkz, X86::VCVTPD2PSZ256rmkz, 0},
   {X86::VCVTPD2PSZrrkz, X86::VCVTPD2PSZrmkz, 0},
   {X86::VCVTPD2QQZ128rrkz, X86::VCVTPD2QQZ128rmkz, 0},
   {X86::VCVTPD2QQZ256rrkz, X86::VCVTPD2QQZ256rmkz, 0},
   {X86::VCVTPD2QQZrrkz, X86::VCVTPD2QQZrmkz, 0},
   {X86::VCVTPD2UDQZ128rrkz, X86::VCVTPD2UDQZ128rmkz, 0},
   {X86::VCVTPD2UDQZ256rrkz, X86::VCVTPD2UDQZ256rmkz, 0},
   {X86::VCVTPD2UDQZrrkz, X86::VCVTPD2UDQZrmkz, 0},
   {X86::VCVTPD2UQQZ128rrkz, X86::VCVTPD2UQQZ128rmkz, 0},
   {X86::VCVTPD2UQQZ256rrkz, X86::VCVTPD2UQQZ256rmkz, 0},
   {X86::VCVTPD2UQQZrrkz, X86::VCVTPD2UQQZrmkz, 0},
+  {X86::VCVTPH2DQZ128rrkz, X86::VCVTPH2DQZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTPH2DQZ256rrkz, X86::VCVTPH2DQZ256rmkz, 0},
+  {X86::VCVTPH2DQZrrkz, X86::VCVTPH2DQZrmkz, 0},
+  {X86::VCVTPH2PDZ128rrkz, X86::VCVTPH2PDZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTPH2PDZ256rrkz, X86::VCVTPH2PDZ256rmkz, TB_NO_REVERSE},
+  {X86::VCVTPH2PDZrrkz, X86::VCVTPH2PDZrmkz, 0},
+  {X86::VCVTPH2PSXZ128rrkz, X86::VCVTPH2PSXZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTPH2PSXZ256rrkz, X86::VCVTPH2PSXZ256rmkz, 0},
+  {X86::VCVTPH2PSXZrrkz, X86::VCVTPH2PSXZrmkz, 0},
   {X86::VCVTPH2PSZ128rrkz, X86::VCVTPH2PSZ128rmkz, TB_NO_REVERSE},
   {X86::VCVTPH2PSZ256rrkz, X86::VCVTPH2PSZ256rmkz, 0},
   {X86::VCVTPH2PSZrrkz, X86::VCVTPH2PSZrmkz, 0},
+  {X86::VCVTPH2QQZ128rrkz, X86::VCVTPH2QQZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTPH2QQZ256rrkz, X86::VCVTPH2QQZ256rmkz, TB_NO_REVERSE},
+  {X86::VCVTPH2QQZrrkz, X86::VCVTPH2QQZrmkz, 0},
+  {X86::VCVTPH2UDQZ128rrkz, X86::VCVTPH2UDQZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTPH2UDQZ256rrkz, X86::VCVTPH2UDQZ256rmkz, 0},
+  {X86::VCVTPH2UDQZrrkz, X86::VCVTPH2UDQZrmkz, 0},
+  {X86::VCVTPH2UQQZ128rrkz, X86::VCVTPH2UQQZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTPH2UQQZ256rrkz, X86::VCVTPH2UQQZ256rmkz, TB_NO_REVERSE},
+  {X86::VCVTPH2UQQZrrkz, X86::VCVTPH2UQQZrmkz, 0},
+  {X86::VCVTPH2UWZ128rrkz, X86::VCVTPH2UWZ128rmkz, 0},
+  {X86::VCVTPH2UWZ256rrkz, X86::VCVTPH2UWZ256rmkz, 0},
+  {X86::VCVTPH2UWZrrkz, X86::VCVTPH2UWZrmkz, 0},
+  {X86::VCVTPH2WZ128rrkz, X86::VCVTPH2WZ128rmkz, 0},
+  {X86::VCVTPH2WZ256rrkz, X86::VCVTPH2WZ256rmkz, 0},
+  {X86::VCVTPH2WZrrkz, X86::VCVTPH2WZrmkz, 0},
   {X86::VCVTPS2DQZ128rrkz, X86::VCVTPS2DQZ128rmkz, 0},
   {X86::VCVTPS2DQZ256rrkz, X86::VCVTPS2DQZ256rmkz, 0},
   {X86::VCVTPS2DQZrrkz, X86::VCVTPS2DQZrmkz, 0},
   {X86::VCVTPS2PDZ128rrkz, X86::VCVTPS2PDZ128rmkz, TB_NO_REVERSE},
   {X86::VCVTPS2PDZ256rrkz, X86::VCVTPS2PDZ256rmkz, 0},
   {X86::VCVTPS2PDZrrkz, X86::VCVTPS2PDZrmkz, 0},
+  {X86::VCVTPS2PHXZ128rrkz, X86::VCVTPS2PHXZ128rmkz, 0},
+  {X86::VCVTPS2PHXZ256rrkz, X86::VCVTPS2PHXZ256rmkz, 0},
+  {X86::VCVTPS2PHXZrrkz, X86::VCVTPS2PHXZrmkz, 0},
   {X86::VCVTPS2QQZ128rrkz, X86::VCVTPS2QQZ128rmkz, TB_NO_REVERSE},
   {X86::VCVTPS2QQZ256rrkz, X86::VCVTPS2QQZ256rmkz, 0},
   {X86::VCVTPS2QQZrrkz, X86::VCVTPS2QQZrmkz, 0},
   {X86::VCVTPS2UDQZ128rrkz, X86::VCVTPS2UDQZ128rmkz, 0},
   {X86::VCVTPS2UDQZ256rrkz, X86::VCVTPS2UDQZ256rmkz, 0},
   {X86::VCVTPS2UDQZrrkz, X86::VCVTPS2UDQZrmkz, 0},
   {X86::VCVTPS2UQQZ128rrkz, X86::VCVTPS2UQQZ128rmkz, TB_NO_REVERSE},
   {X86::VCVTPS2UQQZ256rrkz, X86::VCVTPS2UQQZ256rmkz, 0},
   {X86::VCVTPS2UQQZrrkz, X86::VCVTPS2UQQZrmkz, 0},
   {X86::VCVTQQ2PDZ128rrkz, X86::VCVTQQ2PDZ128rmkz, 0},
   {X86::VCVTQQ2PDZ256rrkz, X86::VCVTQQ2PDZ256rmkz, 0},
   {X86::VCVTQQ2PDZrrkz, X86::VCVTQQ2PDZrmkz, 0},
+  {X86::VCVTQQ2PHZ128rrkz, X86::VCVTQQ2PHZ128rmkz, 0},
+  {X86::VCVTQQ2PHZ256rrkz, X86::VCVTQQ2PHZ256rmkz, 0},
+  {X86::VCVTQQ2PHZrrkz, X86::VCVTQQ2PHZrmkz, 0},
   {X86::VCVTQQ2PSZ128rrkz, X86::VCVTQQ2PSZ128rmkz, 0},
   {X86::VCVTQQ2PSZ256rrkz, X86::VCVTQQ2PSZ256rmkz, 0},
   {X86::VCVTQQ2PSZrrkz, X86::VCVTQQ2PSZrmkz, 0},
+  {X86::VCVTSD2SHZrr, X86::VCVTSD2SHZrm, 0},
+  {X86::VCVTSD2SHZrr_Int, X86::VCVTSD2SHZrm_Int, TB_NO_REVERSE},
   {X86::VCVTSD2SSZrr, X86::VCVTSD2SSZrm, 0},
   {X86::VCVTSD2SSZrr_Int, X86::VCVTSD2SSZrm_Int, TB_NO_REVERSE},
   {X86::VCVTSD2SSrr, X86::VCVTSD2SSrm, 0},
   {X86::VCVTSD2SSrr_Int, X86::VCVTSD2SSrm_Int, TB_NO_REVERSE},
+  {X86::VCVTSH2SDZrr, X86::VCVTSH2SDZrm, 0},
+  {X86::VCVTSH2SDZrr_Int, X86::VCVTSH2SDZrm_Int, TB_NO_REVERSE},
+  {X86::VCVTSH2SSZrr, X86::VCVTSH2SSZrm, 0},
+  {X86::VCVTSH2SSZrr_Int, X86::VCVTSH2SSZrm_Int, TB_NO_REVERSE},
   {X86::VCVTSI2SDZrr, X86::VCVTSI2SDZrm, 0},
   {X86::VCVTSI2SDZrr_Int, X86::VCVTSI2SDZrm_Int, 0},
   {X86::VCVTSI2SDrr, X86::VCVTSI2SDrm, 0},
   {X86::VCVTSI2SDrr_Int, X86::VCVTSI2SDrm_Int, 0},
+  {X86::VCVTSI2SHZrr, X86::VCVTSI2SHZrm, 0},
+  {X86::VCVTSI2SHZrr_Int, X86::VCVTSI2SHZrm_Int, 0},
   {X86::VCVTSI2SSZrr, X86::VCVTSI2SSZrm, 0},
   {X86::VCVTSI2SSZrr_Int, X86::VCVTSI2SSZrm_Int, 0},
   {X86::VCVTSI2SSrr, X86::VCVTSI2SSrm, 0},
   {X86::VCVTSI2SSrr_Int, X86::VCVTSI2SSrm_Int, 0},
   {X86::VCVTSI642SDZrr, X86::VCVTSI642SDZrm, 0},
   {X86::VCVTSI642SDZrr_Int, X86::VCVTSI642SDZrm_Int, 0},
   {X86::VCVTSI642SDrr, X86::VCVTSI642SDrm, 0},
   {X86::VCVTSI642SDrr_Int, X86::VCVTSI642SDrm_Int, 0},
+  {X86::VCVTSI642SHZrr, X86::VCVTSI642SHZrm, 0},
+  {X86::VCVTSI642SHZrr_Int, X86::VCVTSI642SHZrm_Int, 0},
   {X86::VCVTSI642SSZrr, X86::VCVTSI642SSZrm, 0},
   {X86::VCVTSI642SSZrr_Int, X86::VCVTSI642SSZrm_Int, 0},
   {X86::VCVTSI642SSrr, X86::VCVTSI642SSrm, 0},
   {X86::VCVTSI642SSrr_Int, X86::VCVTSI642SSrm_Int, 0},
   {X86::VCVTSS2SDZrr, X86::VCVTSS2SDZrm, 0},
   {X86::VCVTSS2SDZrr_Int, X86::VCVTSS2SDZrm_Int, TB_NO_REVERSE},
   {X86::VCVTSS2SDrr, X86::VCVTSS2SDrm, 0},
   {X86::VCVTSS2SDrr_Int, X86::VCVTSS2SDrm_Int, TB_NO_REVERSE},
+  {X86::VCVTSS2SHZrr, X86::VCVTSS2SHZrm, 0},
+  {X86::VCVTSS2SHZrr_Int, X86::VCVTSS2SHZrm_Int, TB_NO_REVERSE},
   {X86::VCVTTPD2DQZ128rrkz, X86::VCVTTPD2DQZ128rmkz, 0},
   {X86::VCVTTPD2DQZ256rrkz, X86::VCVTTPD2DQZ256rmkz, 0},
   {X86::VCVTTPD2DQZrrkz, X86::VCVTTPD2DQZrmkz, 0},
   {X86::VCVTTPD2QQZ128rrkz, X86::VCVTTPD2QQZ128rmkz, 0},
   {X86::VCVTTPD2QQZ256rrkz, X86::VCVTTPD2QQZ256rmkz, 0},
   {X86::VCVTTPD2QQZrrkz, X86::VCVTTPD2QQZrmkz, 0},
   {X86::VCVTTPD2UDQZ128rrkz, X86::VCVTTPD2UDQZ128rmkz, 0},
   {X86::VCVTTPD2UDQZ256rrkz, X86::VCVTTPD2UDQZ256rmkz, 0},
   {X86::VCVTTPD2UDQZrrkz, X86::VCVTTPD2UDQZrmkz, 0},
   {X86::VCVTTPD2UQQZ128rrkz, X86::VCVTTPD2UQQZ128rmkz, 0},
   {X86::VCVTTPD2UQQZ256rrkz, X86::VCVTTPD2UQQZ256rmkz, 0},
   {X86::VCVTTPD2UQQZrrkz, X86::VCVTTPD2UQQZrmkz, 0},
+  {X86::VCVTTPH2DQZ128rrkz, X86::VCVTTPH2DQZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTTPH2DQZ256rrkz, X86::VCVTTPH2DQZ256rmkz, 0},
+  {X86::VCVTTPH2DQZrrkz, X86::VCVTTPH2DQZrmkz, 0},
+  {X86::VCVTTPH2QQZ128rrkz, X86::VCVTTPH2QQZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTTPH2QQZ256rrkz, X86::VCVTTPH2QQZ256rmkz, TB_NO_REVERSE},
+  {X86::VCVTTPH2QQZrrkz, X86::VCVTTPH2QQZrmkz, 0},
+  {X86::VCVTTPH2UDQZ128rrkz, X86::VCVTTPH2UDQZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTTPH2UDQZ256rrkz, X86::VCVTTPH2UDQZ256rmkz, 0},
+  {X86::VCVTTPH2UDQZrrkz, X86::VCVTTPH2UDQZrmkz, 0},
+  {X86::VCVTTPH2UQQZ128rrkz, X86::VCVTTPH2UQQZ128rmkz, TB_NO_REVERSE},
+  {X86::VCVTTPH2UQQZ256rrkz, X86::VCVTTPH2UQQZ256rmkz, TB_NO_REVERSE},
+  {X86::VCVTTPH2UQQZrrkz, X86::VCVTTPH2UQQZrmkz, 0},
+  {X86::VCVTTPH2UWZ128rrkz, X86::VCVTTPH2UWZ128rmkz, 0},
+  {X86::VCVTTPH2UWZ256rrkz, X86::VCVTTPH2UWZ256rmkz, 0},
+  {X86::VCVTTPH2UWZrrkz, X86::VCVTTPH2UWZrmkz, 0},
+  {X86::VCVTTPH2WZ128rrkz, X86::VCVTTPH2WZ128rmkz, 0},
+  {X86::VCVTTPH2WZ256rrkz, X86::VCVTTPH2WZ256rmkz, 0},
+  {X86::VCVTTPH2WZrrkz, X86::VCVTTPH2WZrmkz, 0},
   {X86::VCVTTPS2DQZ128rrkz, X86::VCVTTPS2DQZ128rmkz, 0},
   {X86::VCVTTPS2DQZ256rrkz, X86::VCVTTPS2DQZ256rmkz, 0},
   {X86::VCVTTPS2DQZrrkz, X86::VCVTTPS2DQZrmkz, 0},
   {X86::VCVTTPS2QQZ128rrkz, X86::VCVTTPS2QQZ128rmkz, TB_NO_REVERSE},
   {X86::VCVTTPS2QQZ256rrkz, X86::VCVTTPS2QQZ256rmkz, 0},
   {X86::VCVTTPS2QQZrrkz, X86::VCVTTPS2QQZrmkz, 0},
   {X86::VCVTTPS2UDQZ128rrkz, X86::VCVTTPS2UDQZ128rmkz, 0},
   {X86::VCVTTPS2UDQZ256rrkz, X86::VCVTTPS2UDQZ256rmkz, 0},
   {X86::VCVTTPS2UDQZrrkz, X86::VCVTTPS2UDQZrmkz, 0},
   {X86::VCVTTPS2UQQZ128rrkz, X86::VCVTTPS2UQQZ128rmkz, TB_NO_REVERSE},
   {X86::VCVTTPS2UQQZ256rrkz, X86::VCVTTPS2UQQZ256rmkz, 0},
   {X86::VCVTTPS2UQQZrrkz, X86::VCVTTPS2UQQZrmkz, 0},
   {X86::VCVTUDQ2PDZ128rrkz, X86::VCVTUDQ2PDZ128rmkz, TB_NO_REVERSE},
   {X86::VCVTUDQ2PDZ256rrkz, X86::VCVTUDQ2PDZ256rmkz, 0},
   {X86::VCVTUDQ2PDZrrkz, X86::VCVTUDQ2PDZrmkz, 0},
+  {X86::VCVTUDQ2PHZ128rrkz, X86::VCVTUDQ2PHZ128rmkz, 0},
+  {X86::VCVTUDQ2PHZ256rrkz, X86::VCVTUDQ2PHZ256rmkz, 0},
+  {X86::VCVTUDQ2PHZrrkz, X86::VCVTUDQ2PHZrmkz, 0},
   {X86::VCVTUDQ2PSZ128rrkz, X86::VCVTUDQ2PSZ128rmkz, 0},
   {X86::VCVTUDQ2PSZ256rrkz, X86::VCVTUDQ2PSZ256rmkz, 0},
   {X86::VCVTUDQ2PSZrrkz, X86::VCVTUDQ2PSZrmkz, 0},
   {X86::VCVTUQQ2PDZ128rrkz, X86::VCVTUQQ2PDZ128rmkz, 0},
   {X86::VCVTUQQ2PDZ256rrkz, X86::VCVTUQQ2PDZ256rmkz, 0},
   {X86::VCVTUQQ2PDZrrkz, X86::VCVTUQQ2PDZrmkz, 0},
+  {X86::VCVTUQQ2PHZ128rrkz, X86::VCVTUQQ2PHZ128rmkz, 0},
+  {X86::VCVTUQQ2PHZ256rrkz, X86::VCVTUQQ2PHZ256rmkz, 0},
+  {X86::VCVTUQQ2PHZrrkz, X86::VCVTUQQ2PHZrmkz, 0},
   {X86::VCVTUQQ2PSZ128rrkz, X86::VCVTUQQ2PSZ128rmkz, 0},
   {X86::VCVTUQQ2PSZ256rrkz, X86::VCVTUQQ2PSZ256rmkz, 0},
   {X86::VCVTUQQ2PSZrrkz, X86::VCVTUQQ2PSZrmkz, 0},
   {X86::VCVTUSI2SDZrr, X86::VCVTUSI2SDZrm, 0},
   {X86::VCVTUSI2SDZrr_Int, X86::VCVTUSI2SDZrm_Int, 0},
+  {X86::VCVTUSI2SHZrr, X86::VCVTUSI2SHZrm, 0},
+  {X86::VCVTUSI2SHZrr_Int, X86::VCVTUSI2SHZrm_Int, 0},
   {X86::VCVTUSI2SSZrr, X86::VCVTUSI2SSZrm, 0},
   {X86::VCVTUSI2SSZrr_Int, X86::VCVTUSI2SSZrm_Int, 0},
   {X86::VCVTUSI642SDZrr, X86::VCVTUSI642SDZrm, 0},
   {X86::VCVTUSI642SDZrr_Int, X86::VCVTUSI642SDZrm_Int, 0},
+  {X86::VCVTUSI642SHZrr, X86::VCVTUSI642SHZrm, 0},
+  {X86::VCVTUSI642SHZrr_Int, X86::VCVTUSI642SHZrm_Int, 0},
   {X86::VCVTUSI642SSZrr, X86::VCVTUSI642SSZrm, 0},
   {X86::VCVTUSI642SSZrr_Int, X86::VCVTUSI642SSZrm_Int, 0},
+  {X86::VCVTUW2PHZ128rrkz, X86::VCVTUW2PHZ128rmkz, 0},
+  {X86::VCVTUW2PHZ256rrkz, X86::VCVTUW2PHZ256rmkz, 0},
+  {X86::VCVTUW2PHZrrkz, X86::VCVTUW2PHZrmkz, 0},
+  {X86::VCVTW2PHZ128rrkz, X86::VCVTW2PHZ128rmkz, 0},
+  {X86::VCVTW2PHZ256rrkz, X86::VCVTW2PHZ256rmkz, 0},
+  {X86::VCVTW2PHZrrkz, X86::VCVTW2PHZrmkz, 0},
   {X86::VDBPSADBWZ128rri, X86::VDBPSADBWZ128rmi, 0},
   {X86::VDBPSADBWZ256rri, X86::VDBPSADBWZ256rmi, 0},
   {X86::VDBPSADBWZrri, X86::VDBPSADBWZrmi, 0},
   {X86::VDIVPDYrr, X86::VDIVPDYrm, 0},
   {X86::VDIVPDZ128rr, X86::VDIVPDZ128rm, 0},
   {X86::VDIVPDZ256rr, X86::VDIVPDZ256rm, 0},
   {X86::VDIVPDZrr, X86::VDIVPDZrm, 0},
   {X86::VDIVPDrr, X86::VDIVPDrm, 0},
static const X86MemoryFoldTableEntry MemoryFoldTable2[] = {
   {X86::VINSERTF64x4Zrr, X86::VINSERTF64x4Zrm, 0},
   {X86::VINSERTI128rr, X86::VINSERTI128rm, 0},
   {X86::VINSERTI32x4Z256rr, X86::VINSERTI32x4Z256rm, 0},
   {X86::VINSERTI32x4Zrr, X86::VINSERTI32x4Zrm, 0},
   {X86::VINSERTI32x8Zrr, X86::VINSERTI32x8Zrm, 0},
   {X86::VINSERTI64x2Z256rr, X86::VINSERTI64x2Z256rm, 0},
   {X86::VINSERTI64x2Zrr, X86::VINSERTI64x2Zrm, 0},
   {X86::VINSERTI64x4Zrr, X86::VINSERTI64x4Zrm, 0},
+  {X86::VINSERTPSZrr, X86::VINSERTPSZrm, TB_NO_REVERSE},
+  {X86::VINSERTPSrr, X86::VINSERTPSrm, TB_NO_REVERSE},
   {X86::VMAXCPDYrr, X86::VMAXCPDYrm, 0},
   {X86::VMAXCPDZ128rr, X86::VMAXCPDZ128rm, 0},
   {X86::VMAXCPDZ256rr, X86::VMAXCPDZ256rm, 0},
   {X86::VMAXCPDZrr, X86::VMAXCPDZrm, 0},
   {X86::VMAXCPDrr, X86::VMAXCPDrm, 0},
   {X86::VMAXCPHZ128rr, X86::VMAXCPHZ128rm, 0},
   {X86::VMAXCPHZ256rr, X86::VMAXCPHZ256rm, 0},
   {X86::VMAXCPHZrr, X86::VMAXCPHZrm, 0},
static const X86MemoryFoldTableEntry MemoryFoldTable3[] = {
   {X86::VCMPPSZ256rrik, X86::VCMPPSZ256rmik, 0},
   {X86::VCMPPSZrrik, X86::VCMPPSZrmik, 0},
   {X86::VCMPSDZrr_Intk, X86::VCMPSDZrm_Intk, TB_NO_REVERSE},
   {X86::VCMPSHZrr_Intk, X86::VCMPSHZrm_Intk, TB_NO_REVERSE},
   {X86::VCMPSSZrr_Intk, X86::VCMPSSZrm_Intk, TB_NO_REVERSE},
   {X86::VCVTDQ2PDZ128rrk, X86::VCVTDQ2PDZ128rmk, TB_NO_REVERSE},
   {X86::VCVTDQ2PDZ256rrk, X86::VCVTDQ2PDZ256rmk, 0},
   {X86::VCVTDQ2PDZrrk, X86::VCVTDQ2PDZrmk, 0},
+  {X86::VCVTDQ2PHZ128rrk, X86::VCVTDQ2PHZ128rmk, 0},
+  {X86::VCVTDQ2PHZ256rrk, X86::VCVTDQ2PHZ256rmk, 0},
+  {X86::VCVTDQ2PHZrrk, X86::VCVTDQ2PHZrmk, 0},
   {X86::VCVTDQ2PSZ128rrk, X86::VCVTDQ2PSZ128rmk, 0},
   {X86::VCVTDQ2PSZ256rrk, X86::VCVTDQ2PSZ256rmk, 0},
   {X86::VCVTDQ2PSZrrk, X86::VCVTDQ2PSZrmk, 0},
   {X86::VCVTNE2PS2BF16Z128rrkz, X86::VCVTNE2PS2BF16Z128rmkz, 0},
   {X86::VCVTNE2PS2BF16Z256rrkz, X86::VCVTNE2PS2BF16Z256rmkz, 0},
   {X86::VCVTNE2PS2BF16Zrrkz, X86::VCVTNE2PS2BF16Zrmkz, 0},
   {X86::VCVTNEPS2BF16Z128rrk, X86::VCVTNEPS2BF16Z128rmk, 0},
   {X86::VCVTNEPS2BF16Z256rrk, X86::VCVTNEPS2BF16Z256rmk, 0},
   {X86::VCVTNEPS2BF16Zrrk, X86::VCVTNEPS2BF16Zrmk, 0},
   {X86::VCVTPD2DQZ128rrk, X86::VCVTPD2DQZ128rmk, 0},
   {X86::VCVTPD2DQZ256rrk, X86::VCVTPD2DQZ256rmk, 0},
   {X86::VCVTPD2DQZrrk, X86::VCVTPD2DQZrmk, 0},
+  {X86::VCVTPD2PHZ128rrk, X86::VCVTPD2PHZ128rmk, 0},
+  {X86::VCVTPD2PHZ256rrk, X86::VCVTPD2PHZ256rmk, 0},
+  {X86::VCVTPD2PHZrrk, X86::VCVTPD2PHZrmk, 0},
   {X86::VCVTPD2PSZ128rrk, X86::VCVTPD2PSZ128rmk, 0},
   {X86::VCVTPD2PSZ256rrk, X86::VCVTPD2PSZ256rmk, 0},
   {X86::VCVTPD2PSZrrk, X86::VCVTPD2PSZrmk, 0},
   {X86::VCVTPD2QQZ128rrk, X86::VCVTPD2QQZ128rmk, 0},
   {X86::VCVTPD2QQZ256rrk, X86::VCVTPD2QQZ256rmk, 0},
   {X86::VCVTPD2QQZrrk, X86::VCVTPD2QQZrmk, 0},
   {X86::VCVTPD2UDQZ128rrk, X86::VCVTPD2UDQZ128rmk, 0},
   {X86::VCVTPD2UDQZ256rrk, X86::VCVTPD2UDQZ256rmk, 0},
   {X86::VCVTPD2UDQZrrk, X86::VCVTPD2UDQZrmk, 0},
   {X86::VCVTPD2UQQZ128rrk, X86::VCVTPD2UQQZ128rmk, 0},
   {X86::VCVTPD2UQQZ256rrk, X86::VCVTPD2UQQZ256rmk, 0},
   {X86::VCVTPD2UQQZrrk, X86::VCVTPD2UQQZrmk, 0},
+  {X86::VCVTPH2DQZ128rrk, X86::VCVTPH2DQZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTPH2DQZ256rrk, X86::VCVTPH2DQZ256rmk, 0},
+  {X86::VCVTPH2DQZrrk, X86::VCVTPH2DQZrmk, 0},
+  {X86::VCVTPH2PDZ128rrk, X86::VCVTPH2PDZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTPH2PDZ256rrk, X86::VCVTPH2PDZ256rmk, TB_NO_REVERSE},
+  {X86::VCVTPH2PDZrrk, X86::VCVTPH2PDZrmk, 0},
+  {X86::VCVTPH2PSXZ128rrk, X86::VCVTPH2PSXZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTPH2PSXZ256rrk, X86::VCVTPH2PSXZ256rmk, 0},
+  {X86::VCVTPH2PSXZrrk, X86::VCVTPH2PSXZrmk, 0},
   {X86::VCVTPH2PSZ128rrk, X86::VCVTPH2PSZ128rmk, TB_NO_REVERSE},
   {X86::VCVTPH2PSZ256rrk, X86::VCVTPH2PSZ256rmk, 0},
   {X86::VCVTPH2PSZrrk, X86::VCVTPH2PSZrmk, 0},
+  {X86::VCVTPH2QQZ128rrk, X86::VCVTPH2QQZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTPH2QQZ256rrk, X86::VCVTPH2QQZ256rmk, TB_NO_REVERSE},
+  {X86::VCVTPH2QQZrrk, X86::VCVTPH2QQZrmk, 0},
+  {X86::VCVTPH2UDQZ128rrk, X86::VCVTPH2UDQZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTPH2UDQZ256rrk, X86::VCVTPH2UDQZ256rmk, 0},
+  {X86::VCVTPH2UDQZrrk, X86::VCVTPH2UDQZrmk, 0},
+  {X86::VCVTPH2UQQZ128rrk, X86::VCVTPH2UQQZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTPH2UQQZ256rrk, X86::VCVTPH2UQQZ256rmk, TB_NO_REVERSE},
+  {X86::VCVTPH2UQQZrrk, X86::VCVTPH2UQQZrmk, 0},
+  {X86::VCVTPH2UWZ128rrk, X86::VCVTPH2UWZ128rmk, 0},
+  {X86::VCVTPH2UWZ256rrk, X86::VCVTPH2UWZ256rmk, 0},
+  {X86::VCVTPH2UWZrrk, X86::VCVTPH2UWZrmk, 0},
+  {X86::VCVTPH2WZ128rrk, X86::VCVTPH2WZ128rmk, 0},
+  {X86::VCVTPH2WZ256rrk, X86::VCVTPH2WZ256rmk, 0},
+  {X86::VCVTPH2WZrrk, X86::VCVTPH2WZrmk, 0},
   {X86::VCVTPS2DQZ128rrk, X86::VCVTPS2DQZ128rmk, 0},
   {X86::VCVTPS2DQZ256rrk, X86::VCVTPS2DQZ256rmk, 0},
   {X86::VCVTPS2DQZrrk, X86::VCVTPS2DQZrmk, 0},
   {X86::VCVTPS2PDZ128rrk, X86::VCVTPS2PDZ128rmk, TB_NO_REVERSE},
   {X86::VCVTPS2PDZ256rrk, X86::VCVTPS2PDZ256rmk, 0},
   {X86::VCVTPS2PDZrrk, X86::VCVTPS2PDZrmk, 0},
+  {X86::VCVTPS2PHXZ128rrk, X86::VCVTPS2PHXZ128rmk, 0},
+  {X86::VCVTPS2PHXZ256rrk, X86::VCVTPS2PHXZ256rmk, 0},
+  {X86::VCVTPS2PHXZrrk, X86::VCVTPS2PHXZrmk, 0},
   {X86::VCVTPS2QQZ128rrk, X86::VCVTPS2QQZ128rmk, TB_NO_REVERSE},
   {X86::VCVTPS2QQZ256rrk, X86::VCVTPS2QQZ256rmk, 0},
   {X86::VCVTPS2QQZrrk, X86::VCVTPS2QQZrmk, 0},
   {X86::VCVTPS2UDQZ128rrk, X86::VCVTPS2UDQZ128rmk, 0},
   {X86::VCVTPS2UDQZ256rrk, X86::VCVTPS2UDQZ256rmk, 0},
   {X86::VCVTPS2UDQZrrk, X86::VCVTPS2UDQZrmk, 0},
   {X86::VCVTPS2UQQZ128rrk, X86::VCVTPS2UQQZ128rmk, TB_NO_REVERSE},
   {X86::VCVTPS2UQQZ256rrk, X86::VCVTPS2UQQZ256rmk, 0},
   {X86::VCVTPS2UQQZrrk, X86::VCVTPS2UQQZrmk, 0},
   {X86::VCVTQQ2PDZ128rrk, X86::VCVTQQ2PDZ128rmk, 0},
   {X86::VCVTQQ2PDZ256rrk, X86::VCVTQQ2PDZ256rmk, 0},
   {X86::VCVTQQ2PDZrrk, X86::VCVTQQ2PDZrmk, 0},
+  {X86::VCVTQQ2PHZ128rrk, X86::VCVTQQ2PHZ128rmk, 0},
+  {X86::VCVTQQ2PHZ256rrk, X86::VCVTQQ2PHZ256rmk, 0},
+  {X86::VCVTQQ2PHZrrk, X86::VCVTQQ2PHZrmk, 0},
   {X86::VCVTQQ2PSZ128rrk, X86::VCVTQQ2PSZ128rmk, 0},
   {X86::VCVTQQ2PSZ256rrk, X86::VCVTQQ2PSZ256rmk, 0},
   {X86::VCVTQQ2PSZrrk, X86::VCVTQQ2PSZrmk, 0},
+  {X86::VCVTSD2SHZrr_Intkz, X86::VCVTSD2SHZrm_Intkz, TB_NO_REVERSE},
   {X86::VCVTSD2SSZrr_Intkz, X86::VCVTSD2SSZrm_Intkz, TB_NO_REVERSE},
+  {X86::VCVTSH2SDZrr_Intkz, X86::VCVTSH2SDZrm_Intkz, TB_NO_REVERSE},
+  {X86::VCVTSH2SSZrr_Intkz, X86::VCVTSH2SSZrm_Intkz, TB_NO_REVERSE},
   {X86::VCVTSS2SDZrr_Intkz, X86::VCVTSS2SDZrm_Intkz, TB_NO_REVERSE},
+  {X86::VCVTSS2SHZrr_Intkz, X86::VCVTSS2SHZrm_Intkz, TB_NO_REVERSE},
   {X86::VCVTTPD2DQZ128rrk, X86::VCVTTPD2DQZ128rmk, 0},
   {X86::VCVTTPD2DQZ256rrk, X86::VCVTTPD2DQZ256rmk, 0},
   {X86::VCVTTPD2DQZrrk, X86::VCVTTPD2DQZrmk, 0},
   {X86::VCVTTPD2QQZ128rrk, X86::VCVTTPD2QQZ128rmk, 0},
   {X86::VCVTTPD2QQZ256rrk, X86::VCVTTPD2QQZ256rmk, 0},
   {X86::VCVTTPD2QQZrrk, X86::VCVTTPD2QQZrmk, 0},
   {X86::VCVTTPD2UDQZ128rrk, X86::VCVTTPD2UDQZ128rmk, 0},
   {X86::VCVTTPD2UDQZ256rrk, X86::VCVTTPD2UDQZ256rmk, 0},
   {X86::VCVTTPD2UDQZrrk, X86::VCVTTPD2UDQZrmk, 0},
   {X86::VCVTTPD2UQQZ128rrk, X86::VCVTTPD2UQQZ128rmk, 0},
   {X86::VCVTTPD2UQQZ256rrk, X86::VCVTTPD2UQQZ256rmk, 0},
   {X86::VCVTTPD2UQQZrrk, X86::VCVTTPD2UQQZrmk, 0},
+  {X86::VCVTTPH2DQZ128rrk, X86::VCVTTPH2DQZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTTPH2DQZ256rrk, X86::VCVTTPH2DQZ256rmk, 0},
+  {X86::VCVTTPH2DQZrrk, X86::VCVTTPH2DQZrmk, 0},
+  {X86::VCVTTPH2QQZ128rrk, X86::VCVTTPH2QQZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTTPH2QQZ256rrk, X86::VCVTTPH2QQZ256rmk, TB_NO_REVERSE},
+  {X86::VCVTTPH2QQZrrk, X86::VCVTTPH2QQZrmk, 0},
+  {X86::VCVTTPH2UDQZ128rrk, X86::VCVTTPH2UDQZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTTPH2UDQZ256rrk, X86::VCVTTPH2UDQZ256rmk, 0},
+  {X86::VCVTTPH2UDQZrrk, X86::VCVTTPH2UDQZrmk, 0},
+  {X86::VCVTTPH2UQQZ128rrk, X86::VCVTTPH2UQQZ128rmk, TB_NO_REVERSE},
+  {X86::VCVTTPH2UQQZ256rrk, X86::VCVTTPH2UQQZ256rmk, TB_NO_REVERSE},
+  {X86::VCVTTPH2UQQZrrk, X86::VCVTTPH2UQQZrmk, 0},
+  {X86::VCVTTPH2UWZ128rrk, X86::VCVTTPH2UWZ128rmk, 0},
+  {X86::VCVTTPH2UWZ256rrk, X86::VCVTTPH2UWZ256rmk, 0},
+  {X86::VCVTTPH2UWZrrk, X86::VCVTTPH2UWZrmk, 0},
+  {X86::VCVTTPH2WZ128rrk, X86::VCVTTPH2WZ128rmk, 0},
+  {X86::VCVTTPH2WZ256rrk, X86::VCVTTPH2WZ256rmk, 0},
+  {X86::VCVTTPH2WZrrk, X86::VCVTTPH2WZrmk, 0},
   {X86::VCVTTPS2DQZ128rrk, X86::VCVTTPS2DQZ128rmk, 0},
   {X86::VCVTTPS2DQZ256rrk, X86::VCVTTPS2DQZ256rmk, 0},
   {X86::VCVTTPS2DQZrrk, X86::VCVTTPS2DQZrmk, 0},
   {X86::VCVTTPS2QQZ128rrk, X86::VCVTTPS2QQZ128rmk, TB_NO_REVERSE},
   {X86::VCVTTPS2QQZ256rrk, X86::VCVTTPS2QQZ256rmk, 0},
   {X86::VCVTTPS2QQZrrk, X86::VCVTTPS2QQZrmk, 0},
   {X86::VCVTTPS2UDQZ128rrk, X86::VCVTTPS2UDQZ128rmk, 0},
   {X86::VCVTTPS2UDQZ256rrk, X86::VCVTTPS2UDQZ256rmk, 0},
   {X86::VCVTTPS2UDQZrrk, X86::VCVTTPS2UDQZrmk, 0},
   {X86::VCVTTPS2UQQZ128rrk, X86::VCVTTPS2UQQZ128rmk, TB_NO_REVERSE},
   {X86::VCVTTPS2UQQZ256rrk, X86::VCVTTPS2UQQZ256rmk, 0},
   {X86::VCVTTPS2UQQZrrk, X86::VCVTTPS2UQQZrmk, 0},
   {X86::VCVTUDQ2PDZ128rrk, X86::VCVTUDQ2PDZ128rmk, TB_NO_REVERSE},
   {X86::VCVTUDQ2PDZ256rrk, X86::VCVTUDQ2PDZ256rmk, 0},
   {X86::VCVTUDQ2PDZrrk, X86::VCVTUDQ2PDZrmk, 0},
+  {X86::VCVTUDQ2PHZ128rrk, X86::VCVTUDQ2PHZ128rmk, 0},
+  {X86::VCVTUDQ2PHZ256rrk, X86::VCVTUDQ2PHZ256rmk, 0},
+  {X86::VCVTUDQ2PHZrrk, X86::VCVTUDQ2PHZrmk, 0},
   {X86::VCVTUDQ2PSZ128rrk, X86::VCVTUDQ2PSZ128rmk, 0},
   {X86::VCVTUDQ2PSZ256rrk, X86::VCVTUDQ2PSZ256rmk, 0},
   {X86::VCVTUDQ2PSZrrk, X86::VCVTUDQ2PSZrmk, 0},
   {X86::VCVTUQQ2PDZ128rrk, X86::VCVTUQQ2PDZ128rmk, 0},
   {X86::VCVTUQQ2PDZ256rrk, X86::VCVTUQQ2PDZ256rmk, 0},
   {X86::VCVTUQQ2PDZrrk, X86::VCVTUQQ2PDZrmk, 0},
+  {X86::VCVTUQQ2PHZ128rrk, X86::VCVTUQQ2PHZ128rmk, 0},
+  {X86::VCVTUQQ2PHZ256rrk, X86::VCVTUQQ2PHZ256rmk, 0},
+  {X86::VCVTUQQ2PHZrrk, X86::VCVTUQQ2PHZrmk, 0},
   {X86::VCVTUQQ2PSZ128rrk, X86::VCVTUQQ2PSZ128rmk, 0},
   {X86::VCVTUQQ2PSZ256rrk, X86::VCVTUQQ2PSZ256rmk, 0},
   {X86::VCVTUQQ2PSZrrk, X86::VCVTUQQ2PSZrmk, 0},
+  {X86::VCVTUW2PHZ128rrk, X86::VCVTUW2PHZ128rmk, 0},
+  {X86::VCVTUW2PHZ256rrk, X86::VCVTUW2PHZ256rmk, 0},
+  {X86::VCVTUW2PHZrrk, X86::VCVTUW2PHZrmk, 0},
+  {X86::VCVTW2PHZ128rrk, X86::VCVTW2PHZ128rmk, 0},
+  {X86::VCVTW2PHZ256rrk, X86::VCVTW2PHZ256rmk, 0},
+  {X86::VCVTW2PHZrrk, X86::VCVTW2PHZrmk, 0},
   {X86::VDBPSADBWZ128rrikz, X86::VDBPSADBWZ128rmikz, 0},
   {X86::VDBPSADBWZ256rrikz, X86::VDBPSADBWZ256rmikz, 0},
   {X86::VDBPSADBWZrrikz, X86::VDBPSADBWZrmikz, 0},
   {X86::VDIVPDZ128rrkz, X86::VDIVPDZ128rmkz, 0},
   {X86::VDIVPDZ256rrkz, X86::VDIVPDZ256rmkz, 0},
   {X86::VDIVPDZrrkz, X86::VDIVPDZrmkz, 0},
   {X86::VDIVPHZ128rrkz, X86::VDIVPHZ128rmkz, 0},
   {X86::VDIVPHZ256rrkz, X86::VDIVPHZ256rmkz, 0},

   {X86::VUNPCKLPSZrrk, X86::VUNPCKLPSZrmk, 0},
   {X86::VXORPDZ128rrk, X86::VXORPDZ128rmk, 0},
   {X86::VXORPDZ256rrk, X86::VXORPDZ256rmk, 0},
   {X86::VXORPDZrrk, X86::VXORPDZrmk, 0},
   {X86::VXORPSZ128rrk, X86::VXORPSZ128rmk, 0},
   {X86::VXORPSZ256rrk, X86::VXORPSZ256rmk, 0},
   {X86::VXORPSZrrk, X86::VXORPSZrmk, 0},
 };
+