[BOLT][NFC] Remove AArch64 override for evaluateBranch

[Amir]

Summary

Use MCInstrAnalysis implementation

[rafauler]

Thanks! LGTM

[yota9]

LGTM either, thank you!

bolt/include/bolt/Core/MCPlusBuilder.h

matchLoad(std::unique_ptr<MCInstMatcher> Base,
             std::unique_ptr<MCInstMatcher> Offset) const {
     llvm_unreachable("not implemented");
     return nullptr;
   }
 
   /// \brief Given a branch instruction try to get the address the branch
   /// targets. Return true on success, and the address in Target.
   virtual bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
-                              uint64_t &Target) const;
+                              uint64_t &Target) const {
+    return Analysis->evaluateBranch(Inst, Addr, Size, Target);
+  }
 
   /// Return true if one of the operands of the \p Inst instruction uses
   /// PC-relative addressing.
   /// Note that PC-relative branches do not fall into this category.
   virtual bool hasPCRelOperand(const MCInst &Inst) const {
     llvm_unreachable("not implemented");
     return false;
   }

bolt/lib/Core/MCPlusBuilder.cpp

for (unsigned I = 0; I < AnnotationInst->getNumOperands(); ++I) {
     const auto *Annotation = reinterpret_cast<const MCAnnotation *>(Value);
     if (Index >= MCAnnotation::kGeneric) {
       OS << " # " << AnnotationNames[Index - MCAnnotation::kGeneric] << ": ";
       Annotation->print(OS);
     }
   }
 }
 
-bool MCPlusBuilder::evaluateBranch(const MCInst &Inst, uint64_t Addr,
-                                   uint64_t Size, uint64_t &Target) const {
-  return Analysis->evaluateBranch(Inst, Addr, Size, Target);
-}
-
 void MCPlusBuilder::getClobberedRegs(const MCInst &Inst,
                                      BitVector &Regs) const {
   if (isPrefix(Inst) || isCFI(Inst))
     return;
 
   const MCInstrDesc &InstInfo = Info->get(Inst.getOpcode());
 
   const MCPhysReg *ImplicitDefs = InstInfo.getImplicitDefs();

bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp

int64_t getTargetAddend(const MCInst &Inst,
 
     const MCOperand &Op = Inst.getOperand(OpNum);
     if (!Op.isExpr())
       return 0;
 
     return getTargetAddend(Op.getExpr());
   }
 
-  bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
-                      uint64_t &Target) const override {
-    size_t OpNum = 0;
-
-    if (isConditionalBranch(Inst)) {
-      assert(MCPlus::getNumPrimeOperands(Inst) >= 2 &&
-             "Invalid number of operands");
-      OpNum = 1;
-    }
-
-    if (isTB(Inst)) {
-      assert(MCPlus::getNumPrimeOperands(Inst) >= 3 &&
-             "Invalid number of operands");
-      OpNum = 2;
-    }
-
-    if (Info->get(Inst.getOpcode()).OpInfo[OpNum].OperandType !=
-        MCOI::OPERAND_PCREL) {
-      assert((isIndirectBranch(Inst) || isIndirectCall(Inst)) &&
-             "FAILED evaluateBranch");
-      return false;
-    }
-
-    int64_t Imm = Inst.getOperand(OpNum).getImm() << 2;
-    Target = Addr + Imm;
-    return true;
-  }
-
   bool replaceBranchTarget(MCInst &Inst, const MCSymbol *TBB,
                            MCContext *Ctx) const override {
     assert((isCall(Inst) || isBranch(Inst)) && !isIndirectBranch(Inst) &&
            "Invalid instruction");
     assert(MCPlus::getNumPrimeOperands(Inst) >= 1 &&
            "Invalid number of operands");
     MCInst::iterator OI = Inst.begin();