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Differential D141890

[BOLT][NFC] Use GR64 RegClass in getGPRegs
Needs ReviewPublic

Authored by Amir on Jan 16 2023, 9:13 PM.

Details

Reviewers
rafauler
maksfb
Group Reviewers
Restricted Project

Diff Detail

Event Timeline

Amir created this revision.Jan 16 2023, 9:13 PM
Herald added a reviewer: rafauler. · View Herald TranscriptJan 16 2023, 9:13 PM
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Amir requested review of this revision.Jan 16 2023, 9:13 PM
Herald added a project: Restricted Project. · View Herald TranscriptJan 16 2023, 9:13 PM
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Harbormaster completed remote builds in B208154: Diff 489696.Jan 16 2023, 9:19 PM

Revision Contents

PathSize
bolt/
lib/
Target/
X86/
40 lines

Diff 489696

bolt/lib/Target/X86/X86MCPlusBuilder.cpp

Show First 20 Lines • Show All 806 Lines • ▼ Show 20 Lines assert(Regs.size() >= RegInfo->getNumRegs() &&
"The size of BitVector is less than RegInfo->getNumRegs()."); "The size of BitVector is less than RegInfo->getNumRegs().");
Regs |= getAliases(X86::RAX); Regs |= getAliases(X86::RAX);
Regs |= getAliases(X86::RDX); Regs |= getAliases(X86::RDX);
Regs |= getAliases(X86::RCX); Regs |= getAliases(X86::RCX);
Regs |= getAliases(X86::XMM0); Regs |= getAliases(X86::XMM0);
Regs |= getAliases(X86::XMM1); Regs |= getAliases(X86::XMM1);
} }
void getGPRegs(BitVector &Regs, bool IncludeAlias) const override { void getGPRegs(BitVector &Regs, bool IncludeAlias = true) const override {
if (IncludeAlias) { for (MCPhysReg Reg : X86MCRegisterClasses[X86::GR64RegClassID])
Regs |= getAliases(X86::RAX); if (IncludeAlias)
Regs |= getAliases(X86::RBX); Regs |= getAliases(Reg);
Regs |= getAliases(X86::RBP); else
Regs |= getAliases(X86::RSI); Regs.set(Reg);
Regs |= getAliases(X86::RDI);
Regs |= getAliases(X86::RDX);
Regs |= getAliases(X86::RCX);
Regs |= getAliases(X86::R8);
Regs |= getAliases(X86::R9);
Regs |= getAliases(X86::R10);
Regs |= getAliases(X86::R11);
Regs |= getAliases(X86::R12);
Regs |= getAliases(X86::R13);
Regs |= getAliases(X86::R14);
Regs |= getAliases(X86::R15);
return;
}
Regs.set(X86::RAX);
Regs.set(X86::RBX);
Regs.set(X86::RBP);
Regs.set(X86::RSI);
Regs.set(X86::RDI);
Regs.set(X86::RDX);
Regs.set(X86::RCX);
Regs.set(X86::R8);
Regs.set(X86::R9);
Regs.set(X86::R10);
Regs.set(X86::R11);
Regs.set(X86::R12);
Regs.set(X86::R13);
Regs.set(X86::R14);
Regs.set(X86::R15);
} }
void getClassicGPRegs(BitVector &Regs) const override { void getClassicGPRegs(BitVector &Regs) const override {
Regs |= getAliases(X86::RAX); Regs |= getAliases(X86::RAX);
Regs |= getAliases(X86::RBX); Regs |= getAliases(X86::RBX);
Regs |= getAliases(X86::RBP); Regs |= getAliases(X86::RBP);
Regs |= getAliases(X86::RSI); Regs |= getAliases(X86::RSI);
Regs |= getAliases(X86::RDI); Regs |= getAliases(X86::RDI);
▲ Show 20 Lines • Show All 2,894 Lines • Show Last 20 Lines