[LLDB][LoongArch] Optimize EmulateInstructionLoongArch related code

[lh03061238]

Summary

This is a code optimization patch that does not include feature additions
or deletions.

[SixWeining]

lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp

202

return IsLoongArch64() ? EmulateBEQZ64(inst) : false;

[lh03061238]

lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp

202

Will be modified,
thank you

[lh03061238]

Change (IsLoongArch64()) to IsLoongArch64() in some functions

[SixWeining]

LGTM. Thanks.

lldb/source/Plugins/Instruction/LoongArch/EmulateInstructionLoongArch.cpp

EmulateInstructionLoongArch::CreateInstance(const ArchSpec &arch,
   return nullptr;
 }
 
 bool EmulateInstructionLoongArch::SupportsThisArch(const ArchSpec &arch) {
   return arch.GetTriple().isLoongArch();
 }
 
 bool EmulateInstructionLoongArch::EmulateBEQZ(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateBEQZ64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateBEQZ64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBNEZ(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateBNEZ64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateBNEZ64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateJIRL(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateJIRL64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateJIRL64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateB(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateB64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateB64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBL(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateBL64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateBL64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBEQ(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateBEQ64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateBEQ64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBNE(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateJIRL64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateBNE64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBLT(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateBLT64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateBLT64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBGE(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateBGE64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateBGE64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBLTU(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateBLTU64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateBLTU64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateBGEU(uint32_t inst) {
-  if (IsLoongArch64())
-    return EmulateBGEU64(inst);
-  else
-    return false;
+  return (IsLoongArch64()) ? EmulateBGEU64(inst) : false;
 }
 
 bool EmulateInstructionLoongArch::EmulateNonJMP(uint32_t inst) { return false; }
 
 // beqz rj, offs21
 // if GR[rj] == 0:
 //   PC = PC + SignExtend({offs21, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBEQZ64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
-  uint64_t rj_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
-  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
   if (rj_val == 0) {
-    imm_sign_extend = llvm::SignExtend64<23>(offs21 << 2);
-    next_pc = pc + imm_sign_extend;
+    uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2);
     return WritePC(next_pc);
   } else
     return WritePC(pc + 4);
 }
 
 // bnez rj, offs21
 // if GR[rj] != 0:
 //   PC = PC + SignExtend({offs21, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBNEZ64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
-  uint64_t rj_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
   uint32_t offs21 = Bits32(inst, 25, 10) + (Bits32(inst, 4, 0) << 16);
-  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
   if (rj_val != 0) {
-    imm_sign_extend = llvm::SignExtend64<23>(offs21 << 2);
-    next_pc = pc + imm_sign_extend;
+    uint64_t next_pc = pc + llvm::SignExtend64<23>(offs21 << 2);
     return WritePC(next_pc);
   } else
     return WritePC(pc + 4);
 }
 
 // jirl rd, rj, offs16
 // GR[rd] = PC + 4
 // PC = GR[rj] + SignExtend({offs16, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateJIRL64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
-  RegisterValue value;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
   bool success = false;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
   EmulateInstruction::Context ctx;
   if (!WriteRegisterUnsigned(ctx, eRegisterKindLLDB, rd, pc + 4))
     return false;
-  if (!ReadRegister(eRegisterKindLLDB, rj, value))
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  if (!success)
     return false;
-  imm_sign_extend = llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
-  next_pc = value.GetAsUInt64() + imm_sign_extend;
+  uint64_t next_pc = rj_val + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
   return WritePC(next_pc);
 }
 
 // b offs26
 // PC = PC + SignExtend({offs26, 2' b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateB64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
   uint32_t offs26 = Bits32(inst, 25, 10) + (Bits32(inst, 9, 0) << 16);
-  imm_sign_extend = llvm::SignExtend64<28>(offs26 << 2);
-  next_pc = pc + imm_sign_extend;
+  uint64_t next_pc = pc + llvm::SignExtend64<28>(offs26 << 2);
   return WritePC(next_pc);
 }
 
 // bl offs26
 // GR[1] = PC + 4
 // PC = PC + SignExtend({offs26, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBL64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
   EmulateInstruction::Context ctx;
   if (!WriteRegisterUnsigned(ctx, eRegisterKindLLDB, gpr_r1_loongarch, pc + 4))
     return false;
   uint32_t offs26 = Bits32(inst, 25, 10) + (Bits32(inst, 9, 0) << 16);
-  imm_sign_extend = llvm::SignExtend64<28>(offs26 << 2);
-  next_pc = pc + imm_sign_extend;
+  uint64_t next_pc = pc + llvm::SignExtend64<28>(offs26 << 2);
   return WritePC(next_pc);
 }
 
 // beq rj, rd, offs16
 // if GR[rj] == GR[rd]:
 //   PC = PC + SignExtend({offs16, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBEQ64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-  uint64_t rj_val, rd_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
-  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
-  rd_val = ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
+  uint64_t rd_val = ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
   if (!success)
     return false;
   if (rj_val == rd_val) {
-    imm_sign_extend = llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
-    next_pc = pc + imm_sign_extend;
+    uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
     return WritePC(next_pc);
   } else
     return WritePC(pc + 4);
 }
 
 // bne rj, rd, offs16
 // if GR[rj] != GR[rd]:
 //   PC = PC + SignExtend({offs16, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBNE64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-  uint64_t rj_val, rd_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
-  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
-  rd_val = ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
+  uint64_t rd_val = ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
   if (!success)
     return false;
   if (rj_val != rd_val) {
-    imm_sign_extend = llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
-    next_pc = pc + imm_sign_extend;
+    uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
     return WritePC(next_pc);
   } else
     return WritePC(pc + 4);
 }
 
 // blt rj, rd, offs16
 // if signed(GR[rj]) < signed(GR[rd]):
 //   PC = PC + SignExtend({offs16, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBLT64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-  int64_t rj_val, rd_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
-  rj_val = (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  int64_t rj_val =
+      (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
-  rd_val = (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
+  int64_t rd_val =
+      (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
   if (!success)
     return false;
   if (rj_val < rd_val) {
-    imm_sign_extend = llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
-    next_pc = pc + imm_sign_extend;
+    uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
     return WritePC(next_pc);
   } else
     return WritePC(pc + 4);
 }
 
 // bge rj, rd, offs16
 // if signed(GR[rj]) >= signed(GR[rd]):
 //   PC = PC + SignExtend({offs16, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBGE64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-  int64_t rj_val, rd_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
-  rj_val = (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  int64_t rj_val =
+      (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
-  rd_val = (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
+  int64_t rd_val =
+      (int64_t)ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
   if (!success)
     return false;
   if (rj_val >= rd_val) {
-    imm_sign_extend = llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
-    next_pc = pc + imm_sign_extend;
+    uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
     return WritePC(next_pc);
   } else
     return WritePC(pc + 4);
 }
 
 // bltu rj, rd, offs16
 // if unsigned(GR[rj]) < unsigned(GR[rd]):
 //   PC = PC + SignExtend({offs16, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBLTU64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-  uint64_t rj_val, rd_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
-  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
-  rd_val = ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
+  uint64_t rd_val = ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
   if (!success)
     return false;
   if (rj_val < rd_val) {
-    imm_sign_extend = llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
-    next_pc = pc + imm_sign_extend;
+    uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
     return WritePC(next_pc);
   } else
     return WritePC(pc + 4);
 }
 
 // bgeu rj, rd, offs16
 // if unsigned(GR[rj]) >= unsigned(GR[rd]):
 //   PC = PC + SignExtend({offs16, 2'b0}, GRLEN)
 bool EmulateInstructionLoongArch::EmulateBGEU64(uint32_t inst) {
-  uint64_t next_pc, imm_sign_extend;
   bool success = false;
   uint32_t rj = Bits32(inst, 9, 5);
   uint32_t rd = Bits32(inst, 4, 0);
-  uint64_t rj_val, rd_val;
   uint64_t pc = ReadPC(&success);
   if (!success)
     return false;
-  rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
+  uint64_t rj_val = ReadRegisterUnsigned(eRegisterKindLLDB, rj, 0, &success);
   if (!success)
     return false;
-  rd_val = ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
+  uint64_t rd_val = ReadRegisterUnsigned(eRegisterKindLLDB, rd, 0, &success);
   if (!success)
     return false;
   if (rj_val >= rd_val) {
-    imm_sign_extend = llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
-    next_pc = pc + imm_sign_extend;
+    uint64_t next_pc = pc + llvm::SignExtend64<18>(Bits32(inst, 25, 10) << 2);
     return WritePC(next_pc);
   } else
     return WritePC(pc + 4);
 }
 
 } // namespace lldb_private