[PowerPC] remove the ctr clobbers check related to TLS access

[shchenz]

Summary

Dynamic tls access model will be lowered to MI which clobbers CTR in
the loop in ISEL(ADDItlsgdLADDR) and post-isel CTR loop pass will revert
the loop to a normal compare + branch form.

So no need to add this clobber check in hardware loop insertion pass now.

[shchenz]

gentle ping

[nemanjai]

Great. Thank you for getting rid of this check which is now unnecessary. LGTM.

llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp

if (U->getType()->isVectorTy()) {
     // Instructions that need to be split should cost more.
     std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(U->getType());
     return LT.first * BaseT::getInstructionCost(U, Operands, CostKind);
   }
 
   return BaseT::getInstructionCost(U, Operands, CostKind);
 }
 
-// Determining the address of a TLS variable results in a function call in
-// certain TLS models.
-static bool memAddrUsesCTR(const Value *MemAddr, const PPCTargetMachine &TM,
-                           SmallPtrSetImpl<const Value *> &Visited) {
-  // No need to traverse again if we already checked this operand.
-  if (!Visited.insert(MemAddr).second)
-    return false;
-  const auto *GV = dyn_cast<GlobalValue>(MemAddr);
-  if (!GV) {
-    // Recurse to check for constants that refer to TLS global variables.
-    if (const auto *CV = dyn_cast<Constant>(MemAddr))
-      for (const auto &CO : CV->operands())
-        if (memAddrUsesCTR(CO, TM, Visited))
-          return true;
-    return false;
-  }
-
-  if (!GV->isThreadLocal())
-    return false;
-  TLSModel::Model Model = TM.getTLSModel(GV);
-  return Model == TLSModel::GeneralDynamic || Model == TLSModel::LocalDynamic;
-}
-
 bool PPCTTIImpl::isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE,
                                           AssumptionCache &AC,
                                           TargetLibraryInfo *LibInfo,
                                           HardwareLoopInfo &HWLoopInfo) {
   const PPCTargetMachine &TM = ST->getTargetMachine();
   TargetSchedModel SchedModel;
   SchedModel.init(ST);
 
if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
       // we return here without further analysis for this loop.
       bool TrueIsExit = !L->contains(BI->getSuccessor(0));
       if (( TrueIsExit && FalseWeight < TrueWeight) ||
           (!TrueIsExit && FalseWeight > TrueWeight))
         return false;
     }
   }
 
-  // If an exit block has a PHI that accesses a TLS variable as one of the
-  // incoming values from the loop, we cannot produce a CTR loop because the
-  // address for that value will be computed in the loop.
-  SmallVector<BasicBlock *, 4> ExitBlocks;
-  L->getExitBlocks(ExitBlocks);
-  SmallPtrSet<const Value *, 4> Visited;
-  for (auto &BB : ExitBlocks) {
-    for (auto &PHI : BB->phis()) {
-      for (int Idx = 0, EndIdx = PHI.getNumIncomingValues(); Idx < EndIdx;
-           Idx++) {
-        const BasicBlock *IncomingBB = PHI.getIncomingBlock(Idx);
-        const Value *IncomingValue = PHI.getIncomingValue(Idx);
-        if (L->contains(IncomingBB) &&
-            memAddrUsesCTR(IncomingValue, TM, Visited))
-          return false;
-      }
-    }
-  }
-
   LLVMContext &C = L->getHeader()->getContext();
   HWLoopInfo.CountType = TM.isPPC64() ?
     Type::getInt64Ty(C) : Type::getInt32Ty(C);
   HWLoopInfo.LoopDecrement = ConstantInt::get(HWLoopInfo.CountType, 1);
   return true;
 }
 
 void PPCTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE,

llvm/test/CodeGen/PowerPC/pr48527.ll

 
 @g = external local_unnamed_addr global %struct.e.0.12.28.44.104.108.112.188, align 4
 @aj = external thread_local local_unnamed_addr global %struct.t.1.13.29.45.105.109.113.189, align 8
 
 define void @_ZNK1q1rEv() local_unnamed_addr #0 align 2 {
 ; CHECK-LABEL: _ZNK1q1rEv:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    std 28, -32(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 29, -24(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    stdu 1, -64(1)
 ; CHECK-NEXT:    std 0, 80(1)
-; CHECK-NEXT:    li 29, 0
-; CHECK-NEXT:    lwz 30, 0(3)
-; CHECK-NEXT:    addis 3, 2, .LC0@toc@ha
-; CHECK-NEXT:    ld 28, .LC0@toc@l(3)
+; CHECK-NEXT:    addis 4, 2, .LC0@toc@ha
+; CHECK-NEXT:    lwz 3, 0(3)
+; CHECK-NEXT:    ld 29, .LC0@toc@l(4)
+; CHECK-NEXT:    addi 3, 3, -1
+; CHECK-NEXT:    clrldi 3, 3, 32
+; CHECK-NEXT:    addi 30, 3, 1
 ; CHECK-NEXT:    addis 3, 2, aj@got@tlsgd@ha
 ; CHECK-NEXT:    addi 3, 3, aj@got@tlsgd@l
 ; CHECK-NEXT:    bl __tls_get_addr(aj@tlsgd)
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    addi 4, 3, 8
 ; CHECK-NEXT:    .p2align 5
 ; CHECK-NEXT:  .LBB0_1: # %monotonic.i
 ; CHECK-NEXT:    #
-; CHECK-NEXT:    lwz 5, 0(28)
+; CHECK-NEXT:    lwz 5, 0(29)
 ; CHECK-NEXT:    andi. 5, 5, 255
 ; CHECK-NEXT:    bne 0, .LBB0_4
 ; CHECK-NEXT:  # %bb.2: # %for.cond.i
 ; CHECK-NEXT:    #
-; CHECK-NEXT:    addi 29, 29, 1
-; CHECK-NEXT:    cmplw 29, 30
-; CHECK-NEXT:    bne 0, .LBB0_1
+; CHECK-NEXT:    addi 30, 30, -1
+; CHECK-NEXT:    cmpldi 30, 0
+; CHECK-NEXT:    bc 12, 1, .LBB0_1
 ; CHECK-NEXT:  # %bb.3:
 ; CHECK-NEXT:    mr 4, 3
 ; CHECK-NEXT:  .LBB0_4: # %if.end
 ; CHECK-NEXT:    li 3, 1
 ; CHECK-NEXT:    std 3, 0(4)
 ; CHECK-NEXT:    addi 1, 1, 64
 ; CHECK-NEXT:    ld 0, 16(1)
 ; CHECK-NEXT:    ld 30, -16(1) # 8-byte Folded Reload
 ; CHECK-NEXT:    ld 29, -24(1) # 8-byte Folded Reload
-; CHECK-NEXT:    ld 28, -32(1) # 8-byte Folded Reload
 ; CHECK-NEXT:    mtlr 0
 ; CHECK-NEXT:    blr
 entry:
   %0 = load i32, ptr undef, align 4
   br label %monotonic.i
 
 for.cond.i:                                       ; preds = %monotonic.i
   %exitcond.not = icmp eq i32 %inc.i, %0