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Differential D139914

[NFC][PowerPC] Add tests for 64-bit constants that require 5 instructions to materialize.
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Authored by Esme on Dec 12 2022, 11:22 PM.

Details

Reviewers
shchenz
stefanp
Group Reviewers
Restricted Project
Commits
rGd4fd2758962c: [NFC][PowerPC] Add tests for 64-bit constants that require 5 instructions to…

Diff Detail

Unit TestsFailed

TimeTest
60,330 msx64 debian > Clang.Driver::arm-cortex-cpus-1.c
60,360 msx64 debian > Clang.Driver::arm-cortex-cpus-2.c
60,070 msx64 debian > Clang.Driver::crash-report.cpp
60,050 msx64 debian > Clang.Driver::emit-reproducer.c

Event Timeline

Esme created this revision.Dec 12 2022, 11:22 PM
Herald added a project: Restricted Project. · View Herald TranscriptDec 12 2022, 11:22 PM
Herald added a subscriber: nemanjai. · View Herald Transcript
Esme requested review of this revision.Dec 12 2022, 11:22 PM
Herald added a project: Restricted Project. · View Herald TranscriptDec 12 2022, 11:22 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
Esme added a child revision: D139813: [PowerPC] Improve materialization for immediates which is almost a 32 bit splat..Dec 12 2022, 11:29 PM
shchenz accepted this revision as: shchenz.Dec 12 2022, 11:35 PM
This revision is now accepted and ready to land.Dec 12 2022, 11:35 PM
This revision was landed with ongoing or failed builds.Dec 12 2022, 11:46 PM
Closed by commit rGd4fd2758962c: [NFC][PowerPC] Add tests for 64-bit constants that require 5 instructions to… (authored by Esme). · Explain Why
This revision was automatically updated to reflect the committed changes.
Esme added a commit: rGd4fd2758962c: [NFC][PowerPC] Add tests for 64-bit constants that require 5 instructions to….
Harbormaster completed remote builds in B202763: Diff 482366.Dec 13 2022, 12:17 AM

Revision Contents

PathSize
llvm/
test/
CodeGen/
PowerPC/
26 lines

Diff 482366

llvm/test/CodeGen/PowerPC/constants-i64.ll

Show First 20 Lines • Show All 369 Lines • ▼ Show 20 Lines
; CHECK-NEXT: rldic 3, 3, 33, 30 ; CHECK-NEXT: rldic 3, 3, 33, 30
; CHECK-NEXT: oris 3, 3, 39436 ; CHECK-NEXT: oris 3, 3, 39436
; CHECK-NEXT: ori 3, 3, 61633 ; CHECK-NEXT: ori 3, 3, 61633
; CHECK-NEXT: blr ; CHECK-NEXT: blr
entry: entry:
ret i64 11174473921 ret i64 11174473921
} }
define i64 @imm19() {
; CHECK-LABEL: imm19:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, -13105
; CHECK-NEXT: ori 3, 3, 52479
; CHECK-NEXT: rldic 3, 3, 32, 0
; CHECK-NEXT: oris 3, 3, 52431
; CHECK-NEXT: ori 3, 3, 291
; CHECK-NEXT: blr
entry:
ret i64 14758239902941249827 ;0xCCCFCCFFCCCF0123
}
define i64 @imm20() {
; CHECK-LABEL: imm20:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lis 3, -13057
; CHECK-NEXT: ori 3, 3, 52479
; CHECK-NEXT: rldic 3, 3, 32, 0
; CHECK-NEXT: oris 3, 3, 291
; CHECK-NEXT: ori 3, 3, 52479
; CHECK-NEXT: blr
entry:
ret i64 14771750698406366463 ;0xCCFFCCFF0123CCFF
}
attributes #0 = { nounwind readnone } attributes #0 = { nounwind readnone }